603bd8f54c
Rename getAddrModeImm12OpValue to getAddrModeImmOpValue and expand it to work
...
with immediates up to 16-bits in size. The same logic is applied to other LDR
encodings, e.g. VLDR, but which use a different immediate bit width (8-bits in
VLDR's case). Removing the "12" allows it to be more generic.
llvm-svn: 118094
2010-11-02 22:31:46 +00:00
0190a649e8
Mark ARM subtarget features that are available for the assembler.
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llvm-svn: 117929
2010-11-01 16:59:54 +00:00
5d6f6a061b
add simple support for addrmode5 operands, allowing
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vldr.64 to work. I have no idea if this is fully right, but
it is in the right direction.
llvm-svn: 117626
2010-10-29 00:27:31 +00:00
327a61423b
most simple arm instructions match correctly now,
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it looks like we're not handling [] operands though
llvm-svn: 117607
2010-10-28 21:31:07 +00:00
1be0697ab9
fix the asmmatcher generator to handle targets with no RegisterPrefix
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(like ARM) correctly. With this change, we can now match "bx lr"
because we recognize lr as a register.
llvm-svn: 117606
2010-10-28 21:28:42 +00:00
fbae9435c9
move ARM MC tests up one level.
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llvm-svn: 115414
2010-10-02 18:52:05 +00:00
Bill Wendling