Commit Graph

227175 Commits

Author SHA1 Message Date
Quentin Colombet c4db2ad5b8 [RegisterBank] Provide a way to check if a register bank is valid.
Change the default constructor to create invalid object.
The target will have to properly initialize the register banks before
using them.

llvm-svn: 265460
2016-04-05 20:48:32 +00:00
Duncan P. N. Exon Smith 91d3cfed78 Revert "Fix Clang-tidy modernize-deprecated-headers warnings in remaining files; other minor fixes."
This reverts commit r265454 since it broke the build.  E.g.:

  http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_build/22413/

llvm-svn: 265459
2016-04-05 20:45:04 +00:00
Duncan P. N. Exon Smith 27e95f7c7b Make constructors for final subclasses of Constant private, NFC
These were `protected` before, but might as well be `private`.  Also
marked the classes themselves `final`.

llvm-svn: 265458
2016-04-05 20:31:23 +00:00
David Blaikie 62be5ae577 llvm-dwp: Handle GCC's use of multiple debug_types.dwo sections in a single .dwo file
(also includes the .test file missing from my previous commit, r265452)

llvm-svn: 265457
2016-04-05 20:26:50 +00:00
Duncan P. N. Exon Smith ea7df770ae ValueMapper: Rewrite Mapper::mapMetadata without recursion
This commit completely rewrites Mapper::mapMetadata (the implementation
of llvm::MapMetadata) using an iterative algorithm.  The guts of the new
algorithm are in MDNodeMapper::map, the entry function in a new class.

Previously, Mapper::mapMetadata performed a recursive exploration of the
graph with eager "just in case there's a reason" malloc traffic.

The new algorithm has these benefits:

  - New nodes and temporaries are not created eagerly.
  - Uniquing cycles are not duplicated (see new unit test).
  - No recursion.

Given a node to map, it does this:

 1. Use a worklist to perform a post-order traversal of the transitively
    referenced unmapped nodes.

 2. Track which nodes will change operands, and which will have new
    addresses in the mapped scheme.  Propagate the changes through the
    POT until fixed point, to pick up uniquing cycles that need to
    change.

 3. Map all the distinct nodes without touching their operands.  If
    RF_MoveDistinctMetadata, they get mapped to themselves; otherwise,
    they get mapped to clones.

 4. Map the uniqued nodes (bottom-up), lazily creating temporaries for
    forward references as needed.

 5. Remap the operands of the distinct nodes.

Mehdi helped me out by profiling this with -flto=thin.  On his workload
(importing/etc. for opt.cpp), MapMetadata sped up by 15%, contributed
about 50% less to persistent memory, and made about 100x fewer calls to
malloc.  The speedup is less than I'd hoped.  The profile mainly blames
DenseMap lookups; perhaps there's a way to reduce them (e.g., by
disallowing remapping of MDString).

It would be nice to break the strange remaining recursion on the Value
side: MapValue => materializeInitFor => RemapInstruction => MapValue.  I
think we could do this by having materializeInitFor return a worklist of
things to be remapped.

llvm-svn: 265456
2016-04-05 20:23:21 +00:00
Quentin Colombet 47de6c7ff4 [TargetRegisterClass] Improve the comment for how to use getSubClassMask.
llvm-svn: 265455
2016-04-05 20:21:53 +00:00
Eugene Zelenko 1760dc2a23 Fix Clang-tidy modernize-deprecated-headers warnings in remaining files; other minor fixes.
Some Include What You Use suggestions were used too.

Use anonymous namespaces in source files.

Differential revision: http://reviews.llvm.org/D18778

llvm-svn: 265454
2016-04-05 20:19:49 +00:00
Ed Schouten f2fdd013a2 Don't omit dynamic relocations for the GOT.
Where Clang's AArch64 backend seems to differ from the X86 backend is
that it tends to use the GOT more aggressively.

After getting CloudABI PIEs working on x86-64, I noticed that accessing
global variables would still crash on aarch64. Tracing it down, it turns
out that the GOT was filled with entries assuming the base address was
zero.

It turns out that we skip generating relocations for GOT entries in case
the relocation pointing towards the GOT is relative. Whether the thing
pointing to the GOT is absolute or relative shouldn't make any
difference; the GOT entry itself should contain the absolute address,
thus needs a relocation regardless.

Approved by:	rafael
Differential Revision:	http://reviews.llvm.org/D18739

llvm-svn: 265453
2016-04-05 20:17:33 +00:00
David Blaikie 60fbd3bdb7 llvm-dwp: Handle dwo files produced by GCC
To start with, handle DW_FORM_string names. Follow up commit will handle
the interesting quirk with type units I was originally aiming for here.

llvm-svn: 265452
2016-04-05 20:16:38 +00:00
Lang Hames ee5417da8f [llvm-rtdyld] Fix the return type on ErrorAndExit.
As suggested by Rafael - this function no longer returns a value as of r264425.

llvm-svn: 265451
2016-04-05 20:11:24 +00:00
Ahmed Bougacha 50e6cd4a3a [X86] Reuse EFLAGS and form LOCKed ops when only user is SETCC.
We only generate LOCKed versions of add/sub when the result is unused.
It often happens that the result is used, but only by a comparison. We
can optimize those out by reusing EFLAGS, which lets us use the proper
instructions, instead of having to fallback to LXADD.

Instead of doing this as an MI peephole (as we do for the other
non-LOCKed (really, non-MR) forms), do it in ISel. It becomes quite
tricky later.

This also makes it eventually possible to stop expanding and/or/xor
if the only user is an icmp (also see D18141).

This uses the LOCK ISD opcodes added by r262244.

Differential Revision: http://reviews.llvm.org/D17633

llvm-svn: 265450
2016-04-05 20:02:57 +00:00
Quentin Colombet b235d32e74 [GlobalISel] Add the RegisterBankInfo class for the handling of register banks.
llvm-svn: 265449
2016-04-05 20:02:47 +00:00
Ahmed Bougacha b76e7253e9 [X86] Add tests for ATOMIC_LOAD_OP EFLAGS reuse. NFC.
llvm-svn: 265448
2016-04-05 20:02:44 +00:00
Ahmed Bougacha 629446ba03 [X86] Simplify early-exit check. NFC.
llvm-svn: 265447
2016-04-05 20:02:22 +00:00
Lang Hames 580ca237db [Support] Add a checked flag to Expected<T>, require checks before access or
destruction.

This makes the Expected<T> class behave like Error, even when in success mode.
Expected<T> values must be checked to see whether they contain an error prior
to being dereferenced, assigned to, or destructed.

llvm-svn: 265446
2016-04-05 19:57:03 +00:00
Quentin Colombet bdc3b4d523 [GlobalISel] Add a class, RegisterBank, to represent register banks.
llvm-svn: 265445
2016-04-05 19:54:44 +00:00
Sanjay Patel 16be4df94c fixed to discard earlier advertising
Also, hardcode (there must be a better way...) the 'utils' dir in the 
advertisement, so it's easier to find.

llvm-svn: 265444
2016-04-05 19:50:21 +00:00
Greg Clayton a19af5812f Fix a crasher that could happen if ClangASTSource::CompleteType() found a type whose name matched, but came from a different language. We need to verify that any types we find are clang types before trying to extra a clang::QualType and then use it.
<rdar://problem/24138711>

llvm-svn: 265443
2016-04-05 19:29:05 +00:00
Sanjay Patel 4c7d094451 fix typo; NFC
llvm-svn: 265442
2016-04-05 19:27:39 +00:00
Quentin Colombet 811da0efbc [AArch64][Test] Do not override the suffixes for test cases.
llvm-svn: 265441
2016-04-05 19:26:42 +00:00
Quentin Colombet 8e8e85c19f [GlobalISel] Add the skeleton of the RegBankSelect pass.
This pass is reponsible for assigning the generic virtual registers to register
banks.

llvm-svn: 265440
2016-04-05 19:06:01 +00:00
Nirav Dave e585b5c52b Fix broken tests from no-jump-table commit
Summary: Fix failing tests from no-jump-table flag addition

Reviewers: jyknight

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18801

llvm-svn: 265439
2016-04-05 18:59:37 +00:00
Lang Hames bbdccbe963 [Support] clang-format Error.h.
This tidies up the ExitOnError class and some other recently added code. NFC.

llvm-svn: 265438
2016-04-05 18:50:09 +00:00
Jonathan Peyton 072772bf05 [STATS] Remove trailing whitespace in stats source files
llvm-svn: 265437
2016-04-05 18:48:48 +00:00
Justin Lebar 19dafbd211 [CUDA] Show --cuda-gpu-arch option in clang --help.
For some reason it was hidden.

llvm-svn: 265436
2016-04-05 18:26:25 +00:00
Justin Lebar d3a44f6885 [CUDA] Add -fcuda-flush-denormals-to-zero.
Summary:
Setting this flag causes all functions are annotated with the
"nvvm-f32ftz" = "true" attribute.

In addition, we annotate the module with "nvvm-reflect-ftz" set
to 0 or 1, depending on whether -cuda-flush-denormals-to-zero is set.
This is read by the NVVMReflect pass.

Reviewers: tra, rnk

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D18671

llvm-svn: 265435
2016-04-05 18:26:20 +00:00
Sanjay Patel f3bb6c51bc fix documentation comments; NFC
llvm-svn: 265434
2016-04-05 18:23:30 +00:00
Manman Ren e221a870d3 Swift Calling Convention: swifterror target-independent change.
At IR level, the swifterror argument is an input argument with type
ErrorObject**. For targets that support swifterror, we want to optimize it
to behave as an inout value with type ErrorObject*; it will be passed in a
fixed physical register.

The main idea is to track the virtual registers for each swifterror value. We
define swifterror values as AllocaInsts with swifterror attribute or a function
argument with swifterror attribute.

In SelectionDAGISel.cpp, we set up swifterror values (SwiftErrorVals) before
handling the basic blocks.

When iterating over all basic blocks in RPO, before actually visiting the basic
block, we call mergeIncomingSwiftErrors to merge incoming swifterror values when
there are multiple predecessors or to simply propagate them. There, we create a
virtual register for each swifterror value in the entry block. For predecessors
that are not yet visited, we create virtual registers to hold the swifterror
values at the end of the predecessor. The assignments are saved in
SwiftErrorWorklist and will be materialized at the end of visiting the basic
block.

When visiting a load from a swifterror value, we copy from the current virtual
register assignment. When visiting a store to a swifterror value, we create a
virtual register to hold the swifterror value and update SwiftErrorMap to
track the current virtual register assignment.

Differential Revision: http://reviews.llvm.org/D18108

llvm-svn: 265433
2016-04-05 18:13:16 +00:00
Nirav Dave 99d607b63e Fix missing period in no-jump-table flag comment. NFC.
llvm-svn: 265432
2016-04-05 18:11:01 +00:00
Sanjay Patel fd16e62d56 add tests to show missing optimization from D18230
llvm-svn: 265431
2016-04-05 18:09:36 +00:00
Sanjay Patel 4064158ccc add example usage and workflow to --help output
llvm-svn: 265430
2016-04-05 18:00:47 +00:00
David Blaikie 9b49256fa8 llvm-dwp: Simplify hashing code a bit
llvm-svn: 265426
2016-04-05 17:51:40 +00:00
Nirav Dave d2f44d8de0 Add -fno-jump-tables and-fjump-tables flags
Add no-jump-tables flag to disable use of jump tables when lowering
switch statements

Reviewers: echristo, hans

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18407

llvm-svn: 265425
2016-04-05 17:50:43 +00:00
Rui Ueyama 376ab7cc7b Fix formatting.
llvm-svn: 265424
2016-04-05 17:47:29 +00:00
Tobias Grosser 6a44b7fdf0 Add test case forgotten in r265379.
Thanks Johannes for reminding me.

llvm-svn: 265423
2016-04-05 17:40:07 +00:00
Stephane Sezer 0036ac4236 Fix dotest.py '-p' option for multi-process mode
Summary:
The '-p' option for dotest.py was ignored in multiprocess mode,
as the -p argument to the inferior would overwrite the -p argument
passed on the command line.

Reviewers: zturner, tfiala

Subscribers: lldb-commits, sas

Differential Revision: http://reviews.llvm.org/D18779

Change by Francis Ricci <fjricci@fb.com>

llvm-svn: 265422
2016-04-05 17:34:38 +00:00
Stephane Sezer 6944f0eeb0 Update watchpoint help to use new -s flag
Summary: Flag updated in D233237

Reviewers: spyffe, jingham, Eugene.Zelenko

Subscribers: lldb-commits, sas

Differential Revision: http://reviews.llvm.org/D18660

Change by Francis Ricci <fjricci@fb.com>

llvm-svn: 265421
2016-04-05 17:30:31 +00:00
Stephane Sezer bef0ff8c7f Print environment when dumping arch triple
Summary: Print environment from triple if it exists.

Reviewers: tfiala, clayborg

Subscribers: lldb-commits, sas

Differential Revision: http://reviews.llvm.org/D18620

Change by Francis Ricci <fjricci@fb.com>

llvm-svn: 265420
2016-04-05 17:29:19 +00:00
Stephane Sezer 03f650ff14 Make sure to update Target arch if environment changed
Summary: Fixes "target list" for non-android linux platforms (ie gnu, gnueabi)

Reviewers: jasonmolenda, tfiala, clayborg, tberghammer

Subscribers: tberghammer, danalbert, lldb-commits, sas

Differential Revision: http://reviews.llvm.org/D18631

Change by Francis Ricci <fjricci@fb.com>

llvm-svn: 265419
2016-04-05 17:27:52 +00:00
Stephane Sezer 3553c0e5e7 Allow gdbremote process to read modules from memory
Summary:
The logic to read modules from memory was added to LoadModuleAtAddress
in the dynamic loader, but not in process gdb remote. This means that when
the remote uses svr4 packets to give library info, libraries only present
on the remote will not be loaded.

This patch therefore involves some code duplication from LoadModuleAtAddress
in the dynamic loader, but removing this would require some amount of code
refactoring.

Reviewers: ADodds, tberghammer, tfiala, deepak2427, ted

Subscribers: tfiala, lldb-commits, sas

Differential Revision: http://reviews.llvm.org/D18531

Change by Francis Ricci <fjricci@fb.com>

llvm-svn: 265418
2016-04-05 17:25:32 +00:00
Sanjay Patel 6ecf1b6760 [InstCombine] regenerate checks
utils/update_test_checks.py was improved with:
http://reviews.llvm.org/rL265414
to CHECK-NEXT the first line of the IR function. This ensures that nothing bad
has happened before that.

llvm-svn: 265417
2016-04-05 17:24:54 +00:00
Sanjay Patel 0484879fe7 [x86] regenerate checks
utils/update_test_checks.py was improved with:
http://reviews.llvm.org/rL265414
to include the first line of the function (expected to be
a comment line). This ensures that nothing bad has happened
before the first actual line of checked asm. It also matches
the existing behavior of the old script.

llvm-svn: 265416
2016-04-05 17:12:19 +00:00
JF Bastien c6ba5ead5e WebAssembly: fix cfg-stackify test
It was broken by reshuffling induced by r265397 'Don't delete empty preheaders in CodeGenPrepare if it would create a critical edge'.

llvm-svn: 265415
2016-04-05 17:01:52 +00:00
Sanjay Patel 96241e78ed check or check-next the first line of the function too
We could make this an option if people don't like it. 
But since part of the reason for using a script to generate
checks is to prevent lazy checking that lets bugs crawl 
through, let's have the script check the first line too. 

For asm tests, it ensures that nothing unexpected has 
happened before the first line of asm. This matches the
existing behavior of update_llc_test_checks.py. 

More discussion in PR22897:
https://llvm.org/bugs/show_bug.cgi?id=22897

llvm-svn: 265414
2016-04-05 16:49:07 +00:00
Johannes Doerfert a49c557f70 Remove dead code and comment [NFC]
llvm-svn: 265413
2016-04-05 16:18:53 +00:00
Valery Pykhtin 020c29e2b7 [TableGen] AsmMatcherEmitter.cpp: replace a sequence of "if" to "switch" in emitValidateOperandClass.
Differential Revision: http://reviews.llvm.org/D18394

llvm-svn: 265412
2016-04-05 16:18:16 +00:00
Jacques Pienaar 42991b3e5a [lanai] LanaiSetflagAluCombiner more conservative
Summary: LanaiSetflagAluCombiner could previously combine instructions across basic building blocks even when not legal. Make the LanaiSetflagAluCombiner more conservative to avoid this.

Reviewers: eliben

Subscribers: joker.eph, llvm-commits

Differential Revision: http://reviews.llvm.org/D18746

llvm-svn: 265411
2016-04-05 16:18:13 +00:00
Johannes Doerfert ed89fae6c5 [WWW] Update passes
llvm-svn: 265410
2016-04-05 16:15:44 +00:00
Sam Parker 0d3a3a537c [ARM] Cleanup of smul and smla instruction descriptions
Removed the SDNode argument passed to the AI_smul and AI_smla multiclass
definitions as they are always mul.

Differential Revision: http://reviews.llvm.org/D18791

llvm-svn: 265409
2016-04-05 16:01:25 +00:00
Konstantin Zhuravlyov e63e02cb0c [AMDGPU] Emit linkonce and linkonce_odr symbols
Differential Revision: http://reviews.llvm.org/D18726

llvm-svn: 265408
2016-04-05 16:00:58 +00:00