Commit Graph

4139 Commits

Author SHA1 Message Date
KareemErgawy-TomTom aa6eb2af10 [MLIR][LinAlg] Implement detensoring cost-modelling.
This patch introduces the neccessary infrastructure changes to implement
cost-modelling for detensoring. In particular, it introduces the
following changes:
- An extension to the dialect conversion framework to selectively
convert sub-set of non-entry BB arguments.
- An extension to branch conversion pattern to selectively convert
sub-set of a branche's operands.
- An interface for detensoring cost-modelling.
- 2 simple implementations of 2 different cost models.

This sets the stage to explose cost-modelling for detessoring in an
easier way. We still need to come up with better cost models.

Reviewed By: silvas

Differential Revision: https://reviews.llvm.org/D99945
2021-04-13 09:07:18 +02:00
Eugene Zhulenev a6628e596e [mlir] Async: add automatic reference counting at async.runtime operations level
Depends On D95311

Previous automatic-ref-counting pass worked with high level async operations (e.g. async.execute), however async values reference counting is a runtime implementation detail.

New pass mostly relies on the save liveness analysis to place drop_ref operations, and does better verification of CFG with different liveIn sets in block successors.

This is almost NFC change. No new reference counting ideas, just a cleanup of the previous version.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D95390
2021-04-12 18:54:55 -07:00
Geoffrey Martin-Noble ae33eef505 [MLIR] Add a switch operation to the standard dialect
This is similar to the definition of llvm.switch, providing
unstructured branch-based control flow. It differs from the LLVM
operation in that it accepts any signless integer (not only an i32),
takes no branch weights (the same as the Branch and CondBranch ops),
and has a slightly different syntax for the default case that includes
it in the list of cases with an explicit `default` keyword.

Also included are several canonicalizers.

See https://llvm.discourse.group/t/rfc-add-std-switch-and-scf-switch/3090

Reviewed By: rriddle, bondhugula

Differential Revision: https://reviews.llvm.org/D99925
2021-04-12 18:46:02 -07:00
Lei Zhang 0deeaaca39 [mlir] Move memref.subview patterns to MemRef/Transforms/
These patterns have been used as a prerequisite step for lowering
to SPIR-V. But they don't involve SPIR-V dialect ops; they are
pure memref/vector op transformations. Given now we have a dedicated
MemRef dialect, moving them to Memref/Transforms/, which is a more
suitable place to host them, to allow used by others.

This commit just moves code around and renames patterns/passes
accordingly. CMakeLists.txt for existing MemRef libraries are
also improved along the way.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D100326
2021-04-12 16:38:22 -04:00
Aart Bik 7714b405a0 [mlir] introduce "encoding" attribute to tensor type
This CL introduces a generic attribute (called "encoding") on tensors.
The attribute currently does not carry any concrete information, but the type
system already correctly determines that tensor<8xi1,123> != tensor<8xi1,321>.
The attribute will be given meaning through an interface in subsequent CLs.

See ongoing discussion on discourse:

[RFC] Introduce a sparse tensor type to core MLIR
https://llvm.discourse.group/t/rfc-introduce-a-sparse-tensor-type-to-core-mlir/2944

A sparse tensor will look something like this:

```
// named alias with all properties we hold dear:
#CSR = {
  // individual named attributes
}

// actual sparse tensor type:
tensor<?x?xf64, #CSR>
```

I see the following rough 5 step plan going forward:

(1) introduce this format attribute in this CL, currently still empty
(2) introduce attribute interface that gives it "meaning", focused on sparse in first phase
(3) rewrite sparse compiler to use new type, remove linalg interface and "glue"
(4) teach passes to deal with new attribute, by rejecting/asserting on non-empty attribute as simplest solution, or doing meaningful rewrite in the longer run
(5) add FE support, document, test, publicize new features, extend "format" meaning to other domains if useful

Reviewed By: stellaraccident, bondhugula

Differential Revision: https://reviews.llvm.org/D99548
2021-04-12 10:37:15 -07:00
Emilio Cota 8508a63b88 [mlir] Rename AVX512 dialect to X86Vector
We will soon be adding non-AVX512 operations to MLIR, such as AVX's rsqrt. In https://reviews.llvm.org/D99818 several possibilities were discussed, namely to (1) add non-AVX512 ops to the AVX512 dialect, (2) add more dialects (e.g. AVX dialect for AVX rsqrt), and (3) expand the scope of the AVX512 to include these SIMD x86 ops, thereby renaming the dialect to something more accurate such as X86Vector.

Consensus was reached on option (3), which this patch implements.

Reviewed By: aartbik, ftynse, nicolasvasilache

Differential Revision: https://reviews.llvm.org/D100119
2021-04-12 19:20:04 +02:00
Tobias Gysi 93f9922d65 [mlir][linalg] adding operation to access the iteration index of enclosing linalg ops.
The `linalg.index` operation provides access to the iteration indexes of immediately enclosing linalg operations. It takes a dimension `dim` attribute and returns the iteration index in the given dimension. Having `linalg.index` allows us to unify `linalg.generic` and `linalg.indexed_generic` and also enables index access in named operations.

Differential Revision: https://reviews.llvm.org/D100292
2021-04-12 13:37:17 +00:00
Nicolas Vasilache ca0e250ec6 [mlir] NFC - Add help functions to scf.ForOp
This revision adds 2 helperr functions that help tie OpOperands and
BlockArguments in scf.ForOp without having to use the internal implementation
details.
2021-04-09 20:26:34 +00:00
Frederik Gossen 74d33052dd [MLIR][Shape] Add convenience builder for `shape.assuming_all`
Differential Revision: https://reviews.llvm.org/D100105
2021-04-09 12:17:34 +02:00
MaheshRavishankar f4eb681dc3 [mlir][Linalg] Drop unit-trip loops of reductions only if other reduction loops exists.
Recent change enable dropping unit-trip loops of "reduction" iterator
type as well. This is fine as long as there is one other "reduction"
iterator in the operation. Without this the initialized value (value
of `out`) is not read which leads to a correctness issue.

Also fix a bug in the `fill` -> `tensor_reshape` folding. The `out`
operand of the `fill` needs to be reshaped to get the `out` operand of
the generated `fill` operation.

Differential Revision: https://reviews.llvm.org/D100145
2021-04-08 22:31:29 -07:00
Rob Suderman ceeb5b0f87 [mlir][tosa] Add tosa.max_pool2d lowering to linalg int max pooling additions
Lowerings tosa.max_pool2d to linalg equivalent operations. Includes
adding max pooling operations for linalg, with corresponding tests.

Differential Revision: https://reviews.llvm.org/D99824
2021-04-08 18:17:16 -07:00
Weiwei Li 12ffc26067 [mlir][spirv] Define spv.ImageDrefGather operation
This patch doesn't support the optional operands of ImageDrefGather. The support of optional operands will be implemented later.

co-authered-by: Alan Liu <alanliu.yf@gmail.com>

Differential Revision: https://reviews.llvm.org/D100128
2021-04-08 20:15:54 -04:00
Hanhan Wang c361435845 [mlir][StandardToSPIRV] Handle i1 case for lowering memref.load/store op
This patch unconditionally converts i1 types to i8 types on memrefs. If the
extensions or capabilities are not met, they will be converted to i32. Hence the
logic in IntLoadPattern and IntStorePattern are also updated.

Also added the implementation of SPIRVTypeConverter::getOptions().

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D99724
2021-04-08 12:15:25 -07:00
Lei Zhang 5299843c31 [mlir][spirv] Add control for non-32-bit scalar type emulation
Non-32-bit scalar types require special hardware support that may not
exist on all GPUs. This is reflected in SPIR-V as that non-32-bit scalar
types require special capabilities or extensions.

Previously when there is a non-32-bit type and no native support, we
unconditionally emulate it with 32-bit ones. This isn't good given that
it can have implications over ABI and data layout consistency.

This commit introduces an option to control whether to use 32-bit
types to emulate.

Differential Revision: https://reviews.llvm.org/D100059
2021-04-08 08:19:47 -04:00
Tobias Gysi b614ada0e8 [mlir] add support for index type in vectors.
The patch enables the use of index type in vectors. It is a prerequisite to support vectorization for indexed Linalg operations. This refactoring became possible due to the newly introduced data layout infrastructure. The data layout of a module defines the bitwidth of the index type needed to verify bitcasts and similar vector operations.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D99948
2021-04-08 08:17:13 +00:00
Mehdi Amini eb7f5eaf35 Change the default value for `preloadDialectsInContext` for MlirOptMain
This option has been deprecated for 6 months, change the default setting for now before
future removal.

While clients can set the option to true for now, they should start
updating their passes to define the right `dependentDialects` in
preparation of the removal of this option. See the FAQ for more info:
https://mlir.llvm.org/getting_started/Faq/

Reviewed By: rriddle, jpienaar

Differential Revision: https://reviews.llvm.org/D99025
2021-04-08 05:05:10 +00:00
Jacques Pienaar 628dda08b8 [mlir,shape] Update min/max op description 2021-04-07 08:21:15 -07:00
Matthias Springer 65a3f28939 [mlir] Add "mask" operand to vector.transfer_read/write.
Also factors out out-of-bounds mask generation from vector.transfer_read/write into a new MaterializeTransferMask pattern.

Differential Revision: https://reviews.llvm.org/D100001
2021-04-07 21:33:13 +09:00
Jacques Pienaar 8b109bc2ea [mlir,shape] Add max/min folder for simple case
When both arguments are the same for these ops, propagate this argument.
2021-04-06 20:22:42 -07:00
Jacques Pienaar e74e6afcf1 [shape] Add min and max ops
These are element-wise operations that operates on shapes with equal ranks.
Also add missing printer/parser for join operator.

Differential Revision: https://reviews.llvm.org/D99986
2021-04-06 17:58:12 -07:00
Alexander Belyaev 5571cc7dee [mlir][linalg] Add helpers for linalg.tiled_loop [nfc].
Differential Revision: https://reviews.llvm.org/D99968
2021-04-06 18:17:37 +02:00
Nicolas Vasilache 518e6f341d [mlir][Linalg] Fix fusion on tensors operands / bbArg mismatch
Linalg fusion on tensors has mismatching assumptions on the operand side than on the region bbArg side.
Relax the behavior on the operand/indexing map side so that we better support output operands that may also be read from.

Differential revision: https://reviews.llvm.org/D99499
2021-04-06 15:39:40 +00:00
MaheshRavishankar 944a2fe763 [mlir][Linalg] Add callbacks to fusion of elementwise operations to control fusion.
Right now Elementwise operations fusion in Linalg fuses everything it
can. This can run up against resource limits of the target hardware
without some checks. This patch adds a callback function that clients
can use to implement a cost function. When two elementwise operations
are deemed structurally fusable, the callback can be used to control
if the fusion applies.

Differential Revision: https://reviews.llvm.org/D99820
2021-04-05 16:08:47 -07:00
MaheshRavishankar ea069aebcc [mlir][Linalg] NFC: Move populatePatterns* method into linalg namespace.
The moved `populate` methods are only relevant to Linalg
operations. So they are better of in `linalg` namespace.  Also rename
`populateLinalgTensorOpsFusionPatterns` to
`populateElementwiseOpsFusionPatterns`. This makes the scope of these
patterns explicit and disambiguates it with fusion on tensors using
tile + fuse.

Differential Revision: https://reviews.llvm.org/D99819
2021-04-05 11:16:02 -07:00
Butygin 6e96de8abf [mlir][NFC] Fully spell mlir types names in LoopLikeOpInterface, so it can be used in ops defined outside mlir namespace
Differential Revision: https://reviews.llvm.org/D99844
2021-04-04 12:25:15 +03:00
Sean Silva 223dcdcfbe [mlir] Add optional TypeConverter for materializations.
`ConversionPatternRewriter::applySignatureConversion` did not have a way
to apply a signature conversion that involved materializations.

Differential Revision: https://reviews.llvm.org/D99782
2021-04-02 13:39:06 -07:00
Rob Suderman 12c3bca193 [mlir] Rename linalg.pooling operations to have a FOp postfix for floating point
Linalg pooling operations only support floating point currently but integer
variants will soon be needed. Renaming to uncluse a FOp postfix to clarify.

Differential Revision: https://reviews.llvm.org/D99779
2021-04-02 11:54:20 -07:00
Lei Zhang 6dd07fa513 [mlir][spirv] Add utilities for push constant value
This commit add utility functions for creating push constant
storage variable and loading values from it.

Along the way, performs some clean up:

* Deleted `setABIAttrs`, which is just a 4-liner function
  with one user.
* Moved `SPIRVConverstionTarget` into `mlir` namespace,
  to be consistent with `SPIRVTypeConverter` and
  `LLVMConversionTarget`.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D99725
2021-04-02 07:51:07 -04:00
Alex Zinenko 5d7c832e8c [mlir] add memref dialect as dependent of lower-affine pass
The lower-affine pass also processes affine load and store operations
that get converted to load and store operations now available in the
memref dialect. Since it produces operations from the memref dialect,
this dialect should be registered as dependent for this pass. It is rare
but possible to have code that doesn't have memref operations in the
input and calls this pass.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D99720
2021-04-02 09:17:10 +02:00
Aden Grue 3ba1b1cd20 Add a pattern to combine composed subview ops
Differential Revision: https://reviews.llvm.org/D99229
2021-04-01 10:56:57 -07:00
Vinayaka Bandishti dc537158d5 [MLIR][Affine] Add utility to check if the slice is valid
Fixes a bug in affine fusion pipeline where an incorrect slice is computed.
After the slice computation is done, original domain of the the source is
compared with the new domain that will result if the fusion succeeds. If the
new domain must be a subset of the original domain for the slice to be
valid. If the slice computed is incorrect, fusion based on such a slice is
avoided.

Relevant test cases are added/edited.

Fixes https://bugs.llvm.org/show_bug.cgi?id=49203

Differential Revision: https://reviews.llvm.org/D98239
2021-04-01 14:52:22 +05:30
Nicolas Vasilache 335d2df533 [mlir][Python][Linalg] Add missing attributes to linalg ops
This revision tightens up the handling of attributes for both named
and generic linalg ops.
To demonstrate the IR validity, a working e2e Linalg example is added.

Differential Revision: https://reviews.llvm.org/D99430
2021-04-01 08:16:50 +00:00
Suraj Sudhir 888c5067b4 Move non-spec TOSA operators into TosaUtilOps.td
Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D99628
2021-03-31 11:01:01 -07:00
Matthias Springer 95f8135043 [mlir] Change vector.transfer_read/write "masked" attribute to "in_bounds".
This is in preparation for adding a new "mask" operand. The existing "masked" attribute was used to specify dimensions that may be out-of-bounds. Such transfers can be lowered to masked load/stores. The new "in_bounds" attribute is used to specify dimensions that are guaranteed to be within bounds. (Semantics is inverted.)

Differential Revision: https://reviews.llvm.org/D99639
2021-03-31 18:04:22 +09:00
Nicolas Vasilache 43b9fa3ce0 [mlir][Linalg][Python] Create the body of builtin named Linalg ops
This revision adds support to properly add the body of registered
builtin named linalg ops.
At this time, indexing_map and iterator_type support is still
missing so the op is not executable yet.

Differential Revision: https://reviews.llvm.org/D99578
2021-03-31 07:58:32 +00:00
Alexander Belyaev 465b9a4a33 Revert "Revert "[mlir] Introduce CloneOp and adapt test cases in BufferDeallocation.""
This reverts commit 883912abe6.
2021-03-31 09:49:09 +02:00
Stella Laurenzo 9a9214fa25 [mlir] Add C and python API for is_registered_operation.
* Suggested to be broken out of D99578

Differential Revision: https://reviews.llvm.org/D99638
2021-03-30 22:56:02 -07:00
Mehdi Amini 7a4d630764 Add a "register_runtime" method to the mlir.execution_engine and show calling back from MLIR into Python
This exposes the ability to register Python functions with the JIT and
exposes them to the MLIR jitted code. The provided test case illustrates
the mechanism.

Differential Revision: https://reviews.llvm.org/D99562
2021-03-30 17:04:38 +00:00
MaheshRavishankar 9b0517035f [mlir] Enhance InferShapedTypeOpInterface and move LinalgOps to use them.
A new `InterfaceMethod` is added to `InferShapedTypeOpInterface` that
allows an operation to return the `Value`s for each dim of its
results. It is intended for the case where the `Value` returned for
each dim is computed using the operands and operation attributes. This
interface method is for cases where the result dim of an operation can
be computed independently, and it avoids the need to aggregate all
dims of a result into a single shape value. This also implies that
this is not suitable for cases where the result type is unranked (for
which the existing interface methods is to be used).

Also added is a canonicalization pattern that uses this interface and
resolves the shapes of the output in terms of the shapes of the
inputs. Moving Linalg ops to use this interface, so that many
canonicalization patterns implemented for individual linalg ops to
achieve the same result can be removed in favor of the added
canonicalization pattern.

Differential Revision: https://reviews.llvm.org/D97887
2021-03-29 11:39:48 -07:00
thomasraoux 5288c25c70 [mlir][vector] Add lowering of Transfer_read with broadcast and permutation map
Convert transfer_read ops with permutation maps into simpler
transfer_read with minority map + vector.braodcast and vector.transpose.
And transfer_read with leading dimensions broacast into transfer_read of
lower rank.

Differential Revision: https://reviews.llvm.org/D99019
2021-03-29 08:38:43 -07:00
Alexander Belyaev 883912abe6 Revert "[mlir] Introduce CloneOp and adapt test cases in BufferDeallocation."
This reverts commit 06b03800f3.
Until some kind of support for region args is added.
2021-03-29 12:47:59 +02:00
Julian Gross 06b03800f3 [mlir] Introduce CloneOp and adapt test cases in BufferDeallocation.
Add a new clone operation to the memref dialect. This operation implicitly
copies data from a source buffer to a new buffer. In contrast to the linalg.copy
operation, this operation does not accept a target buffer as an argument.
Instead, this operation performs a conceptual allocation which does not need to
be performed manually.

Furthermore, this operation resolves the dependency from the linalg-dialect
in the BufferDeallocation pass. In addition, we also extended the canonicalization
patterns to fold clone operations. The copy removal pass has been removed.

Differential Revision: https://reviews.llvm.org/D99172
2021-03-29 10:19:10 +02:00
KareemErgawy-TomTom e5f2898bc7 [MLIR][STD] Fold trunci (zexti).
This patch folds the following pattern:

```
  %arg0 = ...
  %0 = zexti %arg0 : i1 to i8
  %1 = trunci %0 : i8 to i1
```

into just `%arg0`.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D99453
2021-03-27 19:40:10 +01:00
Alex Zinenko d68ba1fe50 [mlir] Register Linalg passes in C API and Python Bindings
Provide a registration mechanism for Linalg dialect-specific passes in C
API and Python bindings. These are being built into the dialect library
but exposed in separate headers (C) or modules (Python).

Differential Revision: https://reviews.llvm.org/D99431
2021-03-27 09:57:56 +01:00
Jacques Pienaar 7ce07c6494 [mlir] Remove unneeded ShapeFunctionLibraryTerminatorOp
Now that NoTerminator is possible this op can be removed/it was only
needed structurally before. NFC.
2021-03-26 16:03:51 -07:00
Sameer Rahmani 86a2fa4998 Rename the 'concept' variable in SymbolInterfaces.td
`concept` is a reserved keyword in C++20, it can't be used as a variable name.
Here is an example of the failure:

```
      auto *concept = getInterfaceFor(op);
            ^
include/mlir/IR/SymbolInterfaces.h.inc:156:12: error: expected expression [clang-diagnostic-error]
      if (!concept)
           ^
```

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D99369
2021-03-26 20:17:24 +00:00
Suraj Sudhir ec46e03daf [mlir][tosa] TOSA MLIR dialect update to v0.22, part 1
Incremental set of updates to align to TOSA v0.22 spec

    - modify gather, resize
    - add scatter
    - remove aint8 type

Reviewed By: rsuderman

Differential Revision: https://reviews.llvm.org/D99390
2021-03-25 21:34:34 -07:00
Alexander Belyaev 7f2236cf58 [mlir][linalg] Add output tensor args folding for linalg.tiled_loop.
Folds away TiledLoopOp output tensors when the following conditions are met:
* result of `linalg.tiled_loop` has no uses
* output tensor is the argument of `linalg.yield`

Example:

```
%0 = linalg.tiled_loop ...  outs (%out, %out_buf:tensor<...>, memref<...>) {
  ...
  linalg.yield %out : tensor ...
}
```

Becomes

```
linalg.tiled_loop ...  outs (%out_buf:memref<...>) {
  ...
  linalg.yield
}
```

Differential Revision: https://reviews.llvm.org/D99333
2021-03-25 18:11:05 +01:00
Uday Bondhugula 0b20413ef6 Revert "[Canonicalizer] Process regions top-down instead of bottom up & reuse existing constants."
This reverts commit 361b7d125b by Chris
Lattner <clattner@nondot.org> dated Fri Mar 19 21:22:15 2021 -0700.

The change to the greedy rewriter driver picking a different order was
made without adequate analysis of the trade-offs and experimentation. A
change like this has far reaching consequences on transformation
pipelines, and a major impact upstream and downstream. For eg., one
can’t be sure that it doesn’t slow down a large number of cases by small
amounts or create other issues. More discussion here:
https://llvm.discourse.group/t/speeding-up-canonicalize/3015/25

Reverting this so that improvements to the traversal order can be made
on a clean slate, in bigger steps, and higher bar.

Differential Revision: https://reviews.llvm.org/D99329
2021-03-25 22:17:26 +05:30
Mehdi Amini 973ddb7d6e Define a `NoTerminator` traits that allows operations with a single block region to not provide a terminator
In particular for Graph Regions, the terminator needs is just a
historical artifact of the generalization of MLIR from CFG region.
Operations like Module don't need a terminator, and before Module
migrated to be an operation with region there wasn't any needed.

To validate the feature, the ModuleOp is migrated to use this trait and
the ModuleTerminator operation is deleted.

This patch is likely to break clients, if you're in this case:

- you may iterate on a ModuleOp with `getBody()->without_terminator()`,
  the solution is simple: just remove the ->without_terminator!
- you created a builder with `Builder::atBlockTerminator(module_body)`,
  just use `Builder::atBlockEnd(module_body)` instead.
- you were handling ModuleTerminator: it isn't needed anymore.
- for generic code, a `Block::mayNotHaveTerminator()` may be used.

Differential Revision: https://reviews.llvm.org/D98468
2021-03-25 03:59:03 +00:00