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100 Commits

Author SHA1 Message Date
Craig Topper 200d237e57 [AVX512] Add shuffle comment printing for masked VPERMPD/VPERMQ. 
llvm-svn: 272371
 2016-06-10 05:12:40 +00:00
Craig Topper 89c1761474 [AVX512] Fix shuffle comment printing to handle the masked versions of some shuffles. Previously we were printing the mask operands as the register names. 
llvm-svn: 272367
 2016-06-10 04:48:05 +00:00
Igor Breger f635367e2b [AVX512] Remove masked_move/blendm intrinsic from back-end. 
This is complement patch to D21060.

Differential Revision: http://reviews.llvm.org/D21174

llvm-svn: 272257
 2016-06-09 11:46:55 +00:00
Craig Topper 6f7288dc44 [AVX512] Fix shuffle decode printing for several instructions with write masks. There are still more bugs here with UNPCK and PALIGN for sure. But these were the easiest ones to fix. 
llvm-svn: 272252
 2016-06-09 07:49:08 +00:00
Craig Topper e7ae106147 [AVX512] Ensure EVEX vpshufd, vpshuflw, and vpshufhw have isel priority over the VEX encoded ones. 
llvm-svn: 271629
 2016-06-03 05:31:04 +00:00
Craig Topper 01f53b1773 [AVX512] Fix shuffle comment printing for EVEX encoded PSHUFD, PSHUFHW, and PSHUFLW. 
llvm-svn: 271628
 2016-06-03 05:31:00 +00:00
Craig Topper f10fbfa738 [AVX512] Remove masked load intrinsics. Clang now emits generic masked load intrinsics instead. 
The intrinsics will be autoupgraded to the same generic masked loads.

llvm-svn: 271478
 2016-06-02 04:19:36 +00:00
Igor Breger 73ee8ba9b0 [AVX512] Fix intrinsic vcvtps2ph lowering. 
Differential Revision: http://reviews.llvm.org/D20788

llvm-svn: 271255
 2016-05-31 08:04:21 +00:00
Igor Breger 52bd1d5fcc Fix intrinsic vbroadcast{i32|f32}x2 lowering. 
Differential Revision: http://reviews.llvm.org/D20780

llvm-svn: 271254
 2016-05-31 07:43:39 +00:00
Craig Topper 50f85c22c5 [AVX512] Remove masked store intrinsics. Clang now emits generic masked store intrinsics instead. 
The intrinsics will be autoupgraded to the same generic masked stores.

llvm-svn: 271245
 2016-05-31 01:50:02 +00:00
Igor Breger 23c2090606 [llvm][AVX512][intrinsics] Fix vperm{b|w|d|q|ps|pd} intrinsics. Index is second argument to buildin function but it is first instruction operand. 
Differential Revision: http://reviews.llvm.org/D20515

llvm-svn: 270548
 2016-05-24 11:06:22 +00:00
Michael Zuckerman 11b55b29d1 [Clang][AVX512][intrinsics] Fix vscalef intrinsics. 
Differential Revision: http://reviews.llvm.org/D20324

llvm-svn: 270321
 2016-05-21 11:09:53 +00:00
Craig Topper 22ae353207 [AVX512] Disable AVX2 VPERMD, VPERMQ, VPERMPS, and VPERMPD patterns when AVX512VL is enabled. Also add shuffle comment printing for AVX512VL VPERMPD/VPERMQ to keep some tests that now use these instructions instead of the AVX2 ones. 
llvm-svn: 270317
 2016-05-21 06:07:18 +00:00
Craig Topper 6be70deda3 [AVX512] Disable AVX/AVX2 VBROADCASTSS/VBROADCASTSD patterns when AVX512VL is enabled. 
llvm-svn: 270316
 2016-05-21 05:47:25 +00:00
Craig Topper 1a23a521bb [AVX512] Use update_llc_test_checks to update some tests so we can see all the instruction encodings and ensure everything is with EVEX. 
llvm-svn: 270315
 2016-05-21 05:46:58 +00:00
Craig Topper 73f48f4662 [AVX512] Fix test cases I missed in r270311. 
llvm-svn: 270313
 2016-05-21 03:59:55 +00:00
Craig Topper 258f874bb9 [AVX512] Make the permd intrinsics take a 32-bit immediate to match the software spec. 
llvm-svn: 269579
 2016-05-14 21:13:20 +00:00
Craig Topper d8a9c0d120 [AVX512] Fix types for pshufd intrinsics. The immediate is the second argument and the mask is the 4th argument. Also move the 128/256 tests to the right test file. 
Prior to this the immediate was a strange 16-bits and the 512-bit intrinsic couldn't receive the full 16 mask bits it needs.

llvm-svn: 269526
 2016-05-14 00:47:18 +00:00
Simon Pilgrim 217b886b10 [X86][AVX512] Moved CHECKs inside functions to stop update_llc_test_checks going haywire 
I'm not going to regenerate these anytime soon but do have some diffs to apply that I'd like to do with update_llc_test_checks

llvm-svn: 269420
 2016-05-13 14:47:55 +00:00
Simon Pilgrim 6ce35dd9ea [X86][AVX512] Fixed VPERMILPD/VPERMILPS shuffle comments. 
Fixed incorrect operands indices used to access src registers

llvm-svn: 269221
 2016-05-11 18:53:44 +00:00
Craig Topper e5ce84a33c [AVX512] Add VLX 128/256-bit SET0 operations that encode to 128/256-bit EVEX encoded VPXORD so all 32 registers can be used. 
llvm-svn: 268884
 2016-05-08 21:33:53 +00:00
Michael Zuckerman 927fdaee88 [LLVM][AVX512]PSRAWI Change imm8 to int. 
Differential Revision: http://reviews.llvm.org/D17705

llvm-svn: 262480
 2016-03-02 12:05:07 +00:00
Michael Zuckerman 433b241570 [LLVM][AVX512] PSRL{DI|QI} Change imm8 to int 
Differential Revision: http://reviews.llvm.org/D17713

llvm-svn: 262353
 2016-03-01 17:46:32 +00:00
Michael Zuckerman 7878888690 [AVX512][PSRAQ][PSRAD] Change imm8 to int. 
Differential Revision: http://reviews.llvm.org/D17692

llvm-svn: 262320
 2016-03-01 11:36:23 +00:00
Michael Zuckerman 724dc3b20c [AVX512][PRORQ][PRORD] Change imm8 to int 
Differential Revision: http://reviews.llvm.org/D17024

llvm-svn: 261198
 2016-02-18 09:52:12 +00:00
Michael Zuckerman 529c27f408 [AVX512][PROLQ][PROLD] Change imm8 to int 
Differential Revision: http://reviews.llvm.org/D16983

llvm-svn: 260101
 2016-02-08 15:13:32 +00:00
Igor Breger 0aeda37464 AVX512: VPBROADCASTB/W/D/Q from GPR intrinsics implementation. 
Differential Revision: http://reviews.llvm.org/D16813

llvm-svn: 260024
 2016-02-07 08:30:50 +00:00
Simon Pilgrim 0acc32a3b3 [X86][AVX512] Added support for VPMOVZX shuffle decoding. 
llvm-svn: 260007
 2016-02-06 19:51:21 +00:00
Michael Zuckerman 1bd7f993fc [AVX512] Adding PTESTNMB/D/W/Q instruction 
Differential Revision: http://reviews.llvm.org/D16520

llvm-svn: 258688
 2016-01-25 14:43:23 +00:00
Michael Zuckerman 19670d479a [AVX512] Adding PTESTMB/W/D/Q instruction 
Differential Revision: http://reviews.llvm.org/D16519

llvm-svn: 258686
 2016-01-25 13:27:32 +00:00
Igor Breger 1e5bafbc82 AVX512: VMOVDQU8/16/32/64 (load) intrinsic implementation. 
Differential Revision: http://reviews.llvm.org/D16137

llvm-svn: 258657
 2016-01-24 08:04:33 +00:00
Igor Breger 7a000f5bb2 AVX512: Masked move intrinsic implementation. 
Implemented intrinsic for the follow instructions (reg move) : VMOVDQU8/16, VMOVDQA32/64, VMOVAPS/PD.

Differential Revision: http://reviews.llvm.org/D16316

llvm-svn: 258398
 2016-01-21 14:18:11 +00:00
Asaf Badouh d4a0d9a78c [X86][AVX512]fix dag & add intrinsics for fixupimm 
cover all width and types (pd/ps/sd/ss) of fixupimm instruction and inrtinsics

Differential Revision: http://reviews.llvm.org/D16313

llvm-svn: 258124
 2016-01-19 14:21:39 +00:00
Igor Breger 239fda676c AVX512: Masked store intrinsic implementation. 
Implemented intrinsic for the follow instructions (store) : VMOVDQU8/16/32/64, VMOVDQA32/64, VMOVAPS/PD, VMOVUPS/PD.

Differential Revision: http://reviews.llvm.org/D16271

llvm-svn: 258047
 2016-01-18 13:52:57 +00:00
Igor Breger dd6522c653 AVX512 : Change v8i1 bitconvert GR8 pattern, remove unnecessary movzbl instruction. 
code example , previous implementation.
    movzbl  %dil, %eax
    kmovw  %eax, %k0
  new code
    kmovw  %edi, %k0

Differential Revision: http://reviews.llvm.org/D16287

llvm-svn: 258045
 2016-01-18 12:02:45 +00:00
Michael Zuckerman ac1b238b0a [AVX512] Adding VPERMW/D/Q VPERMPS/D Intrinsics 
Differential Revision: http://reviews.llvm.org/D16189

llvm-svn: 258008
 2016-01-17 11:33:29 +00:00
Michael Zuckerman ede597c753 [AVX512] Adding VPERMQ VPERMPD Intrinsics 
Differential Revision: http://reviews.llvm.org/D16194

llvm-svn: 258006
 2016-01-17 08:32:14 +00:00
Igor Breger fc96331d88 AVX512: VMOVDQA32/64 (load) intrinsic implementation. 
Differential Revision: http://reviews.llvm.org/D16142

llvm-svn: 257749
 2016-01-14 07:56:04 +00:00
Michael Zuckerman 0e31b22487 [AVX512] Adding PMOVSXBD/W/Q , PMOVZSDQ and PMOVZSWD/Q Intrinsics . 
Differential Revision: http://reviews.llvm.org/D16111 

llvm-svn: 257604
 2016-01-13 14:59:19 +00:00
Michael Zuckerman 43cea85db9 [AVX512] Adding PMOVZXBD/W/Q , PMOVZXDQ and PMOVZXWD/Q Intrinsics 
Differential Revision:http://reviews.llvm.org/D16071

llvm-svn: 257601
 2016-01-13 14:25:21 +00:00
Michael Zuckerman 298a680c80 [AVX512] adding PRORQ , PRORD , PRORLVQ and PRORLVD Intrinsics 
Differential Revision: http://reviews.llvm.org/D16052

llvm-svn: 257594
 2016-01-13 12:39:33 +00:00
Michael Zuckerman 2ddcbcf464 [AVX512] adding PROLQ and PROLD Intrinsics 
Differential Revision: http://reviews.llvm.org/D16048

llvm-svn: 257523
 2016-01-12 21:19:17 +00:00
Igor Breger ea8e8e9f97 AVX512: VPMOVAPS/PD and VPMOVUPS/PD (load) intrinsic implementation. 
Differential Revision: http://reviews.llvm.org/D16042

llvm-svn: 257463
 2016-01-12 10:02:32 +00:00
Michael Zuckerman 885f61c534 [AVX512] add PRORVQ and PRORVD Intrinsic 
Differential Revision:http://reviews.llvm.org/D15955

llvm-svn: 257283
 2016-01-10 09:16:41 +00:00
Michael Zuckerman 3aca221b31 [AVX512] add PSLLW and PSLLV Intrinsic 
Differential Revision: http://reviews.llvm.org/D15889

llvm-svn: 257070
 2016-01-07 16:02:51 +00:00
Michael Zuckerman 354152d590 [AVX512] add PSRAV Intrinsic 
Differential Revision: http://reviews.llvm.org/D15856

llvm-svn: 257063
 2016-01-07 14:42:20 +00:00
Michael Zuckerman 5cbae95916 [AVX512] add PSLLD and PSLLQ Intrinsic 
Differential Revision: http://reviews.llvm.org/D15885

llvm-svn: 256840
 2016-01-05 15:17:39 +00:00
Michael Zuckerman cf0b6db9ef [AVX512] add PSRAD and PSRAQ Intrinsic 
Differential Revision: http://reviews.llvm.org/D15851

llvm-svn: 256754
 2016-01-04 13:45:45 +00:00
Michael Zuckerman 068bc2f219 [AVX512] add PSRLV Intrinsic 
Differential Revision: http://reviews.llvm.org/D15838

llvm-svn: 256747
 2016-01-04 11:39:06 +00:00
Michael Zuckerman 0dc468880d [AVX512] add PSRLQ and PSRLD Intrinsic 
Differential Revision: http://reviews.llvm.org/D15770

llvm-svn: 256673
 2015-12-31 15:22:04 +00:00