Commit Graph

21 Commits

Author SHA1 Message Date
Alex Lorenz 4d026b89da MIR Serialization: Serialize the 'undef' register machine operand flag.
llvm-svn: 241762
2015-07-08 23:58:31 +00:00
Alex Lorenz 495ad87919 MIR Serialization: Serialize the 'killed' register machine operand flag.
llvm-svn: 241734
2015-07-08 21:23:34 +00:00
Alex Lorenz b1f9ce8fc9 MIR Parser: Use source locations for MBB naming errors.
This commit changes the type of the field 'Name' in the struct
'yaml::MachineBasicBlock' from 'std::string' to 'yaml::StringValue'. This change
allows the MIR parser to report errors related to the MBB name with the proper
source locations.

llvm-svn: 241718
2015-07-08 20:22:20 +00:00
Alex Lorenz 900b5cb2ab MIR Printer: Use a module slot tracker to print global address operands. NFC.
This commit adopts the 'ModuleSlotTracker' class, which was surfaced in r240842,
to print the global address operands. This change ensures that the slot tracker
won't have to be recreated every time a global address operand is printed,
making the MIR printing more efficient.

llvm-svn: 241645
2015-07-07 23:27:53 +00:00
Alex Lorenz cbbfd0b194 MIR Serialization: Serialize the 'dead' register machine operand flag.
llvm-svn: 241624
2015-07-07 20:34:53 +00:00
Alex Lorenz cb268d46f0 MIR Serialization: Serialize the implicit register flag.
This commit serializes the implicit flag for the register machine operands. It
introduces two new keywords into the machine instruction syntax: 'implicit' and
'implicit-def'. The 'implicit' keyword is used for the implicit register
operands, and the 'implicit-def' keyword is used for the register operands that
have both the implicit and the define flags set.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10709

llvm-svn: 241519
2015-07-06 23:07:26 +00:00
Alex Lorenz eb5112bfa8 Fix compilation failure introduced in r241093.
llvm-svn: 241096
2015-06-30 18:32:02 +00:00
Alex Lorenz f09df00daa MIR Serialization: Serialize MBB successors.
This commit implements serialization of the machine basic block successors. It
uses a YAML flow sequence that contains strings that have the MBB references.
The MBB references in those strings use the same syntax as the MBB machine
operands in the machine instruction strings.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10699

llvm-svn: 241093
2015-06-30 18:16:42 +00:00
Alex Lorenz 5d26fa835d MIR Printer: extract the code that prints MBB references into a new method. NFC.
This commit enables the MIR printer to reuse the code that prints MBB
references.

llvm-svn: 241087
2015-06-30 18:00:16 +00:00
Alex Lorenz 8f6f4285f3 MIR Serialization: Serialize the register mask machine operands.
This commit implements serialization of the register mask machine
operands. This commit serializes only the call preserved register
masks that are defined by a target, it doesn't serialize arbitrary
register masks.

This commit also extends the TargetRegisterInfo class and TableGen so that
the users of TRI can get the list of all the call preserved register masks and
their names.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10673

llvm-svn: 240966
2015-06-29 16:57:06 +00:00
Alex Lorenz 5d6108e4ed MIR Serialization: Serialize global address machine operands.
This commit serializes the global address machine operands.
This commit doesn't serialize the operand's offset and target
flags, it serializes only the global value reference.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10671

llvm-svn: 240851
2015-06-26 22:56:48 +00:00
Alex Lorenz ec6b26b955 Fix unused variable from r240792.
The variable 'I' wasn't used when assertions were disabled.
This commit ensures that 'I' is used outside of an assert.

llvm-svn: 240797
2015-06-26 17:07:27 +00:00
Alex Lorenz 33f0aef32f MIR Serialization: Serialize machine basic block operands.
This commit serializes machine basic block operands. The
machine basic block operands use the following syntax:

  %bb.<id>[.<name>]

This commit also modifies the YAML representation for the
machine basic blocks - a new, required field 'id' is added
to the MBB YAML mapping.

The id is used to resolve the MBB references to the
actual MBBs. And while the name of the MBB can be
included in a MBB reference, this name isn't used to
resolve MBB references - as it's possible that multiple
MBBs will reference the same BB and thus they will have the
same name. If the name is specified, the parser will verify
that it is equal to the name of the MBB with the specified id.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10608

llvm-svn: 240792
2015-06-26 16:46:11 +00:00
Alex Lorenz 54565cf02b MIR Serialization: Serialize simple MachineRegisterInfo attributes.
This commit serializes the 3 scalar boolean attributes from the
MachineRegisterInfo class: IsSSA, TracksRegLiveness, and
TracksSubRegLiveness. These attributes are serialized as part
of the machine function YAML mapping.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10618

llvm-svn: 240579
2015-06-24 19:56:10 +00:00
Alex Lorenz 12b554e6a7 MIR Serialization: Serialize the null register operands.
This commit serializes the null register machine operands.
It uses the '_' keyword to represent them, but the parser
also allows the '%noreg' named register syntax.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10580

llvm-svn: 240558
2015-06-24 17:34:58 +00:00
Alex Lorenz 240fc1e0aa MIR Serialization: Serialize immediate machine operands.
Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10573

llvm-svn: 240481
2015-06-23 23:42:28 +00:00
Alex Lorenz f3db51de5e MIR Serialization: Serialize physical register machine operands.
This commit introduces functionality that's used to serialize machine operands.
Only the physical register operands are serialized by this commit.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10525

llvm-svn: 240425
2015-06-23 16:35:26 +00:00
Alex Lorenz 8e0a1b4857 MIR Serialization: Serialize machine instruction names.
This commit implements initial machine instruction serialization. It
serializes machine instruction names. The instructions are represented
using a YAML sequence of string literals and are a part of machine
basic block YAML mapping.

This commit introduces a class called 'MIParser' which will be used to
parse the machine instructions and operands.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10481

llvm-svn: 240295
2015-06-22 17:02:30 +00:00
Alex Lorenz 4f093bf1ce MIR Serialization: Serialize the list of machine basic blocks with simple attributes.
This commit implements the initial serialization of machine basic blocks in a
machine function. Only the simple, scalar MBB attributes are serialized. The 
reference to LLVM IR's basic block is preserved when that basic block has a name.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10465

llvm-svn: 240145
2015-06-19 17:43:07 +00:00
Alex Lorenz 5b5f97537f MIR Serialization: Print and parse simple machine function attributes.
This commit serializes the simple, scalar attributes from the 
'MachineFunction' class.

Reviewers: Duncan P. N. Exon Smith

Differential Revision: http://reviews.llvm.org/D10449

llvm-svn: 239790
2015-06-16 00:10:47 +00:00
Alex Lorenz 345c1449c8 MIR Serialization: move the MIR printer out of the MIR printing pass.
This commit decouples the MIR printer and the MIR printing pass so
that it will be possible to move the MIR printer into a separate 
machine IR library later on.

Reviewers: Duncan P. N. Exon Smith
llvm-svn: 239788
2015-06-15 23:52:35 +00:00