Commit Graph

386915 Commits

Author SHA1 Message Date
Alexey Bataev 8af4723c58 [SLP]Try to vectorize tiny trees with shuffled gathers.
If the first tree element is vectorize and the second is gather, it
still might be profitable to vectorize it if the gather node contains
less scalars to vectorize than the original tree node. It might be
profitable to use shuffles.

Differential Revision: https://reviews.llvm.org/D101397
2021-04-28 06:35:31 -07:00
Roman Lebedev aee44fcd34
[NFC][InlineCost] Add tests for D101228 2021-04-28 16:21:14 +03:00
Utkarsh Saxena d7cb2305a1
[clangd] Add SymbolID to LocatedSymbol.
This is useful for running in batch mode.
Getting the SymbolID from via getSymbolInfo may give SymbolID
of a symbol different from that located by LocateSymbolAt (they
have different semantics of choosing the symbol.)

Differential Revision: https://reviews.llvm.org/D101388
2021-04-28 15:05:53 +02:00
Anton Zabaznov f0efc00751 [OpenCL] Introduce new method for validating OpenCL target
Language options are not available when a target is being created,
thus, a new method is introduced. Also, some refactoring is done,
such as removing OpenCL feature macros setting from TargetInfo.

Reviewed By: Anastasia

Differential Revision: https://reviews.llvm.org/D101087
2021-04-28 16:00:02 +03:00
Alexander Belyaev 9a66d33452 [mlir] Fix the postsubmit comments in https://reviews.llvm.org/D101445 2021-04-28 14:58:02 +02:00
Matt Arsenault cea97fc0fc GlobalISel: Relax verification of physical register copy types
This was picking a concrete size for a physical register, and
enforcing exact match on the virtual register's type size. Some
targets add multiple types to a register class, and some are smaller
than the full bit width. For example x86 adds f32 to 128-bit xmm
registers, and AMDGPU adds i16/f16 to 32-bit registers.

It might be better to represent these cases as a copy of the full
register and an extraction of the subpart, but a lot of code assumes
you can directly copy. This will help fix the current usage of the DAG
calling convention infrastructure which is incompatible with how
GlobalISel is now using it.

The API is somewhat cumbersome here, but I just mirrored the existing
functions, except now with LLTs (and allow returning null on failure,
unlike the MVT version). I think the concept of selecting register
classes based on type is flawed to begin with, but I'm trying to keep
this compatible with the existing handling.
2021-04-28 08:45:41 -04:00
David Sherwood 6998f8ae2d [LoopVectorize] Simplify scalar cost calculation in getInstructionCost
This patch simplifies the calculation of certain costs in
getInstructionCost when isScalarAfterVectorization() returns a true value.
There are a few places where we multiply a cost by a number N, i.e.

  unsigned N = isScalarAfterVectorization(I, VF) ? VF.getKnownMinValue() : 1;
  return N * TTI.getArithmeticInstrCost(...

After some investigation it seems that there are only these cases that occur
in practice:

1. VF is a scalar, in which case N = 1.
2. VF is a vector. We can only get here if: a) the instruction is a
GEP/bitcast/PHI with scalar uses, or b) this is an update to an induction
variable that remains scalar.

I have changed the code so that N is assumed to always be 1. For GEPs
the cost is always 0, since this is calculated later on as part of the
load/store cost. PHI nodes are costed separately and were never previously
multiplied by VF. For all other cases I have added an assert that none of
the users needs scalarising, which didn't fire in any unit tests.

Only one test required fixing and I believe the original cost for the scalar
add instruction to have been wrong, since only one copy remains after
vectorisation.

I have also added a new test for the case when a pointer PHI feeds directly
into a store that will be scalarised as we were previously never testing it.

Differential Revision: https://reviews.llvm.org/D99718
2021-04-28 13:41:07 +01:00
Alexey Bataev c835630c25 [OPENMP]Fix PR49098: respect firstprivate of declare target variable.
Need to respect mapping/privatization of declare target variables in the
target regions if explicitly specified by the user.

Differential Revision: https://reviews.llvm.org/D99530
2021-04-28 05:39:10 -07:00
Alexander Belyaev 29dbac0ae2 [mlir] Add folding for tensor inputs and memref.cast in linalg.tiled_loop.
Tensor inputs, if not used in the body of TiledLoopOp, can be removed.
memref::CastOp can be folded into TiledLoopOp as well.

Differential Revision: https://reviews.llvm.org/D101445
2021-04-28 14:36:07 +02:00
Adrian Kuegel 2ea7fb7b1c [MLIR] Add ComplexToStandard conversion pass.
So far, only a conversion for complex::AbsOp is done, but more will be added.

Differential Revision: https://reviews.llvm.org/D101442
2021-04-28 14:17:46 +02:00
Tres Popp d1e08b124c Revert "tsan: refactor fork handling"
This reverts commit e1021dd1fd.
2021-04-28 14:08:33 +02:00
Sander de Smalen 584e9b6e4b [LV] Calculate max feasible scalable VF.
This patch also refactors the way the feasible max VF is calculated,
although this is NFC for fixed-width vectors.

After this change scalable VF hints are no longer truncated/clamped
to a shorter scalable VF, nor does it drop the 'scalable flag' from
the suggested VF to vectorize with a similar VF that is fixed.

Instead, the hint is ignored which means the vectorizer is free
to find a more suitable VF, using the CostModel to determine the
best possible VF.

Reviewed By: c-rhodes, fhahn

Differential Revision: https://reviews.llvm.org/D98509
2021-04-28 12:30:00 +01:00
Alex Richardson 79030a22cc [llvm-objdump] Fix dumping dynamic relative relocations for SHT_REL
Previously printing R_386_RELATIVE relocations would trigger
`error: can't read an entry at 0x40: it goes past the end of the section (0x40)`
I found this while writing a test case for LLD (D100490).
This also includes some minor cleanup in the elf-dynamic-relcos.test
llvm-objdump test based on the newly added test.

Reviewed By: jhenderson, MaskRay

Differential Revision: https://reviews.llvm.org/D100489
2021-04-28 12:23:00 +01:00
Alex Richardson aed66d2787 [ELF] Update URL for MIPS TLS wiki page
The original page no longer works, so use a web.archive.org link instead.

Reviewed By: atanasyan

Differential Revision: https://reviews.llvm.org/D100949
2021-04-28 12:19:19 +01:00
Alex Richardson 777ca513c8 [builtins] Fix ABI-incompatibility with GCC for floating-point compare
While implementing support for the float128 routines on x86_64, I noticed
that __builtin_isinf() was returning true for 128-bit floating point
values that are not infinite when compiling with GCC and using the
compiler-rt implementation of the soft-float comparison functions.
After stepping through the assembly, I discovered that this was caused by
GCC assuming a sign-extended 64-bit -1 result, but our implementation
returns an enum (which then has zeroes in the upper bits) and therefore
causes the comparison with -1 to fail.

Fix this by using a CMP_RESULT typedef and add a static_assert that it
matches the GCC soft-float comparison return type when compiling with GCC
(GCC has a __libgcc_cmp_return__ mode that can be used for this purpose).

Also move the 3 copies of the same code to a shared .inc file.

Reviewed By: compnerd

Differential Revision: https://reviews.llvm.org/D98205
2021-04-28 12:19:19 +01:00
Alex Richardson 9692811b26 [update_(llc_)test_checks.py] Support pre-processing commands
This has been rather useful in our downstream CHERI target where we want
to run tests both with addrspace(0) and addrspace(200) pointers.
With this patch we can prefix the opt command with
`sed -e 's/addrspace(200)/addrspace(0)/g' -e 's/-A200-P200-G200//g'` to
test both cases using the same IR input.

Reviewed By: jdoerfert

Differential Revision: https://reviews.llvm.org/D95137
2021-04-28 12:19:19 +01:00
David Spickett d0c521da3f [lldb] Correct format enum comment (NFC)
'.' is used for unprintable chars (see NON_PRINTABLE_CHAR).
2021-04-28 12:17:03 +01:00
Tres Popp efce19c3b0 Revert "[loop-idiom] Hoist loop memcpys to loop preheader"
This reverts commit 75d6b8bb40.

The reasoning is mentioned in https://reviews.llvm.org/D97667
2021-04-28 13:16:34 +02:00
Roman Lebedev a95a5dc5ab
[NFC][SimplifyCFG] Move sink-common-code.ll into X86
There are post-commit notest for e4c61d5 that suggest
the test is failing on certain bots. It looks like
the code there isn't being moved, which suggests
cost-model involvement, which suggests that we need to
hardcode the target triple.

Hopefully this helps?
2021-04-28 14:10:25 +03:00
Roman Lebedev b01f499861
[NFC][Verifier] Split token1.ll into two, assert/non-assert versions 2021-04-28 13:58:38 +03:00
Lorenzo Chelini 41b86d8ad9 [mlir] Fix typos (NFC) 2021-04-28 12:51:32 +02:00
Kerry McLaughlin 9cc217ab36 [LoopVectorize] Prevent multiple Phis being generated with in-order reductions
When using the -enable-strict-reductions flag where UF>1 we generate multiple
Phi nodes, though only one of these is used as an input to the vector.reduce.fadd
intrinsics. The unused Phi nodes are removed later by instcombine.

This patch changes widenPHIInstruction/fixReduction to only generate
one Phi, and adds an additional test for unrolling to strict-fadd.ll

Reviewed By: david-arm

Differential Revision: https://reviews.llvm.org/D100570
2021-04-28 11:29:01 +01:00
Nathan James 858a9583e1
[clang-query] Add check to prevent setting srcloc when no introspection is available.
Checks if introspection support is available set output kind parser.
If it isn't present the auto complete will not suggest `srcloc` and an error query will be reported if a user tries to access it.

Reviewed By: steveire

Differential Revision: https://reviews.llvm.org/D101365
2021-04-28 11:21:35 +01:00
Jingu Kang 3ea4bc7842 [IRCE] Add tests for conservative bound check
Prevent cases in which the start value of IV is bigger than bound for
increasing.

Prevent cases in which the start value of IV is smaller than bound for
decreasing.

Differential Revision: https://reviews.llvm.org/D101174
2021-04-28 11:14:21 +01:00
Benjamin Kramer 7e5682ee62 [ADT] Make TrackingStatistic's ctor constexpr
This lets clang diagnose unused statistics, so remove them.
2021-04-28 12:00:17 +02:00
Frederik Gossen dca5361035 [MLIR][Shape] Concretize broadcast result type if possible
As a canonicalization, infer the resulting shape rank if possible.

Differential Revision: https://reviews.llvm.org/D101377
2021-04-28 11:58:32 +02:00
Hans Wennborg 2d37f2115d Try to fix clang/test/Driver/cl-options.c on non-x86 hosts
The /QIntel-jcc-erratum flag only works when targeting x86,
so pass --target to the driver to do that also on non-x86 hosts.
2021-04-28 11:57:09 +02:00
Frederik Gossen cb393f4c99 [MLIR][Shape] Canonicalize casted extent tensor operands
Both, `shape.broadcast` and `shape.cstr_broadcastable` accept dynamic and static
extent tensors. If their operands are casted, we can use the original value
instead.

Differential Revision: https://reviews.llvm.org/D101376
2021-04-28 11:51:58 +02:00
Qiu Chaofan d5c2492455 [PowerPC] Fix SELECT_CC with i64 operand on PPC32
This patch fixes the infinite loop in legalization of PPC32 SELECT_CC
with 64-bit operand.
2021-04-28 17:48:33 +08:00
Stephen Tozer b622df3c93 [DebugInfo] Drop DBG_VALUE_LISTs with an excessive number of debug operands
This patch fixes a crash in LiveDebugVariables for inputs where a
DBG_VALUE_LIST had 64 or more debug operands. This was triggering an
assert, which was added under the assumption that only bad CodeGen would
result in such a limit being hit, but relatively simple source files
that result in these incredibly long debug values have been found, so
this assert has been changed to a condition that drops the debug value
if it is not met.

Differential Revision: https://reviews.llvm.org/D101373
2021-04-28 10:39:02 +01:00
Hans Wennborg 789549bea4 [clang-cl] Map /QIntel-jcc-erratum to -mbranches-within-32B-boundaries 2021-04-28 11:10:08 +02:00
Frederik Gossen 3e037f8f0e [MLIR][Shape] Derive more concrete type for `shape.shape_of`
Also create all extent tensor constants with const_shape op.

Differential Revision: https://reviews.llvm.org/D99197
2021-04-28 10:50:53 +02:00
Joe Ellis 1eb81f8309 [AArch64] Add missing UINT_TO_FP promotions for v16i8
Differential Revision: https://reviews.llvm.org/D101042
2021-04-28 08:49:15 +00:00
Wang, Pengfei f69adfb87f [X86][AMX][NFC] Add more comments and remove unnecessary check found by Clocwork 2021-04-28 16:35:17 +08:00
Hans Wennborg e9fe387ac5 Require asserts for llvm/test/Verifier/token1.ll
The test expects and assert, and that only works in asserts-enabled builds.
2021-04-28 09:58:36 +02:00
Diana Picus a58f362fb5 [flang] Remove interfaces for Character[Min|Max][Val|Loc]. NFC
MAXVAL, MINVAL, MAXLOC and MINLOC are already implemented in extrema.cpp
as MaxvalCharacter, MinvalDim etc. Therefore, the interfaces in
character.h are redundant and should be removed to avoid confusion.

Differential Revision: https://reviews.llvm.org/D101354
2021-04-28 07:58:06 +00:00
Hsiangkai Wang b358a2be52 [RISCV] Remove riscv32 test cases for vector intrinsics. 2021-04-28 15:54:25 +08:00
Tobias Gysi 3071107cf0 [mlir][Python][Linalg] Fixing typos (NFC). 2021-04-28 07:38:36 +00:00
Petr Hosek eea5cbc858 [libcxx] Fix the libc++abi header path
This addresses an issue introduced in 775e55462a.
2021-04-27 23:30:53 -07:00
Petr Hosek 36430d44ed [Driver] Use normalized triples for per-target runtimes
This is a partial revert of b4537c3f51
based on the discussion in https://reviews.llvm.org/D101194. Rather
than using the getMultiarchTriple, we use the getTripleString.
2021-04-27 22:31:36 -07:00
Ranjith Kumar H b65472d66d [MLIR] Add and propagate section attribute for LLVM_GlobalOp
Add a section attribute to LLVM_GlobalOp, during module translation attribute value is propagated to llvm

Reviewed By: sgrechanik, ftynse, mehdi_amini

Differential Revision: https://reviews.llvm.org/D100947
2021-04-28 04:15:49 +00:00
RamNalamothu 63cfab4f40 [NFC] Refactor how CFI section types are represented in AsmPrinter
In terms of readability, the `enum CFIMoveType` didn't better document what it
intends to convey i.e. the type of CFI section that gets emitted.

Reviewed By: dblaikie, MaskRay

Differential Revision: https://reviews.llvm.org/D76519
2021-04-28 09:04:04 +05:30
Jennifer Chukwu c5c7a493ef Fixed Typos
Fixed typo errors in release notes of Polly 13

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D100588
2021-04-28 08:55:03 +05:30
Jordan Rupprecht 44e2247dcd [lldb] Fix DataLayout reference after 0f1137ba79 2021-04-27 20:07:09 -07:00
Nico Weber 0f1137ba79 [clang/Basic] Make TargetInfo.h not use DataLayout again
Reverts parts of https://reviews.llvm.org/D17183, but keeps the
resetDataLayout() API and adds an assert that checks that datalayout string and
user label prefix are in sync.

Approach 1 in https://reviews.llvm.org/D17183#2653279
Reduces number of TUs build for 'clang-format' from 689 to 575.

I also implemented approach 2 in D100764. If someone feels motivated
to make us use DataLayout more, it's easy to revert this change here
and go with D100764 instead. I don't plan on doing more work in this
area though, so I prefer going with the smaller, more self-consistent change.

Differential Revision: https://reviews.llvm.org/D100776
2021-04-27 22:26:10 -04:00
Nico Weber c35fadceab [gn build] (manually) port 82d3c0759f 2021-04-27 22:25:55 -04:00
Mike Urbach 63d16d06f5 [mlir] Support setting operand values in C and Python APIs.
This adds `mlirOperationSetOperand` to the IR C API, similar to the
function to get an operand.

In the Python API, this adds `operands[index] = value` syntax, similar
to the syntax to get an operand with `operands[index]`.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D101398
2021-04-27 20:17:47 -06:00
Mike Urbach 3f3d1c901d [MLIR][Python] Add capsule methods for pybind11 to PyValue.
Add the `getCapsule()` and `createFromCapsule()` methods to the
PyValue class, as well as the necessary interoperability.

Reviewed By: stellaraccident

Differential Revision: https://reviews.llvm.org/D101090
2021-04-27 20:14:16 -06:00
Jim Radford e8b3a97ff7 [CMake][llvm] add missing include to LLVMCheckLinkerFlag
Differential Revision: https://reviews.llvm.org/D101417
2021-04-27 18:48:52 -07:00
Vitaly Buka b1a77e465e [scudo] Enable arm32 arch 2021-04-27 18:35:45 -07:00