e542972828
Fix CellSPU vector shuffles, again.
...
Some cases of lowering to rotate were miscompiled.
llvm-svn: 113355
2010-09-08 11:53:38 +00:00
65b48b5dfc
zap dead code.
...
llvm-svn: 113073
2010-09-04 18:12:00 +00:00
8fd07c026e
Zap dead code.
...
llvm-svn: 112955
2010-09-03 12:13:18 +00:00
1e616572d9
Fix lowering of INSERT_VECTOR_ELT in SPU.
...
The IDX was treated as byte index, not element index.
llvm-svn: 112422
2010-08-29 12:41:50 +00:00
6a77066913
Simplify eliminateFrameIndex() interface back down now that PEI doesn't need
...
to try to re-use scavenged frame index reference registers. rdar://8277890
llvm-svn: 112241
2010-08-26 23:32:16 +00:00
bf80d28a74
zap dead code
...
llvm-svn: 112073
2010-08-25 19:00:00 +00:00
7e25bc4145
Fix SPU BE to use all the available return registers.
...
llc used to assert on the added testcase.
llvm-svn: 111911
2010-08-24 11:50:48 +00:00
8f3e3ba5ff
Remove some dead code from SPU BE that remained
...
from 64bit vector support.
llvm-svn: 111910
2010-08-24 11:05:51 +00:00
e60b5161d1
Fix a bug with insertelement on SPU.
...
The previous algorithm in LowerVECTOR_SHUFFLE
didn't check all requirements for "monotonic" shuffles.
llvm-svn: 111361
2010-08-18 10:20:29 +00:00
ab49360f59
Remove all traces of v2[i,f]32 on SPU.
...
The "half vectors" are now widened to full size by the legalizer.
The only exception is in parameter passing, where half vectors are
expanded. This causes changes to some dejagnu tests.
llvm-svn: 111360
2010-08-18 10:04:39 +00:00
f3984d1ef6
Change SPU C calling convention to match that described in
...
"SPU Application Binary Interface Specification, v1.9" by
IBM.
Specifically: use r3-r74 to pass parameters and the return value.
llvm-svn: 111358
2010-08-18 09:50:30 +00:00
72a364c107
fix emacs language spec's, patch by Edmund Grimley-Evans!
...
llvm-svn: 111241
2010-08-17 16:20:04 +00:00
999da1f3a0
Have SPU handle halfvec stores aligned by 8 bytes.
...
llvm-svn: 110576
2010-08-09 16:33:00 +00:00
8b2f70125f
Make SPU backend handle insertelement and
...
store for "half vectors"
llvm-svn: 110198
2010-08-04 13:59:48 +00:00
77558b7d13
More SPU v2f32 stuff added: insertelement and shuffle.
...
llvm-svn: 110038
2010-08-02 11:22:10 +00:00
68b3886678
Add preliminary v2f32 support for SPU. Like with v2i32, we just
...
duplicate the instructions and operate on half vectors.
Also reorder code in SPUInstrInfo.td for better coherency.
llvm-svn: 110037
2010-08-02 10:25:47 +00:00
622f8eb981
Add preliminary v2i32 support for SPU backend. As there are no
...
such registers in SPU, this support boils down to "emulating"
them by duplicating instructions on the general purpose registers.
This adds the most basic operations on v2i32: passing parameters,
addition, subtraction, multiplication and a few others.
llvm-svn: 110035
2010-08-02 08:54:39 +00:00
8289f78569
Remove the isMoveInstr() hook.
...
llvm-svn: 108567
2010-07-16 22:35:46 +00:00
499f797cdd
Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and
...
thus is a much more meaningful name.
llvm-svn: 108563
2010-07-16 22:20:36 +00:00
92d8998348
Don't pass StringRef by reference.
...
llvm-svn: 108366
2010-07-14 22:38:02 +00:00
0961c55161
RISC architectures get their memory operand folding for free.
...
The only folding these load/store architectures can do is converting COPY into a
load or store, and the target independent part of foldMemoryOperand already
knows how to do that.
llvm-svn: 108099
2010-07-11 19:19:13 +00:00
1dba6814c9
Replace copyRegToReg with copyPhysReg for CellSPU.
...
llvm-svn: 108084
2010-07-11 07:31:03 +00:00
d799ea52cd
Switch SPU calling convention (function arguments)
...
to a Tablegen implementation.
llvm-svn: 107913
2010-07-08 21:15:22 +00:00
fe7532a308
Split the SDValue out of OutputArg so that SelectionDAG-independent
...
code can do calling-convention queries. This obviates OutputArgReg.
llvm-svn: 107786
2010-07-07 15:54:55 +00:00
a3ca21b228
Propagate debug loc.
...
llvm-svn: 107710
2010-07-06 22:08:15 +00:00
d5ac287140
Remove some unused/redundant code.
...
llvm-svn: 107622
2010-07-05 18:40:09 +00:00
0664a67fe1
Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false.
...
llvm-svn: 107550
2010-07-03 00:40:23 +00:00
6d28e73acc
Remove initialized but otherwise unused variables.
...
llvm-svn: 107127
2010-06-29 11:22:26 +00:00
ce97d55ad9
The hasMemory argument is irrelevant to how the argument
...
for an "i" constraint should get lowered; PR 6309. While
this argument was passed around a lot, this is the only
place it was used, so it goes away from a lot of other
places.
llvm-svn: 106893
2010-06-25 21:55:36 +00:00
74b5e3e0ae
remove some dead variables reported by clang++
...
llvm-svn: 106428
2010-06-21 17:20:18 +00:00
0ab5a02579
Mark the SPU 'lr' instruction to never have side effects.
...
This allows the fast regiser allocator to remove redundant
register moves.
Update a set of tests that depend on the register allocator
to be linear scan.
llvm-svn: 106420
2010-06-21 15:08:16 +00:00
d7f50c118a
Fix the lowering of VECTOR_SHUFFLE on SPU to handle splats.
...
llvm-svn: 106419
2010-06-21 14:42:19 +00:00
6f58190f6f
Fix lowering of VECTOR_SHUFFLE on SPU. Old algorithm
...
used to choke llc with the attached test.
llvm-svn: 106411
2010-06-21 10:17:36 +00:00
f1d8304fe3
Eliminate unnecessary uses of getZExtValue().
...
llvm-svn: 106279
2010-06-18 14:22:04 +00:00
0125b6410a
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
...
addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.
This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.
llvm-svn: 106243
2010-06-17 22:43:56 +00:00
5e0862f7f5
Fix SPU to cope with vector insertelement to an undef position.
...
We default to inserting to lane 0.
llvm-svn: 105722
2010-06-09 09:58:17 +00:00
056113a211
Handle loading from/storing to undef pointers on SPU by inserting a
...
random load/store, rather than crashing llc.
llvm-svn: 105710
2010-06-09 08:29:41 +00:00
6c40caf729
Flag SPU's function call sequence together.
...
Discussed here:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2010-June/032107.html
llvm-svn: 105601
2010-06-08 07:55:16 +00:00
ef2b6ce00a
cleanup
...
llvm-svn: 105322
2010-06-02 13:53:17 +00:00
8916358f97
Fix handling of 'load' nodes.
...
llvm-svn: 105269
2010-06-01 13:34:47 +00:00
738e920edf
Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace.
...
llvm-svn: 104147
2010-05-19 20:19:50 +00:00
95f6ebcb37
Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
...
the variable actually tracks.
N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.
llvm-svn: 103802
2010-05-14 21:14:32 +00:00
bb919dfb6b
Implement a bunch more TargetSelectionDAGInfo infrastructure.
...
Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.
llvm-svn: 103481
2010-05-11 17:31:57 +00:00
9dd3ef8d01
Make SPU backend not assert on jump tables.
...
llvm-svn: 103466
2010-05-11 11:00:02 +00:00
92ea401d8f
Fix encoding of 'sf' and 'sfh' instructions.
...
llvm-svn: 103399
2010-05-10 08:13:49 +00:00
b3c5c4611c
Testing svn access with a note added to documentation.
...
llvm-svn: 103271
2010-05-07 18:06:28 +00:00
779c69bbc5
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
...
doesn't have to guess.
llvm-svn: 103194
2010-05-06 20:33:48 +00:00
efb126a665
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
...
llvm-svn: 103193
2010-05-06 19:06:44 +00:00
0185047b3f
"on the rare occasion the SPU BE produces illegal assembly - it tries to emit an add instruction of the form 'a reg, reg, imm'."
...
Patch by Kalle Raiskila!
llvm-svn: 103021
2010-05-04 17:58:46 +00:00
2094488d81
fix some inconsistent line endings, patch by Jakub Staszak!
...
llvm-svn: 102852
2010-05-01 17:36:49 +00:00
4158a0ff6b
Implement -disable-non-leaf-fp-elim which disable frame pointer elimination
...
optimization for non-leaf functions. This will be hooked up to gcc's
-momit-leaf-frame-pointer option. rdar://7886181
llvm-svn: 101984
2010-04-21 03:18:23 +00:00
38c1a1a247
teach cellspu how to return i8 and i16 from calls,
...
patch by Kalle Raiskila!
llvm-svn: 101875
2010-04-20 05:36:09 +00:00
7d62e33291
Make processor FUs unique for given itinerary. This extends the limit of 32
...
FU per CPU arch to 32 per intinerary allowing precise modelling of quite
complex pipelines in the future.
llvm-svn: 101754
2010-04-18 20:31:01 +00:00
20e094c711
Use cast instead of dyn_cast when assuming success.
...
llvm-svn: 101636
2010-04-17 15:31:16 +00:00
21cea8ac2e
Use const qualifiers with TargetLowering. This eliminates several
...
const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
llvm-svn: 101635
2010-04-17 15:26:15 +00:00
31ae586c74
Move per-function state out of TargetLowering subclasses and into
...
MachineFunctionInfo subclasses.
llvm-svn: 101634
2010-04-17 14:41:14 +00:00
ca0a53ac52
Name these stub files consistently with the SPU and PPC targets' conventions.
...
Also rename the classes appropriately. The CMake build already used these
names.
llvm-svn: 101631
2010-04-17 08:50:29 +00:00
9becdddc49
Add skeleton target-specific SelectionDAGInfo files.
...
llvm-svn: 101564
2010-04-16 23:04:22 +00:00
bcaf681cde
Add const qualifiers to CodeGen's use of LLVM IR constructs.
...
llvm-svn: 101334
2010-04-15 01:51:59 +00:00
1ef9826ff8
"On SPU, variables in the .bss section that are allocated with the .lcomm directive are not aligned on 16 byte boundaries. This causes misaligned loads, as the generated assembly assumes this "default" alignment.
...
this patch disables .lcomm in favour of '.local .comm'
Patch by Kalle Raisklia!
llvm-svn: 100875
2010-04-09 18:27:03 +00:00
a6769269f3
Use twines to simplify calls to report_fatal_error. For code size and readability.
...
llvm-svn: 100756
2010-04-08 10:44:28 +00:00
2104b8d36e
rename llvm::llvm_report_error -> llvm::report_fatal_error
...
llvm-svn: 100709
2010-04-07 22:58:41 +00:00
5109d3e55d
add newlines at end of files.
...
llvm-svn: 100706
2010-04-07 22:54:55 +00:00
82ff9af068
remove the MMI pointer from MachineFrameInfo.
...
llvm-svn: 100415
2010-04-05 05:57:52 +00:00
d20699bc87
Momentous day: remove the "O" member from AsmPrinter. Now all
...
"asm printering" happens through MCStreamer. This also
Streamerizes PIC16 debug info, which escaped my attention.
This removes a leak from LLVMTargetMachine of the 'legacy'
output stream.
llvm-svn: 100327
2010-04-04 08:18:47 +00:00
3d86cd6710
convert the non-MCInstPrinter'ized EmitInstruction
...
implementations to use EmitRawText instead of writing
directly to "O".
llvm-svn: 100318
2010-04-04 06:12:20 +00:00
3bb09768cb
fix PrintAsmOperand and PrintAsmMemoryOperand to pass down
...
raw_ostream to print to.
llvm-svn: 100313
2010-04-04 05:29:35 +00:00
76c564b1bb
change a ton of code to not implicitly use the "O" raw_ostream
...
member of AsmPrinter. Instead, pass it in explicitly.
llvm-svn: 100306
2010-04-04 04:47:45 +00:00
6f306d7d30
use DebugLoc default ctor instead of DebugLoc::getUnknownLoc()
...
llvm-svn: 100214
2010-04-02 20:16:16 +00:00
4244d12769
Teach AnalyzeBranch, RemoveBranch and the branch
...
folder to be tolerant of debug info following the
branch(es) at the end of a block.
llvm-svn: 100168
2010-04-02 01:38:09 +00:00
2788f797ca
Make isInt?? and isUint?? template specializations of the generic versions. This
...
makes calls a little bit more consistent and allows easy removal of the
specializations in the future. Convert all callers to the templated functions.
llvm-svn: 99838
2010-03-29 21:13:41 +00:00
f633ba8213
Remove a bunch of integer width predicate functions in favor of MathExtras.
...
Most of these were unused, some of them were wrong and unused (isS16Constant<short>,
isS10Constant<short>).
llvm-svn: 99827
2010-03-29 19:07:58 +00:00
f60c556b91
From Kalle Raiskila:
...
"the bigstack patch for SPU, with testcase. It is essentially the patch committed as 97091, and reverted as 97099, but with the following additions:
-in vararg handling, registers are marked to be live, to not confuse the register scavenger
-function prologue and epilogue are not emitted, if the stack size is 16. 16 means it is empty - there is only the register scavenger emergency spill slot, which is not used as there is no stack."
llvm-svn: 99819
2010-03-29 17:38:47 +00:00
240154e633
fix a typo, bitconvert from node to itself isn't valid.
...
llvm-svn: 99755
2010-03-28 08:36:45 +00:00
e549d9b1f2
stop using vnot_conv
...
llvm-svn: 99750
2010-03-28 07:48:17 +00:00
0433699ef0
set SDNPVariadic on nodes throughout the rest of the targets that
...
need them.
llvm-svn: 98937
2010-03-19 05:33:51 +00:00
e5ac9382ce
remove some damaged sign extend patterns that can never match.
...
llvm-svn: 98932
2010-03-19 04:53:47 +00:00
eb319f36b9
do some serious surgery on CellSPU to get it back into a world
...
where it uses types consistently.
llvm-svn: 98532
2010-03-15 05:53:47 +00:00
6e52e9db31
get MMI out of the label uniquing business, just go to MCContext
...
to get unique assembler temporary labels.
llvm-svn: 98489
2010-03-14 08:36:50 +00:00
d5e8d9f29a
Now that DBG_LABEL is updated, we can finally make MachineMove
...
contain an MCSymbol instead of a label index.
llvm-svn: 98482
2010-03-14 08:12:40 +00:00
c26f44fb07
change the DBG_LABEL MachineInstr to always be created
...
with an MCSymbol instead of an immediate.
llvm-svn: 98481
2010-03-14 07:56:48 +00:00
29bdac4928
eliminate the now-unneeded context argument of MBB::getSymbol()
...
llvm-svn: 98451
2010-03-13 21:04:28 +00:00
e468f88b26
rearrange MCContext ownership. Before LLVMTargetMachine created it
...
and passing off ownership to AsmPrinter. Now MachineModuleInfo
creates it and owns it by value. This allows us to use MCSymbols
more consistently throughout the rest of the code generator, and
simplifies a bit of code. This also allows MachineFunction to
keep an MCContext reference handy, and cleans up the TargetRegistry
interfaces for AsmPrinters.
llvm-svn: 98450
2010-03-13 20:55:24 +00:00
9eeda13a52
Fix LLVM build when the user specifies CPPFLAGS on the make command line.
...
llvm-svn: 98394
2010-03-12 21:42:14 +00:00
0b822ab447
inline GetGlobalValueSymbol into the rest its callers and
...
remove it.
llvm-svn: 98390
2010-03-12 21:19:23 +00:00
fae913adf8
Change the Value argument to eliminateFrameIndex to a type-tagged value. This
...
is preparatory to having PEI's scavenged frame index value reuse logic
properly distinguish types of frame values (e.g., whether the value is
stack-pointer relative or frame-pointer relative).
No functionality change.
llvm-svn: 98086
2010-03-09 21:45:49 +00:00
e77f993262
disambiguate some types, add a fixme about some
...
inconsistent intrinsics.
llvm-svn: 97959
2010-03-08 18:59:49 +00:00
f0692603d5
fix bss section printing for cell, patch by Kalle Raiskila!
...
llvm-svn: 97814
2010-03-05 18:55:36 +00:00
f98f124a73
Sink InstructionSelect() out of each target into SDISel, and rename it
...
DoInstructionSelection. Inline "SelectRoot" into it from DAGISelHeader.
Sink some other stuff out of DAGISelHeader into SDISel.
Eliminate the various 'Indent' stuff from various targets, which dates
to when isel was recursive.
17 files changed, 114 insertions(+), 430 deletions(-)
llvm-svn: 97555
2010-03-02 06:34:30 +00:00
78c5b7a76d
Remove dead parameter passing.
...
llvm-svn: 97536
2010-03-02 01:55:18 +00:00
4a99c34873
Revert this patch for the time being. Needs more testing.
...
llvm-svn: 97099
2010-02-25 02:32:54 +00:00
0ab0ad93bd
Large stack frame patch for the CellSPU: handle stack frames that exceed 8176
...
(511*16) bytes register displacement (D-form).
NOTE: This is a potential headache, given the SPU's local core limitations,
allowing the software developer to commit stack overrun suicide unknowingly.
Also, large SPU stack frames will cause code size explosion. But, one presumes
that the software developer knows what they're doing...
Contributed by Kalle.Raiskila@nokia.com , edited slightly before commit.
llvm-svn: 97091
2010-02-25 01:53:17 +00:00
89f6ec462d
disable two patterns that are using non-sensical result pattern types.
...
llvm-svn: 96903
2010-02-23 07:21:15 +00:00
c51b7198a9
reapply my cellspu changes with a fix to not break the old isel.
...
llvm-svn: 96885
2010-02-23 05:30:43 +00:00
7e5c4906dd
Revert 96854, 96852, and 96849, unbreaking test/CodeGen/CellSPU/i64ops.ll.
...
llvm-svn: 96871
2010-02-23 02:33:29 +00:00
22bc26e4cf
fix hte last cellspu failure.
...
llvm-svn: 96854
2010-02-23 01:37:39 +00:00
807666783c
hack around more crimes in instruction selection.
...
llvm-svn: 96852
2010-02-23 01:33:17 +00:00
fbbe2617dc
the cell backend is making all sorts of unsafe and incorrect assumptions
...
about ownership and update policies. It isn't clear why it is doing all
this lowering at isel time instead of in legalize. This fixes fcmp64.ll
llvm-svn: 96849
2010-02-23 01:20:00 +00:00
ab663a0bfe
Move TLOF implementations to libCodegen to resolve layering violation.
...
llvm-svn: 96288
2010-02-15 22:37:53 +00:00
cfa68983e8
Remove an assumption of default arguments. This is in anticipation of a
...
change to SelectionDAG build APIs.
llvm-svn: 96232
2010-02-15 16:55:58 +00:00
Kalle Raiskila