Commit Graph

139449 Commits

Author SHA1 Message Date
Tim Northover ad0acca544 GlobalISel: allow G_GLOBAL_VALUEs in AArch64 legalization.
llvm-svn: 283808
2016-10-10 21:49:53 +00:00
Tim Northover 2fda4b08ae GlobalISel: support selecting G_GEP instructions.
They're basically just an alias for G_ADD on AArch64.

llvm-svn: 283807
2016-10-10 21:49:49 +00:00
Tim Northover 4edc60d785 GlobalISel: support selecting constants on AArch64.
llvm-svn: 283806
2016-10-10 21:49:42 +00:00
Dehao Chen 84287abf43 Rename isHotFunction/isColdFunction to isFunctionEntryHot/isFunctionEntryCold. (NFC)
This is in preparation for https://reviews.llvm.org/D25048

llvm-svn: 283805
2016-10-10 21:47:28 +00:00
Zachary Turner 5f78a9723f Revert "Disallow ArrayRef assignment from temporaries."
This reverts commit r283798, as it causes static asserts on
MSVC 2015 with the following errors:

ArrayRefTest.cpp(38): error C2338: Assigning from single prvalue element
ArrayRefTest.cpp(41): error C2338: Assigning from single xvalue element
ArrayRefTest.cpp(47): error C2338: Assigning from an initializer list

llvm-svn: 283803
2016-10-10 21:36:23 +00:00
Zachary Turner edce6e9126 Rename llvm::apply -> llvm::apply_tuple.
llvm::cl already has a function called llvm::apply() so this is
causing an ODR violation.  The STLExtras version should win the
vote on which one gets to be called apply() since it is named
after the equivalent STL function, but since renaiming the cl
version is more difficult, let's do this for now to get the
bots green.

llvm-svn: 283800
2016-10-10 21:24:34 +00:00
Jordan Rose d77cee3f54 Disallow ArrayRef assignment from temporaries.
Without this, the following statements will create ArrayRefs that
refer to temporary storage that goes out of scope by the end of the
line:

  someArrayRef = getSingleElement();
  someArrayRef = {elem1, elem2};

Note that the constructor still has this problem:

  ArrayRef<Element> someArrayRef = getSingleElement();
  ArrayRef<Element> someArrayRef = {elem1, elem2};

but that's a little harder to get rid of because we want to be able to
use this in calls:

  takesArrayRef(getSingleElement());
  takesArrayRef({elem1, elem2});

Part of rdar://problem/16375365. Reviewed by Duncan Exon Smith.

llvm-svn: 283798
2016-10-10 20:57:33 +00:00
Hal Finkel fcd2421667 [SelectionDAGBuilder] Support llvm.flt.rounds on targets where i32 is not legal
Add integer expansion for FLT_ROUNDS_ for targets where i32 is not a legal
type.

Patch by Edward Jones, thanks!

Differential Revision: https://reviews.llvm.org/D24459

llvm-svn: 283797
2016-10-10 20:45:15 +00:00
Justin Lebar 0705d8e98b [ADT] Use () instead of {} in an attempt to work around MSVC 2012 ICEs.
llvm-svn: 283796
2016-10-10 20:18:02 +00:00
Justin Lebar 4765c01981 [ADT] Don't use make_pointee_iterator in IteratorTest.
llvm-svn: 283794
2016-10-10 19:56:52 +00:00
Mehdi Amini f9ff04c56a Use StringRef in TableGen generated Intrinsics.gen file (NFC)
llvm-svn: 283792
2016-10-10 19:31:09 +00:00
Justin Lebar 730f24048c [ADT] Remove make_pointe{e,r}_iterator, because it seems to crash MSVC 2015.
llvm-svn: 283791
2016-10-10 19:29:37 +00:00
Adrian Prantl 3bfe1093df Teach llvm::StripDebugInfo() about global variable !dbg attachments.
This is a regression introduced by the global variable ownership
reversal performed in r281284.

rdar://problem/28448075

llvm-svn: 283784
2016-10-10 17:53:33 +00:00
Justin Lebar 5789dfafdd [ADT] Attempt to fix MSVC 2015 ICE via judicious addition of std::decay to make_pointe{r,e}_iterator.
llvm-svn: 283783
2016-10-10 17:18:45 +00:00
Mehdi Amini ed76706008 Update documentation after r283671 ("Turn cl::values() (for enum) from a vararg function to using C++ variadic template")
llvm-svn: 283782
2016-10-10 17:13:14 +00:00
Zachary Turner 3174bde6f4 Add llvm::apply to STLExtras.
This is equivalent to the C++14 std::apply().  Since we are not
using C++14 yet, this allows us to still make use of apply anyway.

Differential revision: https://reviews.llvm.org/D25100

llvm-svn: 283779
2016-10-10 16:44:09 +00:00
Justin Lebar 611c5c225a Use unique_ptr in LLVMContextImpl's constant maps.
Reviewers: timshen

Subscribers: cfe-commits

Differential Revision: https://reviews.llvm.org/D25419

llvm-svn: 283767
2016-10-10 16:26:13 +00:00
Justin Lebar 1109197156 [ADT] Add make_pointe{e,r}_iterator.
Reviewers: timshen

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25418

llvm-svn: 283765
2016-10-10 16:26:03 +00:00
Justin Lebar 1b78217662 [ADT] Let MapVector handle non-copyable values.
Summary: The keys must still be copyable, because we store two copies of them.

Reviewers: timshen

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25404

llvm-svn: 283764
2016-10-10 16:25:59 +00:00
Alexandros Lamprineas 20e9ddba73 [ARM] Fix invalid VLDM/VSTM access when targeting Big Endian with NEON
The instructions VLDM/VSTM can only access word-aligned memory
locations and produce alignment fault if the condition is not met.

The compiler currently generates VLDM/VSTM for v2f64 load/store
regardless the alignment of the memory access. Instead, if a v2f64
load/store is not word-aligned, the compiler should generate
VLD1/VST1. For each non double-word-aligned VLD1/VST1, a VREV
instruction should be generated when targeting Big Endian.

Differential Revision: https://reviews.llvm.org/D25281

llvm-svn: 283763
2016-10-10 16:01:54 +00:00
Nirav Dave f43cc9f8b5 Add return type for checkForValidSection parsing function. NFC Intended.
llvm-svn: 283761
2016-10-10 15:24:54 +00:00
Zvi Rackover 2a21f125bd [X86] Prefer rotate by 1 over rotate by imm
Summary:
Rotate by 1 is translated to 1 micro-op, while rotate with imm8 is translated to 2 micro-ops.

Fixes pr30644.

Reviewers: delena, igorb, craig.topper, spatel, RKSimon

Differential Revision: https://reviews.llvm.org/D25399

llvm-svn: 283758
2016-10-10 14:43:55 +00:00
Simon Pilgrim cfef627b1f [SLPVectorizer][X86] Add 512-bit sitofp/uitofp tests
llvm-svn: 283756
2016-10-10 14:28:06 +00:00
Simon Pilgrim 2c0733c678 [SLPVectorizer][X86] Add avx512 sitofp/uitofp tests
llvm-svn: 283751
2016-10-10 14:14:31 +00:00
Simon Pilgrim 6cadb5610e [SLPVectorizer][X86] Fixed alignments of scalar loads in sitofp/uitofp tests
Fixed copy+paste vector alignment to correct for per-element scalar loads

Increased to 512-bit data sizes in preparation of avx512 tests

llvm-svn: 283748
2016-10-10 14:10:41 +00:00
Simon Pilgrim 4aea8e8a39 Fixed windows stdout/stderr redirection in inline asm constraint tests
llvm-svn: 283741
2016-10-10 11:11:27 +00:00
George Rimar e4dce5ce3e [Object/ELF] - Do not crash on invalid Header->e_shoff value.
sections_begin() may return unalignment pointer when Header->e_shoff isinvalid.
That may result in a crash in clients, for example we have one in LLD:

assert((PtrWord & ~PointerBitMask) == 0 &&
       "Pointer is not sufficiently aligned");
fails when trying to push_back Elf_Shdr* (unaligned) into TinyPtrVector.

Patch forces check for alignment of Header->e_shoff.

Differential revision: https://reviews.llvm.org/D25368

llvm-svn: 283740
2016-10-10 10:51:38 +00:00
Chris Dewhurst 850131213f This pass, fixing an erratum in some LEON 2 processors ensures that the SDIV instruction is not issued, but replaced by SDIVcc instead, which does not exhibit the error. Unit test included.
Differential Review: https://reviews.llvm.org/D24660

llvm-svn: 283727
2016-10-10 08:53:06 +00:00
Daniel Jasper 0dea246b4f Fix WebAssembly build after r283702.
llvm-svn: 283723
2016-10-10 06:49:55 +00:00
Craig Topper 9ece2f7529 [AVX-512] Add missing pattern sext or zext from bytes to quad words with a 128-bit load as input.
llvm-svn: 283720
2016-10-10 06:25:48 +00:00
Craig Topper 0f905027b3 [AVX-512] Add test cases for AVX512 sign/zero extend instructions derived from the sse41 and avx2 test cases. Code will be improved in future commits.
llvm-svn: 283719
2016-10-10 06:25:45 +00:00
Craig Topper aba15075da [AVX-512] Add an AVX512VL/BW command line to sse41-pmovxrm.ll and avx2-pmovxrm.ll. Also disable peephole so we really test pattern matching.
llvm-svn: 283718
2016-10-10 06:25:42 +00:00
Michael Zuckerman 3eeac2d56b [x86][inline-asm][llvm] accept 'v' constraint
Commit in the name of:Coby Tayree
1.'v' constraint for (x86) non-avx arch imitates the already implemented 'x' constraint, i.e. allows XMM{0-15} & YMM{0-15} depending on the apparent arch & mode (32/64).
2.for the avx512 arch it allows [X,Y,Z]MM{0-31} (mode dependent)

This patch applies the needed changes to clang
 clang patch: https://reviews.llvm.org/D25004

Differential Revision: D25005
 

llvm-svn: 283717
2016-10-10 05:48:56 +00:00
Dylan McKay 1a523767dc [AVR] Enable generation of the TableGen assembly writer tables
This also changes the order of the statements in CMakeLists.txt to be
alphabetical.

llvm-svn: 283711
2016-10-10 01:28:45 +00:00
Brian Gesiak 11c48475c4 [lit] Remove (or allow specific) unused imports
Summary:
Using Python linter flake8 on the utils/lit reveals several linter
warnings designated "F401: Unused import". Fix or silence these
warnings.

Some of these unused imports are legitimate, while some are part of lit's API.
For example, users of lit expect to be able to access `lit.formats.ShTest` in
their `lit.cfg`, despite the module hierarchy for that symbol actually being
`lit.formats.shtest.ShTest`. To silence linter errors for these lines,
include a "noqa" directive.

Reviewers: echristo, delcypher, beanz, ddunbar

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D25407

llvm-svn: 283710
2016-10-10 01:22:06 +00:00
Brian Gesiak 3a0f79fb19 [lit] Remove unused TestingProgressDisplay attr
Summary:
`TestingProgressDisplay` initializes its `current` attribute to `None`, but
never reads or writes the value again. Remove it.

Reviewers: echristo, delcypher, beanz, ddunbar

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D25415

llvm-svn: 283709
2016-10-10 01:20:43 +00:00
Brian Gesiak b25861c31e [lit] Fix undefined symbol ArgumentError
Summary:
`ArgumentError` is not defined by the Python standard library.
Executing this line of code would throw a exception, but not the
intended one. It would throw a `NameError` exception, since `ArgumentError`
is undefined.

Use `ValueError` instead, which is defined by the Python standard
library.

Reviewers: echristo, delcypher, beanz, ddunbar

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D25410

llvm-svn: 283708
2016-10-10 01:19:27 +00:00
Brian Gesiak f35afa2cfc [lit] Remove semicolons in Python code
Summary:
Semicolons aren't necessary as statement terminators in Python, and
each of these uses are superfluous as they appear at the end of a line.
The convention is to not use semicolons where not needed, so remove them.

Reviewers: echristo, delcypher, beanz, ddunbar

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D25409

llvm-svn: 283707
2016-10-10 01:18:14 +00:00
Brian Gesiak e35cf5deb8 [lit] Remove unused variable in googletest format
Summary: `prefix` is written to but never read.

Reviewers: echristo, delcypher, beanz, ddunbar

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D25408

llvm-svn: 283706
2016-10-10 01:15:33 +00:00
Brian Gesiak ea76cdb22e [lit] Remove Python 2.6 and below exec workaround
Summary:
The minimum version of Python required to run LLVM's test suite is 2.7.
Remove a workaround for older Python versions.

Reviewers: echristo, delcypher, beanz, ddunbar

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D25400

llvm-svn: 283705
2016-10-10 01:11:52 +00:00
Craig Topper 64378f4378 [AVX-512] Port 128 and 256-bit memory->register sign/zero extend patterns from SSE file. Also add a minimal set for 512-bit.
llvm-svn: 283704
2016-10-09 23:08:39 +00:00
Craig Topper 29558b8284 [X86] Remove redundant patterns. The same pattern appears a few lines up.
llvm-svn: 283703
2016-10-09 23:08:33 +00:00
Mehdi Amini f42454b94b Move the global variables representing each Target behind accessor function
This avoids "static initialization order fiasco"

Differential Revision: https://reviews.llvm.org/D25412

llvm-svn: 283702
2016-10-09 23:00:34 +00:00
Eric Fiselier 0d42e158b1 [CMake] Correct configuration order of the sub-projects based on ther dependancies
llvm-svn: 283698
2016-10-09 20:38:29 +00:00
Davide Italiano aedafd411a [llvm-link] Fix description of -disable-lazy-loading option
Patch by Will Dietz!

llvm-svn: 283697
2016-10-09 17:15:04 +00:00
Zvi Rackover b764bf2987 [X86] Adding the 'nounwind' attribute to test functions for cleaner generated code
Thanks to RKSimon for the suggestion.

llvm-svn: 283696
2016-10-09 13:33:51 +00:00
Zvi Rackover f841080caf [X86] Improve the rotate ISel test
Summary:
- Added 64-bit target testing.
- Added 64-bit operand test cases.
- Added cases that demonstrate pr30644

Reviewers: RKSimon, craig.topper, igorb

Differential Revision: https://reviews.llvm.org/D25401

llvm-svn: 283695
2016-10-09 13:07:25 +00:00
Elena Demikhovsky 5b10aa1f1e DAG: Setting Masked-Expand-Load as a variant of Masked-Load node
Masked-expand-load node represents load operation that loads a variable amount of elements from memory according to amount of "true" bits in the mask and expands the loaded elements according to their position in the mask vector.
Right now, the node is used in intrinsics for VEXPAND* instructions. 
The work is done towards implementation of masked.expandload and masked.compressstore intrinsics.

Differential Revision: https://reviews.llvm.org/D25322

llvm-svn: 283694
2016-10-09 10:48:52 +00:00
Craig Topper 43973154dd [AVX-512] Fix execution domain for EVEX encoded VINSERTPS.
llvm-svn: 283692
2016-10-09 06:41:47 +00:00
Peter Collingbourne cc723cccab MC: Remove unused entities.
llvm-svn: 283691
2016-10-09 04:39:13 +00:00
Peter Collingbourne 5c924d7117 Target: Remove unused entities.
llvm-svn: 283690
2016-10-09 04:38:57 +00:00
Craig Topper e30cb00dc0 [AVX-512] Add subvector insert and extract to load/store folding tables.
llvm-svn: 283689
2016-10-09 03:54:13 +00:00
Craig Topper 50a468e03f [AVX-512] Add avx512dq to the fp stack folding test.
llvm-svn: 283688
2016-10-09 03:54:09 +00:00
Craig Topper 4262d53024 [AVX-512] Add the vector down convert instructions to the store folding tables.
llvm-svn: 283687
2016-10-09 03:54:05 +00:00
Kostya Serebryany 7abb95d3b3 [libFuzzer] make a test less flaky
llvm-svn: 283686
2016-10-09 03:45:38 +00:00
Kostya Serebryany c5325ed29d [libFuzzer] when shrinking the corpus, delete evicted files previously created by the current process
llvm-svn: 283682
2016-10-08 23:24:45 +00:00
Mehdi Amini 8ec7b4f588 ThinLTO: Fix Gold test after caching fix in r283655
(I don't have Gold available, so this is speculative)

llvm-svn: 283681
2016-10-08 22:49:28 +00:00
Kostya Serebryany 9adc7c8b4a [libFuzzer] control the reload interval by a flag, make it 10 seconds by default
llvm-svn: 283676
2016-10-08 22:12:14 +00:00
Kostya Serebryany cd04ec25dd [libFuzzer] fix use-after-free in libFuzzer found by ... fuzzing.
llvm-svn: 283675
2016-10-08 21:57:48 +00:00
Simon Pilgrim 319c094771 [X86][SSE] Regenerate select tests
llvm-svn: 283674
2016-10-08 21:17:44 +00:00
Zvi Rackover ce4900aaa6 Revert "[X86] Apply the Update LLC Test Checks tool on the rotate tests."
This reverts commit 283667.

llvm-svn: 283673
2016-10-08 20:54:20 +00:00
Simon Pilgrim 9e7a22fc13 [X86][SSE] Regenerate and add 32-bit tests to widening tests
llvm-svn: 283672
2016-10-08 19:54:28 +00:00
Mehdi Amini 732afdd09a Turn cl::values() (for enum) from a vararg function to using C++ variadic template
The core of the change is supposed to be NFC, however it also fixes
what I believe was an undefined behavior when calling:

 va_start(ValueArgs, Desc);

with Desc being a StringRef.

Differential Revision: https://reviews.llvm.org/D25342

llvm-svn: 283671
2016-10-08 19:41:06 +00:00
Simon Pilgrim 30cbd1ab84 Fix comment typos - full update script path in assertions note
llvm-svn: 283670
2016-10-08 18:51:55 +00:00
Craig Topper 2067142d7d [AVX-512] Add test case for PR30430 that I should have added in r281959.
llvm-svn: 283669
2016-10-08 18:50:00 +00:00
Craig Topper 086f0c1401 [AVX-512] Fix a bug in getLargestLegalSuperClass where we inflated to VR128X/VR256X even when VLX isn't supported.
This seems to have been responsible for the XMM16-31 spills observed in PR29112. With this fixed the test case has been modified to no longer have a spill of XMM16.

llvm-svn: 283668
2016-10-08 18:49:57 +00:00
Zvi Rackover 2413d475fc [X86] Apply the Update LLC Test Checks tool on the rotate tests.
Also added cases demonstrating pr30644.

llvm-svn: 283667
2016-10-08 18:44:47 +00:00
Simon Pilgrim d0d90fb9b2 [X86][AVX2] Regenerate and add 32-bit tests to core tests
llvm-svn: 283666
2016-10-08 18:36:57 +00:00
Colin LeMahieu c69f7ff6c0 [Hexagon] Adding change of flow max 1 (cofMax1) TS flag for marking this restriction rather than implying it from TypeJR.
llvm-svn: 283665
2016-10-08 17:18:51 +00:00
Teresa Johnson 897bab9b35 [ThinLTO] Record calls to aliases
Summary:
When there is a call to an alias in the same module, we were not
adding a call edge. So we could incorrectly think that the alias
was dead if it was inlined in that function, despite having a
reference imported elsewhere. This resulted in unsats at link time.

Add a call edge when the call is to an alias.

Reviewers: davide, mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25384

llvm-svn: 283664
2016-10-08 16:11:42 +00:00
Sebastian Pop eb65d72d9c [AArch64] Avoid generating indexed vector instructions for Exynos
Avoid generating indexed vector instructions for Exynos. This is needed for
fmla/fmls/fmul/fmulx. For example, the instruction

  fmla v0.4s, v1.4s, v2.s[1]

is less efficient than the instructions

  dup v2.4s, v2.s[1]
  fmla v0.4s, v1.4s, v2.4s

Patch written by Abderrazek Zaafrani.

Differential Revision: https://reviews.llvm.org/D21571

llvm-svn: 283663
2016-10-08 12:30:07 +00:00
Adam Nemet ee5cf031ce [OptRemarks] Remove non-printable chars from function name
Value names may be prefixed with a binary '1' to indicate that the
backend should not modify the symbols due to any platform naming
convention.

This should not show up in the YAML opt record file because it breaks
the YAML parser.

llvm-svn: 283656
2016-10-08 04:47:20 +00:00
Mehdi Amini f82bda0a7a ThinLTO: don't perform incremental LTO on module without a hash
Clang always emit a hash for ThinLTO, but as other frontend are
starting to use ThinLTO, this could be a serious bug.

Differential Revision: https://reviews.llvm.org/D25379

llvm-svn: 283655
2016-10-08 04:44:23 +00:00
Mehdi Amini 00fa1409ec ThinLTO: handles modules with empty summaries
We need to add an entry in the combined-index for modules that have
a hash but otherwise empty summary, this is needed so that we can
get the hash for the module.

Also, if no entry is present in the combined index for a module, we
need to skip it when trying to compute a cache entry.

Differential Revision: https://reviews.llvm.org/D25300

llvm-svn: 283654
2016-10-08 04:44:18 +00:00
Mehdi Amini 01e0e136bd Requires the AVR backend for running test/CodeGen/AVR
llvm-svn: 283653
2016-10-08 04:39:34 +00:00
Kyle Butt 2facd194a2 Revert "Codegen: Tail-duplicate during placement."
This reverts commit 71c312652c10f1855b28d06697c08d47e7a243e4.

llvm-svn: 283647
2016-10-08 01:47:05 +00:00
Dylan McKay f96ffe1ebf [AVR] Add backend dependencies to MCTargetDesc/LLVMBuild.txt
llvm-svn: 283642
2016-10-08 01:14:23 +00:00
Zachary Turner 3b14764ce5 [pdb] Dump Module Symbols to Yaml.
This is the first step towards round-tripping symbol information,
and thusly being able to write symbol information to a PDB.

This patch writes the symbol information for each compiland to
the Yaml when running in pdb2yaml mode.  There's still some loose
ends, such as what to do about relocations (necessary in order to
print linkage names), how to print enums with friendly names, and
how to give the dumper access to the StringTable, but this is a
good first start.

llvm-svn: 283641
2016-10-08 01:12:01 +00:00
Dylan McKay 552b7856d3 Fix incorrect assertion in AVRFrameLowering.cpp
This wasn't looking at the right instruction, and would always fail.

llvm-svn: 283640
2016-10-08 01:10:36 +00:00
Dylan McKay b16b6d5739 [AVR] Don't worry about call frame size when initializing frame pointer
We previously only used the frame pointer if the frame pointer was too
big. This was to work around a bug (described in this old commit)

https://sourceforge.net/p/avr-llvm/code/204/tree//llvm/trunk/AVR/AVRFrameLowering.cpp?diff=50d64d912718465cb887d17a:203

I mistakenly invered the condition assuming it was a typo. I am now
removing it because it doesn't seem to be a problem anymore (plus it's a
dirty hack).

llvm-svn: 283639
2016-10-08 01:10:31 +00:00
Dylan McKay 7c2d41aa9f [AVR] Don't shadow container while iterating in range-based loop
This works on clang, but fails on GCC 4.6

llvm-svn: 283638
2016-10-08 01:09:06 +00:00
Dylan McKay a1a944e3cb [AVR] Use references rather than pointers in AVRISelLowering
llvm-svn: 283636
2016-10-08 01:06:21 +00:00
Dylan McKay 12109e7314 Allow a maximum of 64 bits to be returned in registers
The rest spills to the stack

Authored by Jake Goulding

llvm-svn: 283635
2016-10-08 01:05:09 +00:00
Dylan McKay c1ff65cf62 [AVR] Expand MULHS for all types
Once MULHS was expanded, this exposed an issue where the condition
register was thought to be 16-bit. This caused an attempt to copy a
16-bit register to an 8-bit register.

Authored by Jake Goulding

llvm-svn: 283634
2016-10-08 01:01:49 +00:00
Dylan McKay ddb7a59fe9 [AVR] Add the 'SoftFail' field to all instruction formats
This will be used in the future for disassembly.

llvm-svn: 283630
2016-10-08 00:55:46 +00:00
Dylan McKay 24d02ee141 [AVR] Set up the instruction printer and the assembly backend
llvm-svn: 283629
2016-10-08 00:50:11 +00:00
Dylan McKay 2b0936d41d [AVR] Add dependencies to AVR libraries in AVRCodeGen
llvm-svn: 283628
2016-10-08 00:45:24 +00:00
Dylan McKay 07897f5492 [AVR] Add missing subdirectories to LLVMBuild
llvm-svn: 283627
2016-10-08 00:42:58 +00:00
Hal Finkel f495280a09 [llvm-opt-report] Don't leave space for opts that never happen
Because screen space is precious, if an optimization (vectorization, for
example) never happens, don't leave empty space for the associated markers on
every line of the output. This makes the output much more compact, and allows
for the later inclusion of markers for more (although perhaps rare)
optimizations.

llvm-svn: 283626
2016-10-08 00:26:54 +00:00
Gor Nishanov 1b6aec8e25 [coroutines] Store an address of destroy OR cleanup part in the coroutine frame.
Summary:
If heap allocation of a coroutine is elided, we need to make sure that we will update an address stored in the coroutine frame from f.destroy to f.cleanup.
Before this change, CoroSplit synthesized these stores after coro.begin:

```
    store void (%f.Frame*)* @f.resume, void (%f.Frame*)** %resume.addr
    store void (%f.Frame*)* @f.destroy, void (%f.Frame*)** %destroy.addr

```

In those cases where we did heap elision, but were not able to devirtualize all indirect calls, destroy call will attempt to "free" the coroutine frame stored on the stack. Oops.

Now we use select to put an appropriate coroutine subfunction in the destroy slot. As bellow:

```
    store void (%f.Frame*)* @f.resume, void (%f.Frame*)** %resume.addr
    %0 = select i1 %need.alloc, void (%f.Frame*)* @f.destroy, void (%f.Frame*)* @f.cleanup
    store void (%f.Frame*)* %0, void (%f.Frame*)** %destroy.addr
```

Reviewers: majnemer

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D25377

llvm-svn: 283625
2016-10-08 00:22:50 +00:00
Lang Hames 1023993a33 [docs] Fix indentation bug in LangRef.
llvm-svn: 283624
2016-10-08 00:20:42 +00:00
Dylan McKay 4d82df32b9 [AVR] Add the assembly printer
Summary: This adds the AVRAsmPrinter class.

Reviewers: arsenm, kparzysz

Subscribers: llvm-commits, wdng, beanz, japaric, mgorny

Differential Revision: https://reviews.llvm.org/D25271

llvm-svn: 283623
2016-10-08 00:02:36 +00:00
Tom Stellard 5ab6154dc3 AMDGPU/SI: Handle div_fmas hazard in GCNHazardRecognizer
Reviewers: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, tony-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D25250

llvm-svn: 283622
2016-10-07 23:42:48 +00:00
Kyle Butt 37e676d857 Codegen: Tail-duplicate during placement.
The tail duplication pass uses an assumed layout when making duplication
decisions. This is fine, but passes up duplication opportunities that
may arise when blocks are outlined. Because we want the updated CFG to
affect subsequent placement decisions, this change must occur during
placement.

In order to achieve this goal, TailDuplicationPass is split into a
utility class, TailDuplicator, and the pass itself. The pass delegates
nearly everything to the TailDuplicator object, except for looping over
the blocks in a function. This allows the same code to be used for tail
duplication in both places.

This change, in concert with outlining optional branches, allows
triangle shaped code to perform much better, esepecially when the
taken/untaken branches are correlated, as it creates a second spine when
the tests are small enough.

Issue from previous rollback fixed, and a new test was added for that
case as well. Issue was worklist/scheduling/taildup issue in layout.

Issue from 2nd rollback fixed, with 2 additional tests. Issue was
tail merging/loop info/tail-duplication causing issue with loops that share
a header block.

Differential revision: https://reviews.llvm.org/D18226

llvm-svn: 283619
2016-10-07 22:33:20 +00:00
Arnold Schwaighofer 3f25658143 swifterror: Don't compute swifterror vregs during instruction selection
The code used llvm basic block predecessors to decided where to insert phi
nodes. Instruction selection can and will liberally insert new machine basic
block predecessors. There is not a guaranteed one-to-one mapping from pred.
llvm basic blocks and machine basic blocks.

Therefore the current approach does not work as it assumes we can mark
predecessor machine basic block as needing a copy, and needs to know the set of
all predecessor machine basic blocks to decide when to insert phis.

Instead of computing the swifterror vregs as we select instructions, propagate
them at the end of instruction selection when the MBB CFG is complete.

When an instruction needs a swifterror vreg and we don't know the value yet,
generate a new vreg and remember this "upward exposed" use, and reconcile this
at the end of instruction selection.

This will only happen if the target supports promoting swifterror parameters to
registers and the swifterror attribute is used.

rdar://28300923

llvm-svn: 283617
2016-10-07 22:06:55 +00:00
Sanjay Patel 14c02052d6 [DAG] clean up foldSelectOfConstants(); NFCI
Rename variables, simplify logic. 
Not clear yet why we don't handle a target with ZeroOrNegativeOneBooleanContent too.

llvm-svn: 283613
2016-10-07 21:55:42 +00:00
Davide Italiano f6988d2980 [InstCombine] Don't unpack arrays that are too large (part 2).
This is similar to r283599, but for store instructions.
Thanks to David for pointing out!

llvm-svn: 283612
2016-10-07 21:53:09 +00:00
Zachary Turner 5e7c2719d2 Add missing include.
llvm-svn: 283610
2016-10-07 21:40:06 +00:00
Zachary Turner 0d8407447d Refactor Symbol visitor code.
Type visitor code had already been refactored previously to
decouple the visitor and the visitor callback interface.  This
was necessary for having the flexibility to visit in different
ways (for example, dumping to yaml, reading from yaml, dumping
to ScopedPrinter, etc).

This patch merely implements the same visitation pattern for
symbol records that has already been implemented for type records.

llvm-svn: 283609
2016-10-07 21:34:46 +00:00
Hongbin Zheng 78550e3991 [cmake] Treat polly as "in tree" if LLVM_EXTERNAL_POLLY_SOURCE_DIR is provided
Differential Revision: https://reviews.llvm.org/D25354

llvm-svn: 283608
2016-10-07 21:32:47 +00:00
Davide Italiano da11412243 [InstCombine] Don't unpack arrays that are too large
Differential Revision:  https://reviews.llvm.org/D25376

llvm-svn: 283599
2016-10-07 20:57:42 +00:00
Sanjay Patel ecaf343fe7 [DAG] move fold (select C, 0, 1 -> xor C, 1) to a helper function; NFC
We're missing at least 3 other similar folds based on what we have in InstCombine. 

llvm-svn: 283596
2016-10-07 20:47:51 +00:00
Tom Stellard 6982bb8f25 AMDGPU/SI: Add support for 8-byte relocations
Reviewers: arsenm, kzhuravl

Subscribers: wdng, nhaehnle, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D25375

llvm-svn: 283593
2016-10-07 20:36:58 +00:00
Anna Thomas e76d77ace5 [RS4GC] Strengthen coverage: add more tests
Summary: Add tests for cases where we have zero coverage in RS4GC.

Reviewers: sanjoy, reames

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25341

llvm-svn: 283591
2016-10-07 20:34:00 +00:00
Colin LeMahieu 9694825d32 [Hexagon][NFC] Using documented instruction type name V4LDST instead of MEMOP.
llvm-svn: 283582
2016-10-07 19:11:28 +00:00
Mehdi Amini dc5a507c92 Recommit "Use StringRef in LTOModule implementation (NFC)""
This reverts commit r283456 and reapply r282997, with explicitly
zeroing the struct member to workaround a bug in MSVC2013 with
zero-initialization: https://connect.microsoft.com/VisualStudio/feedback/details/802160

llvm-svn: 283581
2016-10-07 19:05:14 +00:00
Davide Italiano c0169fa94f [LoopIdiomRecognize] Merge two if conditions into one. NFCI.
llvm-svn: 283579
2016-10-07 18:39:43 +00:00
Sanjay Patel 4326c4ac8f [InstCombine] fold select X, (ext X), C
If we're going to canonicalize IR towards select of constants, try harder to create those.
Also, don't lose the metadata.

This is actually 4 related transforms in one patch:
      // select X, (sext X), C --> select X, -1, C
      // select X, (zext X), C --> select X,  1, C
      // select X, C, (sext X) --> select X, C, 0
      // select X, C, (zext X) --> select X, C, 0

Differential Revision: https://reviews.llvm.org/D25126

llvm-svn: 283575
2016-10-07 17:53:07 +00:00
Adam Nemet 848556a0e2 New utility to visualize optimization records
This is a new tool built on top of the new YAML ouput generated from
optimization remarks.  It produces HTML for easy navigation and
visualization.

The tool assumes that hotness information for the remarks is available
(the YAML file was produced with PGO).  It uses hotness to list the
remarks prioritized by the hotness on the index page.  Clicking the
source location of the remark in the list takes you the source where the
remarks are rendedered inline in the source.

For now, the tool is meant as prototype.

It's written in Python.  It uses PyYAML to parse the input.

Differential Revision: https://reviews.llvm.org/D25348

llvm-svn: 283571
2016-10-07 17:06:34 +00:00
Tom Stellard ef33c4b3f2 AMDGPU/SI: Emit fixups for long branches
Reviewers: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D25366

llvm-svn: 283570
2016-10-07 16:01:18 +00:00
Simon Pilgrim f9648b72df [X86][SSE] Reapplied: Add vector fcopysign combine tests
Now with better lowering and fix for PR30443

llvm-svn: 283569
2016-10-07 16:00:59 +00:00
Artem Tamazov 73f1ab28cd [AMDGPU][mc] Add support for buffer_load_dwordx3, buffer_store_dwordx3.
Partially fixes Bug 28232.
Lit tests added.

Differential Revision: https://reviews.llvm.org/D25367

llvm-svn: 283567
2016-10-07 15:53:16 +00:00
Dehao Chen 6e0c8446db Invoke add-discriminator at -g0 -fsample-profile
Summary: -fsample-profile needs discriminator, which will not be added if built with -g0. This patch makes sure the discriminator is added for sample-profile at -g0. A followup patch will be send out to update clang tests.

Reviewers: davidxl, dblaikie, echristo, dnovillo

Subscribers: mehdi_amini, probinson, llvm-commits

Differential Revision: https://reviews.llvm.org/D25132

llvm-svn: 283565
2016-10-07 15:21:31 +00:00
Matthew Simpson a371c14ffe [LV] Don't mark multi-use branch conditions uniform
Previously, we marked the branch conditions of latch blocks uniform after
vectorization if they were instructions contained in the loop. However, if a
condition instruction has users other than the branch, it may not remain
uniform. This patch ensures the conditions we mark uniform are only used by the
branch. This should fix PR30627.

Reference: https://llvm.org/bugs/show_bug.cgi?id=30627
llvm-svn: 283563
2016-10-07 15:20:13 +00:00
Krzysztof Parzyszek e513e17b23 Only track physical registers in LivePhysRegs
llvm-svn: 283561
2016-10-07 14:50:49 +00:00
Sam Kolton a3ec5c10e2 [AMDGPU] Assembler: support v_mac_f32 DPP and SDWA. Move getNamedOperandIdx to AMDGPUBaseInfo.h
Reviewers: artem.tamazov, tstellarAMD

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D25084

llvm-svn: 283560
2016-10-07 14:46:06 +00:00
Simon Pilgrim 02f623e74c [X86][SSE] Tidied up tests - use standard check prefixes
llvm-svn: 283559
2016-10-07 14:42:22 +00:00
Konstantin Zhuravlyov c09e2d7e46 [AMDGPU] AMDGPUCodeGenPrepare: remove extra ';'
llvm-svn: 283558
2016-10-07 14:39:53 +00:00
Tom Stellard 17eb3413cd [ValueTracking] Fix crash in GetPointerBaseWithConstantOffset()
Summary:
While walking defs of pointer operands we were assuming that the pointer
size would remain constant.  This is not true, because addresspacecast
instructions may cast the pointer to an address space with a different
pointer width.

This partial reverts r282612, which was a more conservative solution
to this problem.

Reviewers: reames, sanjoy, apilipenko

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D24772

llvm-svn: 283557
2016-10-07 14:23:29 +00:00
Konstantin Zhuravlyov f74fc60a7d [AMDGPU] Promote uniform (i1, i16] operations to i32
Differential Revision: https://reviews.llvm.org/D25302

llvm-svn: 283555
2016-10-07 14:22:58 +00:00
Benjamin Kramer d47feecc45 Remove spurious non-printable character from source file.
NFC.

llvm-svn: 283552
2016-10-07 13:46:38 +00:00
Javed Absar 9797989ca7 [ARM]: add missing switch case for cortex-r52
Adds a missing switch case for handling cortex-r52
in init-subtarget-features.

llvm-svn: 283551
2016-10-07 13:41:55 +00:00
Martin Storsjo 04864f45b2 [ARM] Reapply: Use __rt_div functions for divrem on Windows
Reapplying r283383 after revert in r283442. The additional fix
is a getting rid of a stray space in a function name, in the
refactoring part of the commit.

This avoids falling back to calling out to the GCC rem functions
(__moddi3, __umoddi3) when targeting Windows.

The __rt_div functions have flipped the two arguments compared
to the __aeabi_divmod functions. To match MSVC, we emit a
check for division by zero before actually calling the library
function (even if the library function itself also might do
the same check).

Not all calls to __rt_div functions for division are currently
merged with calls to the same function with the same parameters
for the remainder. This is more wasteful than a div + mls as before,
but avoids calls to __moddi3.

Differential Revision: https://reviews.llvm.org/D25332

llvm-svn: 283550
2016-10-07 13:28:53 +00:00
Javed Absar fb4b6e8db9 [ARM]: Add Cortex-R52 target to LLVM
This patch adds Cortex-R52, the new ARM real-time processor, to LLVM. 
Cortex-R52 implements the ARMv8-R architecture.

llvm-svn: 283542
2016-10-07 12:06:40 +00:00
Simon Pilgrim a5d019ee95 [X86][SSE] Update register class during MOVSD/MOVSS - BLENDPD/BLENDPS commutation
MOVSD/MOVSS take a 128-bit register and a FR32/FR64 register input, the commutation code wasn't taking this into account leading to verification errors.

This patch inserts a vreg copy mi to ensure that the registers are correct.

Fix for PR30607

Differential Revision: https://reviews.llvm.org/D25280

llvm-svn: 283539
2016-10-07 11:18:38 +00:00
Alexey Bataev 6ad5da7c81 [SLPVectorizer] Fix for PR25748: reduction vectorization after loop
unrolling.

The next code is not vectorized by the SLPVectorizer:
```
 int test(unsigned int *p) {
  int sum = 0;
  for (int i = 0; i < 8; i++)
    sum += p[i];
  return sum;
 }
```
During optimization this loop is fully unrolled and SLPVectorizer is
unable to vectorize it. Patch tries to fix this problem.

Differential Revision: https://reviews.llvm.org/D24796

llvm-svn: 283535
2016-10-07 09:39:22 +00:00
Oliver Stannard 4df1cc0b00 [ARM] Don't convert switches to lookup tables of pointers with ROPI/RWPI
With the ROPI and RWPI relocation models we can't always have pointers
to global data or functions in constant data, so don't try to convert switches
into lookup tables if any value in the lookup table would require a relocation.
We can still safely emit lookup tables of other values, such as simple
constants.

Differential Revision: https://reviews.llvm.org/D24462

llvm-svn: 283530
2016-10-07 08:48:24 +00:00
Mehdi Amini 68c6c8cd78 Use StringRef in ARMELFStreamer (NFC)
llvm-svn: 283529
2016-10-07 08:48:07 +00:00
Nicolai Haehnle 87bc4c218b AMDGPU: Fix use-after-free in SIOptimizeExecMasking
Summary:
There was a bug with sequences like

   s_mov_b64 s[0:1], exec
   s_and_b64 s[2:3]<def>, s[0:1], s[2:3]<kill>
   ...
   s_mov_b64_term exec, s[2:3]

because s[2:3] was defined and used in the same instruction, ending up with
SaveExecInst inside OtherUseInsts.

Note that the test case also exposes an unrelated bug.

Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=98028

Reviewers: tstellarAMD, arsenm

Subscribers: kzhuravl, wdng, yaxunl, llvm-commits, tony-tye

Differential Revision: https://reviews.llvm.org/D25306

llvm-svn: 283528
2016-10-07 08:40:14 +00:00
Mehdi Amini a0016ec95f Use StringReg in TargetParser APIs (NFC)
llvm-svn: 283527
2016-10-07 08:37:29 +00:00
Mehdi Amini 9ff8e87ca4 Revert "Revert "Add a static_assert to enforce that parameters to llvm::format() are not totally unsafe""
This reverts commit r283510 and reapply r283509, with updates to
clang-tools-extra as well.

llvm-svn: 283525
2016-10-07 08:25:42 +00:00
Craig Topper 948625633f [X86] Fix patterns for VPMULLD and VPCMPEQQ to not require aligned loads.
llvm-svn: 283524
2016-10-07 06:54:43 +00:00
Craig Topper 871da8ebea [X86] Remove unused PatFrags. NFC
llvm-svn: 283523
2016-10-07 06:54:39 +00:00
Dylan McKay e5d89e8001 [AVR] Add the AVRMCInstLower class
Summary:
This class deals with the lowering of CodeGen `MachineInstr` objects to
MC `MCInst` objects.

Reviewers: kparzysz, arsenm

Subscribers: wdng, beanz, japaric, mgorny

Differential Revision: https://reviews.llvm.org/D25269

llvm-svn: 283522
2016-10-07 06:13:09 +00:00
Matt Arsenault 93401f4b5e AMDGPU: Change check prefix in test
llvm-svn: 283521
2016-10-07 03:55:04 +00:00
Hal Finkel 5d41f03215 [llvm-opt-report] Left justify unrolling counts, etc.
In the left part of the reports, we have things like U<number>; if some of
these numbers use more digits than others, we don't want a space in between the
U and the start of the number. Instead, the space should come afterward. This
way it is clear that the number goes with the U and not any other optimization
indicator that might come later on the line.

Tests committed in r283518.

llvm-svn: 283519
2016-10-07 02:01:03 +00:00
Hal Finkel bd5a172d9c [llvm-opt-report] Left justify unrolling counts, etc.
In the left part of the reports, we have things like U<number>; if some of
these numbers use more digits than others, we don't want a space in between the
U and the start of the number. Instead, the space should come afterward. This
way it is clear that the number goes with the U and not any other optimization
indicator that might come later on the line.

llvm-svn: 283518
2016-10-07 01:57:06 +00:00
David Majnemer 8c03c1bade [SimplifyCFG] Correctly test for unconditional branches in GetCaseResults
GetCaseResults assumed that a terminator with one successor was an
unconditional branch.  This is not necessarily the case, it could be a
cleanupret.

Strengthen the check by querying whether or not the terminator is
exceptional.

llvm-svn: 283517
2016-10-07 01:38:35 +00:00
Hal Finkel 16d29e3111 [llvm-opt-report] Use -no-demangle to disable demangling
As this is intended to be a user-facing option, -no-demangle seems much better
than -demangle=0. Add testing for the option.

llvm-svn: 283516
2016-10-07 01:30:59 +00:00
Peter Collingbourne 2261d78cd2 Target: Remove unused patterns and transforms. NFC.
llvm-svn: 283515
2016-10-07 00:30:49 +00:00
Colin LeMahieu 8ed1aee9dd [Hexagon] NFC Removing 'V4_' prefix from duplex instruction names.
llvm-svn: 283514
2016-10-07 00:15:07 +00:00
Michael Kuperstein 5185b7dde3 [LV] Remove triples from target-independent vectorizer tests. NFC.
Vectorizer tests in the target-independent directory should not have a target
triple. If a test really needs to query a specific backend, it belongs in the
right target subdirectory (which "REQUIRES" the right backend). Otherwise, it
should not specify a triple.

llvm-svn: 283512
2016-10-06 23:57:25 +00:00
Mehdi Amini 292f376934 Revert "Add a static_assert to enforce that parameters to llvm::format() are not totally unsafe"
This reverts commit r283509, clang is hitting the assert.

llvm-svn: 283510
2016-10-06 23:41:49 +00:00
Mehdi Amini a7e893f638 Add a static_assert to enforce that parameters to llvm::format() are not totally unsafe
Summary:
I had for the second time today a bug where llvm::format("%s", Str)
was called with Str being a StringRef. The Linux and MacOS bots were
fine, but windows having different calling convention, it printed
garbage.

Instead we can catch this at compile-time: it is never expected to
call a C vararg printf-like function with non scalar type I believe.

Reviewers: bogner, Bigcheese, dexonsmith

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25266

llvm-svn: 283509
2016-10-06 23:26:29 +00:00
Colin LeMahieu 9675de5ba8 [Hexagon] NFC. Canonicalizing absolute address instruction names.
llvm-svn: 283507
2016-10-06 23:02:11 +00:00
Vedant Kumar 7beb423765 Delete some dead code in SelectionDAG (NFC)
Differential Revision: https://reviews.llvm.org/D24435

llvm-svn: 283505
2016-10-06 22:53:43 +00:00
Dan Gohman 2726b88c03 [WebAssemby] Implement block signatures.
Per spec changes, this implements block signatures, and adds just enough
logic to produce correct block signatures at the ends of functions.

Differential Revision: https://reviews.llvm.org/D25144

llvm-svn: 283503
2016-10-06 22:29:32 +00:00
Dan Gohman 3a643e8d46 [WebAssembly] Remove loop's bottom label.
Per spec changes, loop constructs no longer have a bottom label.

https://reviews.llvm.org/D25118

llvm-svn: 283502
2016-10-06 22:10:23 +00:00
Dan Gohman 7f1bdb2e02 [WebAssembly] Remove the output operand from stores.
Per spec changes, store instructions in WebAssembly no longer have a return
value. Update the instruction descriptions.

Differential Revision: https://reviews.llvm.org/D25122

llvm-svn: 283501
2016-10-06 22:08:28 +00:00
Wolfgang Pieb e51bede1d8 Preserve the debug location when CodeGenPrepare sinks a compare instruction into the
basic block of a user.

Patch by Andrea DiBiagio.

Differential Revision: https://reviews.llvm.org/D24632

llvm-svn: 283500
2016-10-06 21:43:45 +00:00
Pirama Arumuga Nainar cc152ac794 Handle *_EXTEND_VECTOR_INREG during Integer Legalization
Summary:
These nodes need legalization for 3-element vectors.  This commit
handles the legalization and adds tests for zext and sext.

This fixes PR30614.

Reviewers: RKSimon, srhines

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25268

llvm-svn: 283496
2016-10-06 21:27:05 +00:00
Rong Xu 0e79f7d11d [PGO] Create weak alias for the renamed Comdat function
Add a weak alias to the renamed Comdat function in IR level instrumentation,
using it's original name. This ensures the same behavior w/ and w/o IR
instrumentation, even for non standard conforming code.

Differential Revision: http://reviews.llvm.org/D25339

llvm-svn: 283490
2016-10-06 20:38:13 +00:00
Michael Kuperstein e524e22846 [X86] Preserve BasePtr for LEA64_32r
When replacing FrameIndex with BasePtr, we must preserve BasePtr for
LEA64_32r since BasePtr is used later for stack adjustment if it is
the same as StackPtr.

Patch by H.J Lu <hjl.tools@gmail.com>

Differential Revision: https://reviews.llvm.org/D23575

llvm-svn: 283486
2016-10-06 19:31:27 +00:00
Simon Pilgrim bddb412896 [X86][SSE] Add f16/f80/f128 vector sitofp test cases
As discussed on D23808

llvm-svn: 283485
2016-10-06 19:29:25 +00:00
Michael Kuperstein 7cc2123847 [DAG] Generalize build_vector -> vector_shuffle combine for more than 2 inputs
This generalizes the build_vector -> vector_shuffle combine to support any
number of inputs. The idea is to create a binary tree of shuffles, where
the first layer performs pairwise shuffles of the input vectors placing each
input element into the correct lane, and the rest of the tree blends these
shuffles together.

This doesn't try to be smart and create any sort of "optimal" shuffles.
The assumption is that even a "poor" shuffle sequence is better than extracting
and inserting the elements one by one.

Differential Revision: https://reviews.llvm.org/D24683

llvm-svn: 283480
2016-10-06 18:58:24 +00:00
Michael Ilseman 6d6b4d87a3 Revert "Add -strip-nonlinetable-debuginfo capability"
This reverts commit r283473.

Reverted until review is completed.

llvm-svn: 283478
2016-10-06 18:30:26 +00:00
Matt Arsenault 5e63a04e46 AMDGPU: Don't fold undef uses or copies with implicit uses
llvm-svn: 283476
2016-10-06 18:12:13 +00:00
Matt Arsenault c59a92387e AMDGPU: Remove scheduling info from si_mask_branch
llvm-svn: 283475
2016-10-06 18:12:07 +00:00
Michael Ilseman d0a4db7632 Add -strip-nonlinetable-debuginfo capability
This adds a new function to DebugInfo.cpp that takes an llvm::Module
as input and removes all debug info metadata that is not directly
needed for line tables, thus effectively stripping all type and
variable information from the module.

The primary motivation for this feature was the bitcode work flow
(cf. http://lists.llvm.org/pipermail/llvm-dev/2016-June/100643.html
for more background). This is not wired up yet, but will be in
subsequent patches.  For testing, the new functionality is exposed to
opt with a -strip-nonlinetable-debuginfo option.

The secondary use-case (and one that works right now!) is as a
reduction pass in bugpoint. I added two new bugpoint options
(-disable-strip-debuginfo and -disable-strip-debug-types) to control
the new features. By default it will first attempt to remove all debug
information, then only the type info, and then proceed to hack at any
remaining MDNodes.

llvm-svn: 283473
2016-10-06 17:58:38 +00:00
Matt Arsenault c2ee42cd16 AMDGPU: Remove leftover implicit operands when folding immediates
When constant folding an operation to a copy or an immediate
mov, the implicit uses/defs of the old instruction were left behind,
e.g. replacing v_or_b32 left the implicit exec use on the new copy.

llvm-svn: 283471
2016-10-06 17:54:30 +00:00
Matt Arsenault 11f7402075 Reapply "AMDGPU: Support using tablegened MC pseudo expansions"
Fix bad merge

llvm-svn: 283470
2016-10-06 17:19:11 +00:00
Matt Arsenault cbc879ee2f Revert "AMDGPU: Support using tablegened MC pseudo expansions"
llvm-svn: 283469
2016-10-06 17:08:01 +00:00
Matt Arsenault d20a2dd7ac AMDGPU: Support using tablegened MC pseudo expansions
Make the necessary refactorings to make use of PseudoInstExpansion

llvm-svn: 283467
2016-10-06 16:56:41 +00:00
Brian Gesiak 49f8c02eb7 [docs] Add PR to Lexicon
Summary:
The acronym PR could be ambiguous to some users, especially those who
are used to interpreting it as GitHub's "pull request".

Reviewers: ddunbar, jordan_rose, void, beanz

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25331

llvm-svn: 283465
2016-10-06 16:39:22 +00:00
Matt Arsenault 6bc43d8627 BranchRelaxation: Support expanding unconditional branches
AMDGPU needs to expand unconditional branches in a new
block with an indirect branch.

llvm-svn: 283464
2016-10-06 16:20:41 +00:00
Krzysztof Parzyszek d391d6f1c3 [Hexagon] Avoid replacing full regs with subregisters in tied operands
Doing so will result in the two-address pass generating incorrect code.

llvm-svn: 283463
2016-10-06 16:18:04 +00:00
Matt Arsenault ef5bba0136 BranchRelaxation: Account for function alignment
llvm-svn: 283462
2016-10-06 16:00:58 +00:00
Matt Arsenault 36919a4f7c Move AArch64BranchRelaxation to generic code
llvm-svn: 283459
2016-10-06 15:38:53 +00:00
Matt Arsenault 0a3ea89e85 AArch64: Move remaining target specific BranchRelaxation bits to TII
llvm-svn: 283458
2016-10-06 15:38:09 +00:00
Nirav Dave ee554e6155 [X86] Fix intel syntax push parsing bug
Change erroneous parsing of push immediate instructions in intel syntax
to default to pointer size by rewriting into the ATT style for matching.

This fixes PR22028.

Reviewers: majnemer, rnk

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25288

llvm-svn: 283457
2016-10-06 15:28:08 +00:00
Mehdi Amini a5ee89863c Revert "Use StringRef in LTOModule implementation (NFC)"
This reverts commit r282997, a windows bot is asserting in
one test apparently.

llvm-svn: 283456
2016-10-06 15:12:22 +00:00
Rafael Espindola d9525a166d Centralize sh_entsize checking.
llvm-svn: 283455
2016-10-06 15:08:10 +00:00
Rafael Espindola c3befb2e39 Refactor to use getSectionContentsAsArray.
This centralizes quite a bit of error checking.

llvm-svn: 283454
2016-10-06 14:47:04 +00:00
Rafael Espindola 6bc2990d16 Refactor duplicated typedefs. NFC.
llvm-svn: 283453
2016-10-06 14:07:26 +00:00
Tim Northover fe6fec9f65 GlobalISel: fix misuse of using declaration in test.
Clang didn't diagnose it before. Oops.

llvm-svn: 283451
2016-10-06 13:57:31 +00:00
Sam Kolton 3381d7a216 [AMDGPU] Disassembler: print label names in branch instructions
Summary: Add AMDGPUSymbolizer for finding names for labels from ELF symbol table.
Initialize MCObjectFileInfo with some default values.

Reviewers: vpykhtin, artem.tamazov, tstellarAMD

Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye

Differential Revision: https://reviews.llvm.org/D24802

llvm-svn: 283450
2016-10-06 13:46:08 +00:00
Anna Thomas 488c05763c [RS4GC] Fix comment to show TODO. NFC
llvm-svn: 283449
2016-10-06 13:24:20 +00:00
Rafael Espindola 28c63d3ed8 Use range loop. NFC.
llvm-svn: 283447
2016-10-06 13:11:12 +00:00
Krzysztof Parzyszek 459a1c9f2b [RDF] Replace some expensive copies with references in range-based loops
llvm-svn: 283446
2016-10-06 13:05:46 +00:00
Krzysztof Parzyszek 61d9032bf3 [RDF] Replace potentially unclear autos with real types
llvm-svn: 283445
2016-10-06 13:05:13 +00:00
Hal Finkel 4d6f3088c3 [llvm-opt-report] Record VF, etc. correctly for multiple opts on one line
When there are multiple optimizations on one line, record the vectorization
factors, etc. correctly (instead of incorrectly substituting default values).

llvm-svn: 283443
2016-10-06 11:58:52 +00:00
Diana Picus 6341e46cd1 Revert "[ARM] Use __rt_div functions for divrem on Windows"
This reverts commit r283383 because it broke some of the bots:
undefined reference to ` __aeabi_uldivmod'

It affected (at least) clang-cmake-armv7-a15-selfhost,
clang-cmake-armv7-a15-selfhost and clang-native-arm-lnt.

llvm-svn: 283442
2016-10-06 11:24:29 +00:00
Hal Finkel 47faf3be89 [llvm-opt-report] Print line numbers starting from 1
Line numbers should start from 1, not 2.

llvm-svn: 283440
2016-10-06 11:11:11 +00:00
Henric Karlsson 54a53bd303 Test commit access (NFC)
llvm-svn: 283439
2016-10-06 10:58:41 +00:00
Matt Arsenault 10c17ca6c6 AMDGPU: Partially fix reported code size for some instructions
These ones need to have the size on the pseudo instruction set for
getInstSizeInBytes to work correctly. These also have a statically
known size.

llvm-svn: 283437
2016-10-06 10:13:23 +00:00
Zvi Rackover 08a37f46e3 Add test-cases which demontrate pr30561
llvm-svn: 283436
2016-10-06 10:04:00 +00:00
Bjorn Pettersson 3961603921 [ValueTracking] Teach computeKnownBits and ComputeNumSignBits to look through ExtractElement.
Summary:
The computeKnownBits and ComputeNumSignBits functions in ValueTracking can now do a simple look-through of ExtractElement.

Reviewers: majnemer, spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D24955

llvm-svn: 283434
2016-10-06 09:56:21 +00:00
Sagar Thakur f9292220dc [EfficiencySanitizer] Adds shadow memory parameters for 40-bit virtual memory address.
Adding 40-bit shadow memory parameters because MIPS64 uses 40-bit virtual memory addresses.

Reviewed by rengolin.
Differential: https://reviews.llvm.org/D23801

llvm-svn: 283433
2016-10-06 09:52:06 +00:00
Nuno Lopes d3f5af0fe4 fix build on cygwin
Cygwin has dlfcn.h, but no Dl_info

llvm-svn: 283427
2016-10-06 09:32:16 +00:00
James Molloy 6215fad0e9 [ARM] Constant pool promotion - fix alignment calculation
Global variables are GlobalValues, so they have explicit alignment. Querying
DataLayout for the alignment was incorrect.

Testcase added.

llvm-svn: 283423
2016-10-06 07:56:00 +00:00
James Molloy 78561c4917 [ARM] Improve testcase for r283323
We can work around a shortcoming of FileCheck by using {{\[}} to match a square
bracket before a [[ sequence.

Thanks to Eli Friedman for the heads up!

llvm-svn: 283422
2016-10-06 07:44:05 +00:00
Petr Hosek e023d62e76 [Triple] Add triple for Fuchsia
Fuchsia is a new operating system.

Differential Revision: https://reviews.llvm.org/D25116

llvm-svn: 283419
2016-10-06 05:17:26 +00:00
Kostya Serebryany 936b1e774f [libFuzzer] be more careful with memory usage, print peak rss in status lines
llvm-svn: 283418
2016-10-06 05:14:00 +00:00
Konstantin Zhuravlyov b4eb5d5049 [AMDGPU] Promote uniform i16 bitreverse intrinsic to i32
Differential Revision: https://reviews.llvm.org/D25121

llvm-svn: 283415
2016-10-06 02:20:46 +00:00
Kostya Serebryany 3b564e9765 [libFuzzer] when re-running for lsan, don't look at the coverage
llvm-svn: 283411
2016-10-05 23:31:01 +00:00
Sanjay Patel edc2baddf8 [DAG] add tests to show missing checks for SDNode FMF
The AVX attribute is added to remove noise caused by SSE's destructive insts.  

llvm-svn: 283410
2016-10-05 23:20:32 +00:00
Kostya Serebryany 1c73f1bf27 [libFuzzer] refactoring to make -shrink=1 work for value profile, added a test.
llvm-svn: 283409
2016-10-05 22:56:21 +00:00
Hal Finkel 5d0fbbbca1 Fix tests for Windows
We need to match file names with both forward and backward slashes.

llvm-svn: 283407
2016-10-05 22:48:13 +00:00
Richard Smith 061a0bf8fd Add missing #include from r283039. Found by modules build.
llvm-svn: 283405
2016-10-05 22:40:54 +00:00
Reid Kleckner bb96df602e [codeview] Truncate records to maximum record size near 64KB
If we don't truncate, LLVM asserts when the label difference doesn't fit
in a 16 bit field. This patch truncates two kinds of data: trailing null
terminated names in symbol records, and inline line tables. The inline
line table test that I have is too large (many MB), so I'm not checking
it in.

Hopefully fixes PR28264.

llvm-svn: 283403
2016-10-05 22:36:07 +00:00
Hal Finkel 5aa0248059 [llvm-opt-report] Distinguish inlined contexts when optimizations differ
How code is optimized sometimes, perhaps often, depends on the context into
which it was inlined. This change allows llvm-opt-report to track the
differences between the optimizations performed, or not, in different contexts,
and when these differ, display those differences.

For example, this code:

  $ cat /tmp/q.cpp
  void bar();
  void foo(int n) {
    for (int i = 0; i < n; ++i)
      bar();
  }

  void quack() {
    foo(4);
  }

  void quack2() {
    foo(4);
  }

will now produce this report:

  < /home/hfinkel/src/llvm/test/tools/llvm-opt-report/Inputs/q.cpp
   2         | void bar();
   3         | void foo(int n) {
   [[
    > foo(int):
   4         |   for (int i = 0; i < n; ++i)
    > quack(), quack2():
   4  U4     |   for (int i = 0; i < n; ++i)
   ]]
   5         |     bar();
   6         | }
   7         |
   8         | void quack() {
   9 I       |   foo(4);
  10         | }
  11         |
  12         | void quack2() {
  13 I       |   foo(4);
  14         | }
  15         |

Note that the tool has demangled the function names, and grouped the reports
associated with line 4. This shows that the loop on line 4 was unrolled by a
factor of 4 when inlined into the functions quack() and quack2(), but not in
the function foo(int) itself.

llvm-svn: 283402
2016-10-05 22:25:33 +00:00
Adrian Prantl b3510afcd1 Verifier: Reject any unknown named MD nodes in the llvm.dbg namespace.
This came out of a discussion in https://reviews.llvm.org/D25285.

There used to be various other llvm.dbg.* nodes, but we don't support
upgrading them and we want to reserve the namespace for future uses.

This also removes an entirely obsolete and bitrotted testcase for PR7662.

Reapplies 283390 with a forgotten testcase.

llvm-svn: 283400
2016-10-05 22:15:37 +00:00
Adrian Prantl 497f085475 Revert "Verifier: Reject any unknown named MD nodes in the llvm.dbg namespace."
Forgot to add a testcase in r283390.

llvm-svn: 283399
2016-10-05 22:15:34 +00:00
Hal Finkel 52031b7e65 Add an llvm-opt-report tool to generate basic source-annotated optimization summaries
LLVM now has the ability to record information from optimization remarks in a
machine-consumable YAML file for later analysis. This can be enabled in opt
(see r282539), and D25225 adds a Clang flag to do the same. This patch adds
llvm-opt-report, a tool to generate basic optimization "listing" files
(annotated sources with information about what optimizations were performed)
from one of these YAML inputs.

D19678 proposed to add this capability directly to Clang, but this more-general
YAML-based infrastructure was the direction we decided upon in that review
thread.

For this optimization report, I focused on making the output as succinct as
possible while providing information on inlining and loop transformations. The
goal here is that the source code should still be easily readable in the
report. My primary inspiration here is the reports generated by Cray's tools
(http://docs.cray.com/books/S-2496-4101/html-S-2496-4101/z1112823641oswald.html).
These reports are highly regarded within the HPC community. Intel's compiler,
for example, also has an optimization-report capability
(https://software.intel.com/sites/default/files/managed/55/b1/new-compiler-optimization-reports.pdf).

  $ cat /tmp/v.c
  void bar();
  void foo() { bar(); }

  void Test(int *res, int *c, int *d, int *p, int n) {
    int i;

  #pragma clang loop vectorize(assume_safety)
    for (i = 0; i < 1600; i++) {
      res[i] = (p[i] == 0) ? res[i] : res[i] + d[i];
    }

    for (i = 0; i < 16; i++) {
      res[i] = (p[i] == 0) ? res[i] : res[i] + d[i];
    }

    foo();

    foo(); bar(); foo();
  }

D25225 adds -fsave-optimization-record (and
-fsave-optimization-record=filename), and this would be used as follows:

  $ clang -O3 -o /tmp/v.o -c /tmp/v.c -fsave-optimization-record
  $ llvm-opt-report /tmp/v.yaml > /tmp/v.lst
  $ cat /tmp/v.lst

  < /tmp/v.c
   2          | void bar();
   3          | void foo() { bar(); }
   4          |
   5          | void Test(int *res, int *c, int *d, int *p, int n) {
   6          |   int i;
   7          |
   8          | #pragma clang loop vectorize(assume_safety)
   9     V4,2 |   for (i = 0; i < 1600; i++) {
  10          |     res[i] = (p[i] == 0) ? res[i] : res[i] + d[i];
  11          |   }
  12          |
  13  U16     |   for (i = 0; i < 16; i++) {
  14          |     res[i] = (p[i] == 0) ? res[i] : res[i] + d[i];
  15          |   }
  16          |
  17 I        |   foo();
  18          |
  19          |   foo(); bar(); foo();
     I        |   ^
     I        |                 ^
  20          | }

Each source line gets a prefix giving the line number, and a few columns for
important optimizations: inlining, loop unrolling and loop vectorization. An
'I' is printed next to a line where a function was inlined, a 'U' next to an
unrolled loop, and 'V' next to a vectorized loop. These are printed on the
relevant code line when that seems unambiguous, or on subsequent lines when
multiple potential options exist (messages, both positive and negative, from
the same optimization with different column numbers are taken to indicate
potential ambiguity). When on subsequent lines, a '^' is output in the relevant
column.

Annotated source for all relevant input files are put into the listing file
(each starting with '<' and then the file name).

You can disable having the unrolling/vectorization factors appear by using the
-s flag.

Differential Revision: https://reviews.llvm.org/D25262

llvm-svn: 283398
2016-10-05 22:10:35 +00:00
Reid Kleckner 6f83e8b1d7 Remove extra semicolon
llvm-svn: 283395
2016-10-05 21:46:56 +00:00
Reid Kleckner b0311b290e Fix the build with MSVC 2013, still cannot default move ctors yet
Ten days.

llvm-svn: 283394
2016-10-05 21:44:46 +00:00
Sanjay Patel 5839858584 [DAG] change test to use 'unsafe' function attribute instead of global setting
But we have node-level FMF, so the next step is to fix this at the instruction/node-level.

llvm-svn: 283393
2016-10-05 21:43:50 +00:00
David Callahan c1051ab26e Modify df_iterator to support post-order actions
Summary: This makes a change to the state used to maintain visited information for depth first iterator. We know assume a method "completed(...)" which is called after all children of a node have been visited. In all existing cases, this method does nothing so this patch has no functional changes.  It will however allow a client to distinguish back from cross edges in a DFS tree.

Reviewers: nadav, mehdi_amini, dberlin

Subscribers: MatzeB, mzolotukhin, twoh, freik, llvm-commits

Differential Revision: https://reviews.llvm.org/D25191

llvm-svn: 283391
2016-10-05 21:36:16 +00:00
Adrian Prantl 71bba7253e Verifier: Reject any unknown named MD nodes in the llvm.dbg namespace.
This came out of a discussion in https://reviews.llvm.org/D25285.

There used to be various other llvm.dbg.* nodes, but we don't support
upgrading them and we want to reserve the namespace for future uses.

This also removes an entirely obsolete and bitrotted testcase for PR7662.

llvm-svn: 283390
2016-10-05 21:31:19 +00:00
Dan Gohman 5a68ec7f09 [WebAssembly] Add binary-encoding opcode values to instruction descriptions.
llvm-svn: 283389
2016-10-05 21:24:08 +00:00
Reid Kleckner 2b3e6428e5 [codeview] Translate bitpiece metadata to DEFRANGE_SUBFIELD* records
This allows LLVM to describe locations of aggregate variables that have
been split by SROA.

Fixes PR29141

Reviewers: amccarth, majnemer

Differential Revision: https://reviews.llvm.org/D25253

llvm-svn: 283388
2016-10-05 21:21:33 +00:00
Lang Hames a5e873e2a1 [Object] Fix a crash in Archive::child_iterator's default constructor.
To be default constructible, Archive::child_iterator needs to be able to
construct an Archive::Child with a null parent, however Archive::Child's
constructor always dereferenced its Parent argument to compute the remaining
archive size. This commit fixes Archive::Child's constructor to only do the
size calculation when the parent is non-null.

llvm-svn: 283387
2016-10-05 21:20:00 +00:00
Martin Storsjo f997759aef [ARM] Use __rt_div functions for divrem on Windows
This avoids falling back to calling out to the GCC rem functions
(__moddi3, __umoddi3) when targeting Windows.

The __rt_div functions have flipped the two arguments compared
to the __aeabi_divmod functions. To match MSVC, we emit a
check for division by zero before actually calling the library
function (even if the library function itself also might do
the same check).

Not all calls to __rt_div functions for division are currently
merged with calls to the same function with the same parameters
for the remainder. This is more wasteful than a div + mls as before,
but avoids calls to __moddi3.

Differential Revision: https://reviews.llvm.org/D24076

llvm-svn: 283383
2016-10-05 21:08:02 +00:00
James Y Knight b0a473aaf8 [Sparc] Implement UMUL_LOHI and SMUL_LOHI instead of MULHS/MULHU/MUL.
This is what the instruction-set actually provides, and the default
expansions of the others into the lohi opcodes are good.

llvm-svn: 283381
2016-10-05 20:54:17 +00:00
Vitaly Buka f12b1c700c [ADT] Add missing const_iterator DenseSet::find() const
Summary: Probably overlooked.

Reviewers: eugenis, dblaikie

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D24689

llvm-svn: 283377
2016-10-05 20:36:39 +00:00
Anna Zaks 9a6a6eff0e [asan] Reapply: Switch to using dynamic shadow offset on iOS
The VM layout is not stable between iOS version releases, so switch to dynamic shadow offset.

This is the LLVM counterpart of https://reviews.llvm.org/D25218

Differential Revision: https://reviews.llvm.org/D25219

llvm-svn: 283376
2016-10-05 20:34:13 +00:00
Yunzhong Gao ba150d6156 Improve the debug-info test created in r274263.
This patch is related to r274263 or Phabricator/D21818.
This patch aims to improve the test case added in the previous commit to verify
specifically that the stack protector pass is adding the debug line info as
intended. Before, the test only verified that the verifier pass does not crash.
The current approach is to generate the assembly output and then look for the
.loc directive.

Differential Revision: https://reviews.llvm.org/D25290

llvm-svn: 283374
2016-10-05 20:26:29 +00:00
Matthew Simpson a58c50dff0 [LV] Pass profitability analysis in vectorizer constructor (NFC)
The vectorizer already holds a pointer to one cost model artifact in a member
variable (i.e., MinBWs). As we add more, it will be easier to communicate these
artifacts to the vectorizer if we simply pass a pointer to the cost model
instead.

llvm-svn: 283373
2016-10-05 20:23:46 +00:00
Krzysztof Parzyszek 3b6cbd55f7 [RDF] Fix live def propagation through basic block
llvm-svn: 283371
2016-10-05 20:08:09 +00:00
Matthias Braun 0a6916f303 AMDGPU: Do not re-use tmpreg in spill/restore lowering
The register scavenging code does not support multiple definitions of
the same vreg.

Differential Revision: https://reviews.llvm.org/D25220

llvm-svn: 283369
2016-10-05 20:02:51 +00:00
Matthew Simpson 386546124f [LV] Pass legality analysis in vectorizer constructor (NFC)
The vectorizer already holds a pointer to the legality analysis in a member
variable, so it makes sense that we would pass it in the constructor.

llvm-svn: 283368
2016-10-05 19:53:20 +00:00
Peter Collingbourne d799d28540 FastISel: Remove unused/un-overridden entry points. NFCI.
llvm-svn: 283366
2016-10-05 19:25:20 +00:00
Matthew Simpson 6a8e0bcf3d [LV] Remove obsolete comment (NFC)
llvm-svn: 283365
2016-10-05 19:19:49 +00:00
Matthew Simpson ee3fdc7e26 [LV] Use getScalarizationOverhead in memory instruction costs (NFC)
This patch refactors the cost estimation of scalarized loads and stores to
reuse getScalarizationOverhead for the cost of the extractelement and
insertelement instructions we might create. The existing code accounted for
this cost, but it was functionally equivalent to the helper function.

llvm-svn: 283364
2016-10-05 19:11:54 +00:00
Sanjay Patel a40c479fe9 fix documentation comments; NFC
llvm-svn: 283361
2016-10-05 18:51:12 +00:00
Rafael Espindola 37fc0183d7 Allow the caller to pass in the hash.
If the caller already has the hash we don't have to compute it. This
will be used in lld.

llvm-svn: 283359
2016-10-05 18:46:21 +00:00
Reid Kleckner f9dddec21c Improve DEBUG_VALUE assembly comments for spilled bitpieces
Previously we would give up when we saw the bitpiece DWARF expression
and print "[complex expression]" when actually we handled bitpiece
expressions outside the loop.

llvm-svn: 283355
2016-10-05 18:36:02 +00:00
Matthew Simpson 1755d81b29 [LV] Add helper function for predicated block probability (NFC)
The cost model has to estimate the probability of executing predicated blocks.
However, we currently always assume predicated blocks have a 50% chance of
executing (this value is hardcoded in several places throughout the code).
Since we always use the same value, this patch adds a helper function for
getting this uniform probability. The function simplifies some comments and
makes our assumptions more clear. In the future, we may want to extend this
with actual block probability information if it's available.

llvm-svn: 283354
2016-10-05 18:30:36 +00:00
Simon Dardis 299dbd6cd1 [mips][ias] fix li macro when values are negated with ~
The integrated assembler evaluates the expressions such as ~0x80000000 to
0xffffffff7fffffff early in the parsing process. This patch adds compatibility
with gas so that li loads the expected value (0x7fffffff) in those cases. This
only occurs iff all the upper 32bits are set and maintains existing checks by
not truncating the result down to 32 bits if any of the the upper bits are not
set.

Reviewers: dsanders, zoran.jovanovic

Differential Review: https://reviews.llvm.org/D23399

llvm-svn: 283353
2016-10-05 18:26:19 +00:00
Matthew Simpson c631167609 [LV] Add isScalarWithPredication helper function (NFC)
This patch adds a single helper function for checking if an instruction will be
scalarized with predication. Such instructions include conditional stores and
instructions that may divide by zero. Existing checks have been updated to use
the new function.

llvm-svn: 283350
2016-10-05 17:52:34 +00:00
Anna Zaks e732ce4dff Revert "[asan] LLVM: Switch to using dynamic shadow offset on iOS"
This reverts commit abe77a118615cd90b0d7f127e4797096afa2b394.

Revert as these changes broke a Chromium buildbot.

llvm-svn: 283348
2016-10-05 17:42:02 +00:00
Bjorn Pettersson 12559441bd [DAG] Teach computeKnownBits and ComputeNumSignBits in SelectionDAG to look through EXTRACT_VECTOR_ELT.
Summary: Both computeKnownBits and ComputeNumSignBits can now do a simple
look-through of EXTRACT_VECTOR_ELT. It will compute the result based
on the known bits (or known sign bits) for the vector that the element
is extracted from.

Reviewers: bogner, tstellarAMD, mkuper

Subscribers: wdng, RKSimon, jyknight, llvm-commits, nhaehnle

Differential Revision: https://reviews.llvm.org/D25007

llvm-svn: 283347
2016-10-05 17:40:27 +00:00
Bjorn Pettersson ddd31e5637 Test commit permission. NFC
llvm-svn: 283346
2016-10-05 17:22:11 +00:00
Zachary Turner aad1583877 Fix build due to comparison of std::pairs.
llvm-svn: 283342
2016-10-05 17:04:36 +00:00
Zachary Turner aa0a562bd7 Add llvm::enumerate() range adapter.
This allows you to enumerate over a range using a range-based
for while the return type contains the index of the enumeration.

Differential revision: https://reviews.llvm.org/D25124

llvm-svn: 283337
2016-10-05 16:54:09 +00:00
Rafael Espindola 24db10d8e1 Don't pass null to memcpy. Should fix the asan bots.
llvm-svn: 283336
2016-10-05 16:33:03 +00:00
Simon Dardis f45a59f80b Recommit: "[mips] Add rsqrt, recip for MIPS"
Add rsqrt.[ds], recip.[ds] for MIPS. Correct the microMIPS definitions for
architecture support and register usage.

Reviewers: vkalintiris, zoran.jovanoic

Differential Review: https://reviews.llvm.org/D24499

llvm-svn: 283334
2016-10-05 16:11:01 +00:00
Hans Wennborg c26c03d911 Revert r282920 "X86: Allow conditional tail calls in Win64 "leaf" functions (PR26302)"
This is suspected to cause a miscompile in Chromium. Reverting while
investigating.

llvm-svn: 283329
2016-10-05 15:39:27 +00:00
Simon Dardis bbfd528748 Revert "[mips] Add rsqrt, recip for MIPS"
This reverts commit r282485 which contain two patches instead of
one.

llvm-svn: 283327
2016-10-05 15:28:33 +00:00
Douglas Katzman 0411e8669b [X86] Don't randomly encode %rip where illegal
Differential Revision: https://reviews.llvm.org/D25112

llvm-svn: 283326
2016-10-05 15:23:35 +00:00
James Molloy b7de497cb9 [Thumb] Don't try and emit LDRH/LDRB from the constant pool
This is not a valid encoding - these instructions cannot do PC-relative addressing.

The underlying problem here is of whitelist in ARMISelDAGToDAG that unwraps ARMISD::Wrappers during addressing-mode selection. This didn't realise TargetConstantPool was actually possible, so didn't handle it.

llvm-svn: 283323
2016-10-05 14:52:13 +00:00
Douglas Katzman 8449b238ea [X86] Fix some tests that didn't assert anything
llvm-svn: 283322
2016-10-05 14:46:14 +00:00
Oren Ben Simhon 0670e5a35b Test commit permission
llvm-svn: 283319
2016-10-05 14:12:41 +00:00
Oren Ben Simhon a2010755fa Test commit permission
llvm-svn: 283318
2016-10-05 13:48:33 +00:00
Dylan McKay afff169f17 [AVR] Don't select 'MOVW' instructions when they are not supported
We have a subtarget feature which we were ignoring, which was causing us
to generate unsupported instructions for some older chips.

llvm-svn: 283317
2016-10-05 13:38:29 +00:00
Dylan McKay 82ef77091c [AVR] Add AVRRegisterInfo::splitReg function
No tests are included just yet - this is used from the pseudo
instruction expander pass, which hasn't been pulled in-tree yet.

llvm-svn: 283316
2016-10-05 13:27:30 +00:00
Krzysztof Parzyszek e7c72cdbb0 Fix machine operand traversal in ScheduleDAGInstrs::fixupKills
llvm-svn: 283315
2016-10-05 13:15:06 +00:00
Dylan McKay ea55554803 [AVR] Update return type of dynamic alloca pass
It was recently changed from 'const char*' to StringRef

llvm-svn: 283312
2016-10-05 12:32:24 +00:00
Dylan McKay 192405a31a [AVR] Add the AVR frame lowering code
Summary: This allows AVR to lower frames into assembly code.

Reviewers: arsenm, kparzysz

Subscribers: japaric, wdng, beanz, mgorny

Differential Revision: https://reviews.llvm.org/D25032

llvm-svn: 283311
2016-10-05 11:48:56 +00:00
Dylan McKay c1760424de [AVR] Split all of the AVR device definitions into a separate file
We have ~500 lines of subtarget feature definitions, they don't belong
in our main TableGen file.

llvm-svn: 283310
2016-10-05 10:28:45 +00:00
Dylan McKay 5af1248230 [AVR] Enable the instruction printer in the target definition
llvm-svn: 283309
2016-10-05 10:23:38 +00:00
Dylan McKay f66e120b3b [AVR] Add definitions for the ATTiny102 and ATtiny104 chips
llvm-svn: 283308
2016-10-05 10:20:33 +00:00
Mehdi Amini 149f6eaed9 Re-commit "Use StringRef in Support/Darf APIs (NFC)"
This reverts commit r283285 and re-commit r283275 with
a fix for format("%s", Str); where Str is a StringRef.

llvm-svn: 283298
2016-10-05 05:59:29 +00:00
Dylan McKay efe40389c0 [AVR] Add the machine code backend
Summary:
This adds the AVR machine code backend (`AVRAsmBackend.cpp`). This will
allow us to generate machine code from assembled AVR instructions.

Reviewers: arsenm, kparzysz

Subscribers: modocache, japaric, wdng, beanz, mgorny

Differential Revision: https://reviews.llvm.org/D25029

llvm-svn: 283297
2016-10-05 05:30:19 +00:00
Dean Michael Berris 27358cff88 [Support][CommandLine] Add cl::getRegisteredSubcommands()
This should allow users of the library to get a range to iterate through
all the subcommands that are registered to the global parser. This
allows users to define subcommands in libraries that self-register to
have dispatch done at a different stage (like main). It allows for
writing code like the following:

    for (auto *S : cl::getRegisteredSubcommands()) {
      if (*S) {
	// Dispatch on S->getName().
      }
    }

This change also contains tests that show this usage pattern.

Reviewers: zturner, dblaikie, echristo

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D24489

llvm-svn: 283296
2016-10-05 05:20:08 +00:00
Mehdi Amini e4f0b75e3d Blind attempt to fix windows build after r283290 - Use StringRef in StringSaver API (NFC)
llvm-svn: 283294
2016-10-05 01:41:11 +00:00
Mehdi Amini 5b00770c35 Use StringRef in ARMConstantPool APIs (NFC)
llvm-svn: 283293
2016-10-05 01:41:06 +00:00
Kyle Butt 25ac35d822 Revert "Codegen: Tail-duplicate during placement."
This reverts commit 062ace9764953e9769142c1099281a345f9b6bdc.

Issue with loop info and block removal revealed by polly.
I have a fix for this issue already in another patch, I'll re-roll this
together with that fix, and a test case.

llvm-svn: 283292
2016-10-05 01:39:29 +00:00
Mehdi Amini 3e021be3b6 Use StringRef in FastISel API (NFC)
llvm-svn: 283291
2016-10-05 01:37:29 +00:00
Mehdi Amini ec4fb5ba97 Use StringRef in StringSaver API (NFC)
llvm-svn: 283290
2016-10-05 01:32:41 +00:00
Mehdi Amini a6f81ca8ea Use StringRef in ARCRuntimeEntryPoints APIs (NFC)
llvm-svn: 283288
2016-10-05 01:15:04 +00:00
Kostya Serebryany 379359c53a [libFuzzer] add ShrinkValueProfileTest, move code around, NFC
llvm-svn: 283286
2016-10-05 01:09:40 +00:00
Mehdi Amini 2bcac0fac4 Revert "Re-commit "Use StringRef in Support/Darf APIs (NFC)""
One test seems randomly broken: DebugInfo/X86/gnu-public-names.ll

llvm-svn: 283285
2016-10-05 01:04:02 +00:00
Mehdi Amini a28bb09f28 Use StringRef in MCSectionMachO (NFC)
llvm-svn: 283284
2016-10-05 01:02:34 +00:00
Mehdi Amini 215ff8df74 Use StringRef in DarwinAsmParser (NFC)
llvm-svn: 283283
2016-10-05 01:02:22 +00:00
Michael Zolotukhin 5cda89ad36 [LoopDistribute] Fix a typo in the pass name.
llvm-svn: 283282
2016-10-05 00:44:52 +00:00
Mehdi Amini 32b297a42f Re-commit "Use StringRef in Support/Darf APIs (NFC)"
This reverts commit r283278 and re-commit r283275 with
the update to fix the build on the LLDB side.

llvm-svn: 283281
2016-10-05 00:37:18 +00:00
Kostya Serebryany 2455f0d013 [libFuzzer] clear the corpus elements if they are evicted (i.e. smaller elements with proper coverage are found). Make sure we never try to mutate empty element. Print the corpus size in bytes in the status lines
llvm-svn: 283279
2016-10-05 00:25:17 +00:00
Mehdi Amini 78b04ae7ac Revert "Use StringRef in Support/Darf APIs (NFC)"
This reverts commit r283275, it broke LLDB Android debug server.

llvm-svn: 283278
2016-10-05 00:21:14 +00:00
Mehdi Amini c6caed8fa1 Use StringRef instead of raw pointers in ARMBuildAttrs (NFC)
llvm-svn: 283277
2016-10-05 00:15:18 +00:00
Mehdi Amini e0327be584 Use StringRef in Support/Darf APIs (NFC)
llvm-svn: 283275
2016-10-04 23:55:40 +00:00
Kyle Butt adabac2d57 Codegen: Tail-duplicate during placement.
The tail duplication pass uses an assumed layout when making duplication
decisions. This is fine, but passes up duplication opportunities that
may arise when blocks are outlined. Because we want the updated CFG to
affect subsequent placement decisions, this change must occur during
placement.

In order to achieve this goal, TailDuplicationPass is split into a
utility class, TailDuplicator, and the pass itself. The pass delegates
nearly everything to the TailDuplicator object, except for looping over
the blocks in a function. This allows the same code to be used for tail
duplication in both places.

This change, in concert with outlining optional branches, allows
triangle shaped code to perform much better, esepecially when the
taken/untaken branches are correlated, as it creates a second spine when
the tests are small enough.

Issue from previous rollback fixed, and a new test was added for that
case as well.

Differential revision: https://reviews.llvm.org/D18226

llvm-svn: 283274
2016-10-04 23:54:18 +00:00
Mehdi Amini 32986ede31 Use StringRef in TableGen (NFC)
llvm-svn: 283273
2016-10-04 23:47:33 +00:00
Manuel Jacob 49fafb1109 [C API] Add LLVMConstExactUDiv and LLVMBuildExactUDiv functions.
Summary:
These are analog to the existing LLVMConstExactSDiv and LLVMBuildExactSDiv
functions.

Reviewers: deadalnix, majnemer

Subscribers: majnemer, llvm-commits

Differential Revision: https://reviews.llvm.org/D25259

llvm-svn: 283269
2016-10-04 23:32:42 +00:00
Mehdi Amini 3a1f73488c Use StringRef in TableGen emitted API for attribute (NFC)
llvm-svn: 283268
2016-10-04 23:31:39 +00:00
Rafael Espindola 39751afc4e Misc improvements to StringTableBuilder.
This patch adds write methods to StringTableBuilder so that it is
easier to change the underlying implementation.

Using the write methods, avoid creating a temporary buffer when using
mmaped output.

It also uses a more compact key in the DenseMap. Overall this produces
a slightly faster lld:

firefox
  master 6.853419709
  patch  6.841968912 1.00167361138x faster
chromium
  master 4.297280174
  patch  4.298712163 1.00033323147x slower
chromium fast
  master 1.802335952
  patch  1.806872459 1.00251701521x slower
the gold plugin
  master 0.3247149
  patch  0.321971644 1.00852017888x faster
clang
  master 0.551279945
  patch  0.543733194 1.01387951128x faster
llvm-as
  master 0.032743458
  patch  0.032143478 1.01866568391x faster
the gold plugin fsds
  master 0.350814247
  patch  0.348571741 1.00643341309x faster
clang fsds
  master 0.6281672
  patch  0.621130222 1.01132931187x faster
llvm-as fsds
  master 0.030168899
  patch  0.029797155 1.01247582194x faster
scylla
  master 3.104222518
  patch  3.059590248 1.01458766252x faster

llvm-svn: 283266
2016-10-04 22:43:25 +00:00
Alina Sbirlea 9a78ebd6d8 [cpu-detection] Copy simplified version of get_cpuid_max to remove dependency to clang's implementation
Summary:
Attempting to fix PR30384.
Take the same approach as in compiler_rt and add a simplified version of __get_cpuid_max.
Including cpuid.h is no longer needed.

Reviewers: echristo, joerg

Subscribers: mehdi_amini, llvm-commits

Differential Revision: https://reviews.llvm.org/D24597

llvm-svn: 283265
2016-10-04 22:39:53 +00:00
David L Kreitzer 7c7ee89b01 Revert r283248. It caused failures in the hexagon buildbots.
llvm-svn: 283254
2016-10-04 20:57:19 +00:00
Sanjay Patel bfdbea6481 [Target] move reciprocal estimate settings from TargetOptions to TargetLowering
The motivation for the change is that we can't have pseudo-global settings for
codegen living in TargetOptions because that doesn't work with LTO.

Ideally, these reciprocal attributes will be moved to the instruction-level via
FMF, metadata, or something else. But making them function attributes is at least
an improvement over the current state.

The ingredients of this patch are:

    Remove the reciprocal estimate command-line debug option.
    Add TargetRecip to TargetLowering.
    Remove TargetRecip from TargetOptions.
    Clean up the TargetRecip implementation to work with this new scheme.
    Set the default reciprocal settings in TargetLoweringBase (everything is off).
    Update the PowerPC defaults, users, and tests.
    Update the x86 defaults, users, and tests.

Note that if this patch needs to be reverted, the related clang patch checked in
at r283251 should be reverted too.

Differential Revision: https://reviews.llvm.org/D24816

llvm-svn: 283252
2016-10-04 20:46:43 +00:00
Kevin Enderby f993d6e72c Next set of additional error checks for invalid Mach-O files for the
load commands that uses the MachO::encryption_info_command and
MachO::encryption_info_command types but not used in llvm libObject
code but used in llvm tool code.

This includes just LC_ENCRYPTION_INFO and
LC_ENCRYPTION_INFO_64 load commands.

llvm-svn: 283250
2016-10-04 20:37:43 +00:00
David L Kreitzer fedb9b67ca [safestack] Requires a valid TargetMachine to be passed to the SafeStack pass.
Patch by Michael LeMay

Differential revision: http://reviews.llvm.org/D24896

llvm-svn: 283248
2016-10-04 20:31:32 +00:00
Michal Gorny bab7943c6c [cmake] Make LIT_COMMAND configurable and improve fallback support
Make LIT_COMMAND configurable, use source tree only when actually
available and extend the default search to other common executable names
'lit.py' and 'lit', in order to increase uniformity between all LLVM
projects and support using installed lit.

Changing the conditional used to determine whether in-tree or external
lit is being used covers the case when LLVM_MAIN_SRC_DIR is defined but
does not exist (anymore). In this case, the functions falls back to
looking for installed lit rather than attempting to use a non-existing
path. The same conditional is used in clang already.

Making LIT_COMMAND a cache variable in case the source tree variant is
used serves two purposes. Firstly, it increases uniformity between
the two branches since find_program() implicitly makes LIT_COMMAND
a cache variable. Secondly, it allows overriding the lit executable used
to run the tests when the LLVM source tree is provided. Gentoo is
planning to use this to use installed (and byte-compiled) lit instead of
re-compiling it in every LLVM project.

Extending default search is meant to increase uniformity between
different LLVM projects. The 'lit.py' name is already used by a few of
them, and 'lit' is the name used by utils/lit/setup.py when installing.

Differential Revision: https://reviews.llvm.org/D25076

llvm-svn: 283247
2016-10-04 20:25:37 +00:00
Zachary Turner c43fa4f23c [Support] Add case-insensitive versions of StringSwitch members.
This adds support for CaseLower, CasesLower, StartsWithLower, and
EndsWithLower.

Differential revision: https://reviews.llvm.org/D24686

llvm-svn: 283244
2016-10-04 19:33:13 +00:00
Matthias Braun 46a5238682 AArch64: Macrofusion: Split features, add missing combinations.
AArch64InstrInfo::shouldScheduleAdjacent() determines whether two
instruction can benefit from macroop fusion on apple CPUs. The list
turned out to be incomplete:
- the "rr" variants of the instructions were missing
- even the "rs" variants can have shift value == 0 and behave like the
  "rr" variants

This also splits the MacropFusion target feature into
ArithmeticBccFusion and ArithmeticCbzFusion.

Differential Revision: https://reviews.llvm.org/D25142

llvm-svn: 283243
2016-10-04 19:28:21 +00:00
Mike Aizatsky 0ef7b1af4c [sancov] renamed symcov-report-server to coverage-report-server
llvm-svn: 283241
2016-10-04 19:18:23 +00:00
Anna Zaks ef97d2c589 [asan] LLVM: Switch to using dynamic shadow offset on iOS
The VM layout is not stable between iOS version releases, so switch to dynamic shadow offset.

This is the LLVM counterpart of https://reviews.llvm.org/D25218

Differential Revision: https://reviews.llvm.org/D25219

llvm-svn: 283239
2016-10-04 19:02:29 +00:00
Hal Finkel bdd6735a9e Don't filter diagnostics written as YAML to the output file
The purpose of the YAML diagnostic output file is to collect information on
optimizations performed, or not performed, for later processing by tools that
help users (and compiler developers) understand how code was optimized. As
such, the diagnostics that appear in the file should not be coupled to what a
user might want to see summarized for them as the compiler runs, and in fact,
because the user likely does not know what optimization diagnostics their tools
might want to use, the user cannot provide a useful filter regardless. As such,
we shouldn't filter the diagnostics going to the output file.

Differential Revision: https://reviews.llvm.org/D25224

llvm-svn: 283236
2016-10-04 18:13:45 +00:00
Chris Bieneman 6816973723 [CMake] Exclude intrinsics_gen from LLVM_COMMON_DEPENDS in LLVMConfig.cmake
CMake requires that all targets expressed as dependencies exist, so we can't have intrinsics_gen in LLVM_COMMON_DEPENDS when it is written out, otherwise projects building out of tree will have CMake errors.

llvm-svn: 283234
2016-10-04 17:44:28 +00:00
Adam Nemet 0428e93217 Serialize remark argument as a mapping to get proper quotation for the value.
llvm-svn: 283231
2016-10-04 17:05:04 +00:00
Adam Nemet 2780ee0dc1 Allow derived classes of OptimizationRemarkAnalysis in YAML
llvm-svn: 283230
2016-10-04 17:05:01 +00:00
Alexey Bataev 7e217c2402 [SLPVectorizer] Add a test with non-vectorizable IR.
llvm-svn: 283225
2016-10-04 15:07:23 +00:00
Anna Thomas 479cbb9405 [RS4GC] Handle ShuffleVector instruction in findBasePointer
Summary:
This patch modifies the findBasePointer to handle the shufflevector instruction.

Tests run: RS4GC tests, local downstream tests.

Reviewers: reames, sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D25197

llvm-svn: 283219
2016-10-04 13:48:37 +00:00
Rafael Espindola fda3dc9266 Remove duplicated typedef. NFC.
llvm-svn: 283216
2016-10-04 13:09:59 +00:00
Andrey Bokhanko 6903be56d5 Fix IntegerType::MAX_INT_BITS value
IntegerType::MAX_INT_BITS is apparently not in sync with Type::SubclassData
size. This patch fixes this.

Differential Revision: https://reviews.llvm.org/D24814

llvm-svn: 283215
2016-10-04 12:43:46 +00:00
Nemanja Ivanovic 6354d23555 [Power9] Exploit D-Form VSX Scalar memory ops that target full VSX register set
This patch corresponds to review:

The newly added VSX D-Form (register + offset) memory ops target the upper half
of the VSX register set. The existing ones target the lower half. In order to
unify these and have the ability to target all the VSX registers using D-Form
operations, this patch defines Pseudo-ops for the loads/stores which are
expanded post-RA. The expansion then choses the correct opcode based on the
register that was allocated for the operation.

llvm-svn: 283212
2016-10-04 11:25:52 +00:00
Simon Dardis 86b3a1e79b [mips][fastisel] Consider soft-float an unsupported floating point mode
Treat soft-float as unsupported for fast-isel. Additionally, ensure we check
that lowering f32 arguments also considers the case of soft-float mode.

Reviewers: ehostunreach, vkalintiris, zoran.jovanovic

Differential Review: https://reviews.llvm.org/D24505

llvm-svn: 283209
2016-10-04 10:35:07 +00:00
George Rimar 67443021a4 [Object/ELF] - Do not crash on invalid sh_offset value of REL[A] section.
Previously code would access invalid memory and may crash,
patch fixes the issue.

Differential revision: https://reviews.llvm.org/D25187

llvm-svn: 283204
2016-10-04 09:25:39 +00:00
whitequark 7c4fe0e9a3 [SelectionDAG] Fix calling convention in expansion of ?MULO.
The SMULO/UMULO DAG nodes, when not directly supported by the target,
expand to a multiplication twice as wide. In case that the resulting
type is not legal, an __mul?i3 intrinsic is used. Since the type is
not legal, the legalizer cannot directly call the intrinsic with
the wide arguments; instead, it "pre-lowers" them by splitting them
in halves.

The "pre-lowering" code in essence made assumptions about
the calling convention, specifically that i(N*2) values will be
split into two iN values and passed in consecutive registers in
little-endian order. This, naturally, breaks on a big-endian system,
such as our OR1K out-of-tree backend.

Thanks to James Miller <james@aatch.net> for help in debugging.

Differential Revision: https://reviews.llvm.org/D25223

llvm-svn: 283203
2016-10-04 09:07:49 +00:00
George Rimar 5cbf23664d [Object/ELF] - Avoid possible crash in getExtendedSymbolTableIndex().
When using broken input object found using AFL,
getExtendedSymbolTableIndex() crashed because ShndxTable
was empty as object does not contain SHT_SYMTAB_SHNDX section.

Differential revision: https://reviews.llvm.org/D25189

llvm-svn: 283196
2016-10-04 08:44:03 +00:00
Sjoerd Meijer 535529b41c Consistent fp denormal mode names. NFC.
This fixes the inconsistency of the fp denormal option names: in LLVM this was
DenormalType, but in Clang this is DenormalMode which seems better.

Differential Revision: https://reviews.llvm.org/D24906

llvm-svn: 283192
2016-10-04 08:03:36 +00:00