Commit Graph

258179 Commits

Author SHA1 Message Date
Davide Italiano e9781e7b2f [NewGVN] Adjust NDEBUG markers.
This avoids 'used but not defined' warnings in Release builds
with GCC.

llvm-svn: 298760
2017-03-25 02:40:02 +00:00
Eric Christopher b70819e6a2 Add preprocessor defines for a bare powerpc64le triple/cpu.
The le triple didn't exist until power8, so use that as a default (this
also matches what gcc does).

llvm-svn: 298759
2017-03-25 02:29:18 +00:00
Yaxun Liu 14834c3e3d [AMDGPU] Switch data layout by triple environment amdgiz
Switch data layout by target triple environment amdgiz and amdgizcl indicating using of an address space mapping in which generic address space is 0.

amdgiz is for non-OpenCL environment where generic address space is 0.

amdgizcl is for OpenCL environment where generic address space is 0.

Differential Revision: https://reviews.llvm.org/D31211

llvm-svn: 298758
2017-03-25 02:05:44 +00:00
Vitaly Buka 72b8acfb70 [libFuzzer] Fix test on Windows.
llvm-svn: 298757
2017-03-25 01:19:45 +00:00
Evgeniy Stepanov 71bb8f1ad0 [asan] Put ctor/dtor in comdat.
When possible, put ASan ctor/dtor in comdat.

The only reason not to is global registration, which can be
TU-specific. This is not the case when there are no instrumented
globals. This is also limited to ELF targets, because MachO does
not have comdat, and COFF linkers may GC comdat constructors.

The benefit of this is a lot less __asan_init() calls: one per DSO
instead of one per TU. It's also necessary for the upcoming
gc-sections-for-globals change on Linux, where multiple references to
section start symbols trigger quadratic behaviour in gold linker.

llvm-svn: 298756
2017-03-25 01:01:11 +00:00
Kostya Serebryany 86e630b857 [libFuzzer] read asan's dedup_token while minimizing a crash and stop minimization if another bug was found during minimization (https://github.com/google/oss-fuzz/issues/452)
llvm-svn: 298755
2017-03-25 00:56:08 +00:00
Richard Trieu 7583bec0c3 [ODRHash] Add support for array and decayed types.
llvm-svn: 298754
2017-03-25 00:48:52 +00:00
Evgeniy Stepanov 656bc5bb5c Fix sanitizer tests with LLVM_TOOL_LLD_BUILD=OFF.
Only depend on LLD if it is going to be built.

Re-land of r298174 which got reverted in r298287.

llvm-svn: 298753
2017-03-25 00:42:25 +00:00
Eli Friedman 95ddd18703 [ARM] Fix mixup between Lo and Hi in SMLALBB formation.
llvm-svn: 298752
2017-03-25 00:13:24 +00:00
Simon Pilgrim dbc94db3f3 Apply clang-format as commented in D31311. NFCI.
llvm-svn: 298751
2017-03-24 23:47:41 +00:00
Reid Kleckner 6b78e16368 [codeview] Don't assert when the user violates the ODR
If we have an array of a user-defined aggregates for which there was an
ODR violation, then the array size will not necessarily match the number
of elements times the size of the element.

Fixes PR32383

llvm-svn: 298750
2017-03-24 23:28:42 +00:00
Rui Ueyama 22f0d804f5 Use raw_fd_ostream::has_colors instead of StandardErrHasColors().
I just didn't know that raw_fd_ostream has has_colors() function.

llvm-svn: 298749
2017-03-24 23:21:34 +00:00
Rui Ueyama 561d72c328 Update comment.
llvm-svn: 298748
2017-03-24 23:21:14 +00:00
Jessica Paquette eac8633d6d [Outliner] Revert r298734.
When I tested r298734, I thought that red zones were enabled by default like in
X86. Since red zones are behind a flag on AArch64 the testing wasn't true.

llvm-svn: 298747
2017-03-24 23:00:21 +00:00
Kostya Serebryany c58982d6fa [libFuzzer] be more careful when calling strlen of strcmp parameters, PR32357
llvm-svn: 298746
2017-03-24 22:19:52 +00:00
Craig Topper 8fbb74b5b2 Revert r298711 "[InstCombine] Provide a way to calculate KnownZero/One for Add/Sub in SimplifyDemandedUseBits without recursing into ComputeKnownBits"
Tsan bot is failing.

llvm-svn: 298745
2017-03-24 22:12:10 +00:00
Sanjay Patel 650599d84d [x86] add 32-bit RUN for better memcmp coverage; NFC
llvm-svn: 298744
2017-03-24 22:09:48 +00:00
Alex Shlyapnikov f51fafde1e Fix flaky strtok.c test.
Asserting the result of strtok when we expect delimiter overflow is
flaky, the result depends on the random state of memory right after the
delimiters.

llvm-svn: 298743
2017-03-24 21:43:56 +00:00
Richard Trieu 73bac6a2f0 [ODRHash] Add error messages for mismatched parameters in methods.
llvm-svn: 298742
2017-03-24 21:17:48 +00:00
Kuba Mracek e598c0d8e1 Follow-up for r298738: Use "0" instead of "false" because the variable is uptr.
llvm-svn: 298741
2017-03-24 21:12:24 +00:00
Kostya Serebryany dba9ded61f [libFuzzer] honor -exact_artifact_path for all intermediate files during crash minimization (https://github.com/google/oss-fuzz/issues/250)
llvm-svn: 298740
2017-03-24 21:09:16 +00:00
Krzysztof Parzyszek ccc075ca20 Move spill size and alignment info from MC to TargetRegisterInfo
This is another step towards implementing register classes with
parametrized register/spill sizes and value types.

This is an updated version of r298652. The difference is that MCRegister-
Class still contains register size, available as getPhysRegSize(). The
old function getSize was retained as a temporary measure to avoid build
breakage for out-of-tree targets.

llvm-svn: 298739
2017-03-24 21:01:16 +00:00
Kuba Mracek 44df297598 Fix an uninitialized field in tsan_block_context_t/AllocContext in tsan_libdispatch_mac.cc.
llvm-svn: 298738
2017-03-24 20:57:33 +00:00
Matt Arsenault 0607a4427b AMDGPU: Fix annotating loops with nested loop conditions
If the branch condition for a loop was a phi which itself
was fed from a phi from a loop, it isn't safe to try
to delete the phi until after the loop is handled.

llvm-svn: 298737
2017-03-24 20:57:10 +00:00
Davide Italiano 6a1209ee87 [MachineScheduler] Add missing machine pass dependency.
llvm-svn: 298736
2017-03-24 20:52:56 +00:00
Ivan Krasin c2124e185c Revert r298620: [LV] Vectorize GEPs
Reason: breaks linking Chromium with LLD + ThinLTO (a pass crashes)
LLVM bug: https://bugs.llvm.org//show_bug.cgi?id=32413

Original change description:

[LV] Vectorize GEPs

This patch adds support for vectorizing GEPs. Previously, we only generated
vector GEPs on-demand when creating gather or scatter operations. All GEPs from
the original loop were scalarized by default, and if a pointer was to be stored
to memory, we would have to build up the pointer vector with insertelement
instructions.

With this patch, we will vectorize all GEPs that haven't already been marked
for scalarization.

The patch refines collectLoopScalars to more exactly identify the scalar GEPs.
The function now more closely resembles collectLoopUniforms. And the patch
moves vector GEP creation out of vectorizeMemoryInstruction and into the main
vectorization loop. The vector GEPs needed for gather and scatter operations
will have already been generated before vectoring the memory accesses.

Original Differential Revision: https://reviews.llvm.org/D30710

llvm-svn: 298735
2017-03-24 20:49:43 +00:00
Jessica Paquette 167af85ec7 [Outliner] Remove no red zone requirment for AArch64
AArch64 doesn't require -mno-red-zone; stack fixups are sufficient here. This was
unnecessarily copied over from the X86 target.

(You can now outline with red zones! Yay!)

Removing the requirement passes all Single/MultiSource tests.

llvm-svn: 298734
2017-03-24 20:47:59 +00:00
Reid Kleckner 5c1500f417 Document how to fetch monorepo SVN revision notes
llvm-svn: 298733
2017-03-24 20:47:41 +00:00
Evgeniy Stepanov 64e872a91f [asan] Delay creation of asan ctor.
Create the constructor in the module pass.
This in needed for the GC-friendly globals change, where the constructor can be
put in a comdat  in some cases, but we don't know about that in the function
pass.

llvm-svn: 298731
2017-03-24 20:42:15 +00:00
Matt Arsenault b5d23271e2 AMDGPU: Implement f16 fround
llvm-svn: 298730
2017-03-24 20:04:18 +00:00
Matt Arsenault b8f8dbc227 AMDGPU: Unify divergent function exits.
StructurizeCFG can't handle cases with multiple
returns creating regions with multiple exits.
Create a copy of UnifyFunctionExitNodes that only
unifies exit nodes that skips exit nodes
with uniform branch sources.

llvm-svn: 298729
2017-03-24 19:52:05 +00:00
Peter Collingbourne cbc69712da Fix a test so that it actually checks the output.
llvm-svn: 298728
2017-03-24 19:32:20 +00:00
Krzysztof Parzyszek edd1ca203b Revert r298652 on Quentin's request
llvm-svn: 298727
2017-03-24 19:18:29 +00:00
Adrian Prantl 4994bc0474 Make testcase less nonsensical while still exercising the same code paths.
llvm-svn: 298726
2017-03-24 19:11:31 +00:00
Matt Arsenault 4c7795dd31 AMDGPU: Fold rcp/rsq of undef to undef
llvm-svn: 298725
2017-03-24 19:04:57 +00:00
Matt Arsenault 18bb24a1be TTI: Split IsSimple in MemIntrinsicInfo
All this did before was assert in EarlyCSE.

llvm-svn: 298724
2017-03-24 18:56:43 +00:00
Stanislav Mekhanoshin 70603dcef2 [AMDGPU] Fold V_CNDMASK with identical source operands
Such instructions sometimes appear after lowering and folding.

Differential Revision: https://reviews.llvm.org/D31318

llvm-svn: 298723
2017-03-24 18:55:20 +00:00
Konstantin Zhuravlyov 4986d9fb45 [AMDGPU] Rename Kind to ValueKind in metadata to be consistent
llvm-svn: 298722
2017-03-24 18:43:15 +00:00
Stanislav Mekhanoshin a27b2cac03 [AMDGPU] Add AMDGPUAliasAnalysis to opt pipeline
Previously it was added only to the BE.

Differential Revision: https://reviews.llvm.org/D31323

llvm-svn: 298721
2017-03-24 18:01:14 +00:00
Teresa Johnson 428b9e0627 [ThinLTO] Correct counting of functions in inliner stats
Summary: Declarations need to be filtered out when counting functions.

Reviewers: eraman

Subscribers: Prazek, llvm-commits

Differential Revision: https://reviews.llvm.org/D31336

llvm-svn: 298720
2017-03-24 17:59:06 +00:00
Benjamin Kramer 80e3d5bb24 [AMDGPU] Don't enforce constexpr, there are still old standard libraries around that don't have a constexpr std::pair.
llvm-svn: 298719
2017-03-24 17:53:06 +00:00
Valery Pykhtin e2419dc907 [AMDGPU] Remove double map lookups in SI scheduler
Patch by Axel Davy (axel.davy@normalesup.org)

Differential revision: https://reviews.llvm.org/D30382

llvm-svn: 298718
2017-03-24 17:49:05 +00:00
Reid Kleckner 5d57752c81 [PDB] Split item and type records when merging type streams
Summary: MSVC does this when producing a PDB.

Reviewers: ruiu

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31316

llvm-svn: 298717
2017-03-24 17:26:38 +00:00
Simon Pilgrim 31c04590e6 [X86][SSE] Add ashr + mask test cases.
Test cases showing cases where we're missing an opportunity to lshr a value with an extended sign to avoid loading a mask

llvm-svn: 298716
2017-03-24 17:25:47 +00:00
Weiming Zhao a78ae8a172 Revert "builtins: Select correct code fragments when compiling for Thumb1/Thum2/ARM ISA."
This reverts commit c3709191b6d36c4c936173f4a9a29a734b12cb15.
(commit by mistake)

llvm-svn: 298715
2017-03-24 17:08:35 +00:00
Weiming Zhao 2dff98414f [Compiler-rt][Builtins] Implement lit-test support (part 2 of 2)
Summary:
Original r297566 (https://reviews.llvm.org/D30802) is splitted into two parts.
This part adds CMakefile/lit.cfg support.

Reviewers: rengolin, compnerd, jroelofs, erik.pilkington

Subscribers: srhines, dberris, mgorny

Differential Revision: https://reviews.llvm.org/D31259

llvm-svn: 298714
2017-03-24 17:06:05 +00:00
Weiming Zhao 19bf8bfa15 builtins: Select correct code fragments when compiling for Thumb1/Thum2/ARM ISA.
Summary:
Value of __ARM_ARCH_ISA_THUMB isn't based on the actual compilation
mode (-mthumb, -marm), it reflect's capability of given CPU.

Due to this:
 - use  __tbumb__ and __thumb2__ insteand of __ARM_ARCH_ISA_THUMB
 - use '.thumb' directive consistently  in all affected files
 - decorate all thumb functions using
   DEFINE_COMPILERRT_THUMB_FUNCTION()

---------
Note: This patch doesn't fix broken Thumb1 variant of __udivsi3 !

Reviewers: weimingz, rengolin, compnerd

Subscribers: aemerson, dim

Differential Revision: https://reviews.llvm.org/D30938

llvm-svn: 298713
2017-03-24 17:06:00 +00:00
Simon Pilgrim dfbf049e7f Fix MSVC 'not all control paths return a value' warning.
llvm-svn: 298712
2017-03-24 16:59:14 +00:00
Craig Topper d4521c2fc2 [InstCombine] Provide a way to calculate KnownZero/One for Add/Sub in SimplifyDemandedUseBits without recursing into ComputeKnownBits
SimplifyDemandedUseBits for Add/Sub already recursed down LHS and RHS for simplifying bits. If that didn't provide any simplifications we fall back to calling computeKnownBits which will recurse again. Instead just take the known bits for LHS and RHS we already have and call into a new function in ValueTracking that can calculate the known bits given the LHS/RHS bits.

llvm-svn: 298711
2017-03-24 16:56:51 +00:00
Valery Pykhtin f7d1023a73 [AMDGPU] Fix SGPR usage count in SI scheduler
Patch by Axel Davy (axel.davy@normalesup.org)

Differential revision: https://reviews.llvm.org/D30149

llvm-svn: 298710
2017-03-24 16:45:50 +00:00