Commit Graph

8 Commits

Author SHA1 Message Date
Chris Lattner b28f214033 Add a new option to indicate we want the code generator to emit code quickly,not spending tons of time microoptimizing it. This is useful for an -O0style of build.
llvm-svn: 24233
2005-11-08 02:11:51 +00:00
Duraid Madina 4645db0948 ask for 16-byte aligned jmpbufs. This should unbreak C++ on IA64 (and
a bunch of other things) but is currently ignored by the code
generator.

llvm-svn: 24206
2005-11-06 04:29:30 +00:00
Duraid Madina f221c261f3 DAG->DAG instruction selection for ia64! "hello world" works, not much else.
use -enable-ia64-dag-isel to turn this on

TODO: delete lowering stuff from the pattern isel
    : get operations on predicate bits working
    : get other bits of pseudocode going
    : use sampo's mulh/mull-using divide-by-constant magic
    : *so* many patterns ("extr", "tbit" and "dep" will be fun :)
    : add FP
    : add a JIT!
    : get it working 100%

in short: this'll be happier in a couple of weeks, but it's here now so
the tester can make me feel guilty sooner.

OTHER: there are a couple of fixes to the pattern isel, in particular
making the linker happy with big blobs of fun like pypy.

llvm-svn: 24058
2005-10-28 17:46:35 +00:00
Jim Laskey 19058c3989 1. Use SubtargetFeatures in llc/lli.
2. Propagate feature "string" to all targets.

3. Implement use of SubtargetFeatures in PowerPCTargetSubtarget.

llvm-svn: 23192
2005-09-01 21:38:21 +00:00
Chris Lattner f11f48ba61 Refactor the addPassesToEmitAssembly interface into a addPassesToEmitFile
interface.

llvm-svn: 22282
2005-06-25 02:48:37 +00:00
Misha Brukman e73e76dc42 Convert tabs to spaces
llvm-svn: 21452
2005-04-22 17:54:37 +00:00
Misha Brukman 89b8c8d215 Remove trailing whitespace
llvm-svn: 21424
2005-04-21 23:13:11 +00:00
Duraid Madina 91ed0a11cf and so it begins...
PHASE 1: write instruction selector
PHASE 2: ???
PHASE 3: profit!

llvm-svn: 20652
2005-03-17 18:17:03 +00:00