1d55f20bee
AVX512: Implemented intrinsics for vshuff32x4, vshuff64x2, vshufi64x2, vshufi32x4
...
Added tests for intrinsics.
Differential Revision: http://reviews.llvm.org/D12525
llvm-svn: 248113
2015-09-20 07:18:53 +00:00
0ede3cbb5c
AVX512: Implement instructions encoding, lowering and intrinsics
...
vinserti64x4, vinserti64x2, vinserti32x8, vinserti32x4, vinsertf64x4, vinsertf64x2, vinsertf32x8, vinsertf32x4
Added tests for encoding, lowering and intrinsics.
Differential Revision: http://reviews.llvm.org/D11893
llvm-svn: 248111
2015-09-20 06:52:42 +00:00
7f69a99c54
AVX512: Implemented encoding and intrinsics for
...
vextracti64x4 ,vextracti64x2, vextracti32x8, vextracti32x4, vextractf64x4, vextractf64x2, vextractf32x8, vextractf32x4
Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11802
llvm-svn: 247276
2015-09-10 12:54:54 +00:00
db7ea86bf4
Revert "AVX512: Implemented encoding and intrinsics for vextracti64x4 ,vextracti64x2, vextracti32x8, vextracti32x4, vextractf64x4, vextractf64x2, vextractf32x8, vextractf32x4 Added tests for intrinsics and encoding."
...
This reverts commit r247149, as it was breaking numerous buildbots of varied architectures.
llvm-svn: 247177
2015-09-09 19:44:40 +00:00
ac29a82921
AVX512: Implemented encoding and intrinsics for
...
vextracti64x4 ,vextracti64x2, vextracti32x8, vextracti32x4, vextractf64x4, vextractf64x2, vextractf32x8, vextractf32x4
Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11802
llvm-svn: 247149
2015-09-09 14:35:09 +00:00
0dcd8bcf24
AVX512: Implemented encoding and intrinsics for vplzcntq, vplzcntd, vpconflictq, vpconflictd
...
Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11931
llvm-svn: 246750
2015-09-03 09:05:31 +00:00
1e58e8adf6
AVX512: Implemented encoding and intrinsics for VGETMANTPD/S , VGETMANTSD/S instructions
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Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11593
llvm-svn: 246642
2015-09-02 11:18:55 +00:00
a6297c701e
AVX512: Implemented encoding and intrinsics for vshufps/d.
...
Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11709
llvm-svn: 246640
2015-09-02 10:50:58 +00:00
2ae0fe3ac3
AVX512: Implemented encoding and intrinsics for vpalignr
...
Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D12270
llvm-svn: 246428
2015-08-31 11:14:02 +00:00
8352a0ddf2
AVX512: Implemented encoding and intrinsics for VGETEXPSS/D instructions
...
Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11528
llvm-svn: 243390
2015-07-28 06:53:28 +00:00
f2460112ad
Implemented encoding and intrinsics of the following instructions
...
vunpckhps/pd, vunpcklps/pd,
vpunpcklbw, vpunpckhbw, vpunpcklwd, vpunpckhwd, vpunpckldq, vpunpckhdq, vpunpcklqdq, vpunpckhqdq
Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D11509
llvm-svn: 243246
2015-07-26 14:41:44 +00:00
074a64e72c
AVX-512: Implemented encoding , DAG lowering and intrinsics for Integer Truncate with/without saturation
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Added tests for DAG lowering ,encoding and intrinsic
Differential Revision: http://reviews.llvm.org/D11218
llvm-svn: 243122
2015-07-24 17:24:15 +00:00
fe414353db
Revert r242990: "AVX-512: Implemented encoding , DAG lowering and ..."
...
This commit broke the build. Numerous build bots broken, and it was
blocking my progress so reverting.
It should be trivial to reproduce -- enable the BPF backend and it
should fail when running llvm-tblgen.
llvm-svn: 242992
2015-07-23 08:03:44 +00:00
da1b2ea955
AVX-512: Implemented encoding , DAG lowering and intrinsics for Integer Truncate with/without saturation
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Added tests for DAG lowering ,encoding and intrinsic
Differential Revision: http://reviews.llvm.org/D11218
llvm-svn: 242990
2015-07-23 07:39:21 +00:00
a5b2e5e2a7
[X86][AVX512] add reduce/range/scalef/rndScale
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include encoding and intrinsics
Differential Revision: http://reviews.llvm.org/D11222
llvm-svn: 242896
2015-07-22 12:00:43 +00:00
a26f10ce18
AVX-512: Added intrinsics for VCVT* instructions.
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All SKX forms. All VCVT instructions for float/double/int/long types.
Differential Revision: http://reviews.llvm.org/D11343
llvm-svn: 242877
2015-07-22 08:56:00 +00:00
0f370936a0
AVX-512: Added all AVX-512 forms of Vector Convert for Float/Double/Int/Long types.
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In this patch I have only encoding. Intrinsics and DAG lowering will be in the next patch.
I temporary removed the old intrinsics test (just to split this patch).
Half types are not covered here.
Differential Revision: http://reviews.llvm.org/D11134
llvm-svn: 242023
2015-07-13 13:26:20 +00:00
7ec4b7a8bb
[x86][AVX512]
...
Add vscalef support
include encoding and intrinsics
review:
http://reviews.llvm.org/D10730
llvm-svn: 240906
2015-06-28 14:30:39 +00:00
5e2f8c4231
AVX-512: Added all forms of VPABS instruction
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Added all intrinsics, tests for encoding, tests for intrinsics.
llvm-svn: 240386
2015-06-23 08:19:46 +00:00
e77566112c
AVX-512: Added intrinsics for VPERMT2W/D/Q/PS/PD and
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VPERMI2W/D/Q/PS/PD instructions.
Added tests.
llvm-svn: 240256
2015-06-22 06:45:48 +00:00
d3057e5e37
AVX-512: (fixed) Added encoding of all forms of VPERMT2W/D/Q/PS/PD and VPERMI2W/D/Q/PS/PD.
...
Intrinsics and tests for them are comming in the next patch.
llvm-svn: 240003
2015-06-18 08:56:19 +00:00
4f13f3f9b8
reverted 239999 due to test failures
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llvm-svn: 240001
2015-06-18 08:06:49 +00:00
975a637cd9
AVX-512: Added encoding of all forms of VPERMT2W/D/Q/PS/PD
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and VPERMI2W/D/Q/PS/PD.
Intrinsics and tests for them are comming in the next patch.
llvm-svn: 239999
2015-06-18 07:29:40 +00:00
dfcc3d31a7
AVX-512: cvtusi2ss/d intrinsics.
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Change builtin function name and signature ( add third parameter - rounding mode ).
Added tests for intrinsics.
Differential Revision: http://reviews.llvm.org/D10473
llvm-svn: 239888
2015-06-17 07:23:57 +00:00
02d126cb9d
[AVX512] add integer min/max intrinsics support.
...
review:
http://reviews.llvm.org/D10439
llvm-svn: 239806
2015-06-16 08:39:27 +00:00
abe4a79b75
AVX-512: Implemented cvtsi2ss/d cvtusi2ss/d instructions with round control for KNL.
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Added intrinsics for cvtsi2ss/d instructions.
Added tests for intrinsics and encoding.
Differential Revision: http://reviews.llvm.org/D10430
llvm-svn: 239694
2015-06-14 12:44:55 +00:00
402ebb34af
re-apply 238809
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AVX-512: Implemented GETEXP instruction for KNL and SKX
Added rounding mode modifier for SQRTPS/PD
Added tests for encoding and intrinsics.
CR:
http://reviews.llvm.org/D9991
llvm-svn: 238923
2015-06-03 13:41:48 +00:00
8d897dd05f
revert 238809
...
llvm-svn: 238810
2015-06-02 07:45:19 +00:00
17de10f37e
AVX-512: Implemented GETEXP instruction for KNL and SKX
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Added rounding mode modifier for SQRTPS/PD
Added tests for encoding and intrinsics.
llvm-svn: 238809
2015-06-02 07:18:14 +00:00
b8573cba02
AVX-512: Added intrinsics for ADDSS/D, MULSS/D, SUBSS/D, DIVSS/D
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instructions. These intrinsics are comming with rounding mode.
Added intrinsics for MAXSS/D, MINSS/D - with and without sae.
By Asaf Badouh (asaf.badouh@intel.com )
llvm-svn: 237560
2015-05-18 07:24:19 +00:00
3822af0715
AVX-512: Changed CC parameter in "cmp" intrinsic
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from i8 to i32 according to the Intel Spec
by Igor Breger (igor.breger@intel.com )
llvm-svn: 236979
2015-05-11 09:03:14 +00:00
0d7e9364d1
AVX-512: Added SKX instructions and intrinsics:
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{add/sub/mul/div/} x {ps/pd} x {128/256} 2. max/min with sae
By Asaf Badouh (asaf.badouh@intel.com )
llvm-svn: 236971
2015-05-11 06:05:05 +00:00
29792e9a80
AVX-512: Added all forms of FP compare instructions for KNL and SKX.
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Added intrinsics for the instructions. CC parameter of the intrinsics was changed from i8 to i32 according to the spec.
By Igor Breger (igor.breger@intel.com )
llvm-svn: 236714
2015-05-07 11:24:42 +00:00
50b88ddb87
AVX-512: Added logical and arithmetic instructions for SKX
...
by Asaf Badouh (asaf.badouh@intel.com )
llvm-svn: 235375
2015-04-21 10:27:40 +00:00
1eeece1285
AVX-512: intrinsics for VPADD, VPMULDQ and VPSUB
...
by Asaf Badouh (asaf.badouh@intel.com )
llvm-svn: 233906
2015-04-02 10:51:40 +00:00
98de9d6360
AVX-512: added intrinsics for VPAND, VPOR and VPXOR
...
by Asaf Badouh (asaf.badouh@intel.com )
llvm-svn: 233525
2015-03-30 08:30:34 +00:00
a79ac14fa6
[opaque pointer type] Add textual IR support for explicit type parameter to load instruction
...
Essentially the same as the GEP change in r230786.
A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)
import fileinput
import sys
import re
pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")
for line in sys.stdin:
sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))
Reviewers: rafael, dexonsmith, grosser
Differential Revision: http://reviews.llvm.org/D7649
llvm-svn: 230794
2015-02-27 21:17:42 +00:00
0d94fa98e5
Revert "AVX-512: Full implementation for VRNDSCALESS/SD instructions and intrinsics."
...
The instructions were being generated on architectures that don't support avx512.
This reverts commit r229837.
llvm-svn: 229942
2015-02-20 00:45:28 +00:00
69e8b45b13
AVX-512: Full implementation for VRNDSCALESS/SD instructions and intrinsics.
...
llvm-svn: 229837
2015-02-19 10:48:04 +00:00
714f23bcdb
AVX-512: Added support for FP instructions with embedded rounding mode.
...
By Asaf Badouh <asaf.badouh@intel.com>
llvm-svn: 229645
2015-02-18 07:59:20 +00:00
d1e1d106ca
[X86] Change comparision immediate type to i8 in test cases for AVX512 floating point comparisons. The type was already changed in the definitions and was being auto upgraded to the new type.
...
llvm-svn: 227064
2015-01-25 23:26:12 +00:00
29f2e95185
[X86] Use i8 immediate for comparison type on AVX512 packed integer instructions. This matches floating point equivalents. Includes autoupgrade support to convert old code.
...
llvm-svn: 227063
2015-01-25 23:26:02 +00:00
3e8b22bc1b
[AVX512] Add intrinsics for masked aligned FP loads and stores
...
Similar to the unaligned cases.
Test was generated with update_llc_test_checks.py.
Part of <rdar://problem/17688758>
llvm-svn: 226296
2015-01-16 18:50:09 +00:00
9b8cfa212c
[AVX512] Remove trailing whitespaces in this test
...
llvm-svn: 226295
2015-01-16 18:50:07 +00:00
949b0d46bf
AVX-512: Added all forms of BLENDM instructions,
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intrinsics, encoding tests for AVX-512F and skx instructions.
llvm-svn: 224707
2014-12-22 13:52:48 +00:00
5fb084e798
[AVX512] Add support for 512b variable bit shift intrinsics.
...
llvm-svn: 224028
2014-12-11 17:13:05 +00:00
9b7c15a364
[AVX512] Add 512b integer shift by variable intrinsics and patterns.
...
llvm-svn: 222786
2014-11-25 20:41:51 +00:00
04400449c5
[AVX512] Add 512b masked integer shift by immediate patterns.
...
llvm-svn: 222002
2014-11-14 15:43:00 +00:00
73a6bca32b
[AVX512] Add integer shift by immediate intrinsics.
...
llvm-svn: 221811
2014-11-12 19:58:54 +00:00
be8808dc3f
AVX-512: Intrinsics for ERI
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3 instructions: vrcp28, vrsqrt28, vexp2, only vector forms.
Intrinsics include SAE (Suppres All Exceptions) parameter.
http://reviews.llvm.org/D6214
llvm-svn: 221774
2014-11-12 07:31:03 +00:00
47b2d5f1e0
[AVX512] Intrinsics for vextract*x4
...
This adds the Pat<>'s for the intrinsics. These are necessary because we
don't lower these intrinsics to SDNodes but match them directly. See the
rational in the previous commit.
llvm-svn: 219362
2014-10-08 23:25:37 +00:00
b51bb22611
[AVX512] Added intrinsics for 128-, 256- and 512-bit versions of VPCMP/VPCMPU{BWDQ}
...
Added CMP_MASK_CC intrinsic type.
Added tests for intrinsics.
Patch by Sergey Lisitsyn <sergey.lisitsyn@intel.com>
llvm-svn: 219316
2014-10-08 15:49:26 +00:00
28a7df0b5f
[AVX512] Added intrinsics for 128-, 256- and 512-bit versions of VCMPGT{BWDQ}.
...
Patch by Sergey Lisitsyn <sergey.lisitsyn@intel.com>
llvm-svn: 218670
2014-09-30 12:15:52 +00:00
a27c8e0fd9
[AVX512] Enabled intrinsics for VPCMPEQD and VPCMPEQQ.
...
Added CMP_MASK intrinsic type
llvm-svn: 218667
2014-09-30 11:19:50 +00:00
ff620edd3c
AVX-512: Added intrinsic for VMOVSS store form with mask.
...
llvm-svn: 216530
2014-08-27 07:38:43 +00:00
cee9d0a460
[AVX512] Handle valign masking intrinsic via C++ lowering
...
I think that this will scale better in most cases than adding a Pat<> for each
mapping from the intrinsic DAG to the intruction (i.e. rri, rrik, rrikz). We
can just lower to the SDNode and have the resulting DAG be matches by the DAG
patterns.
Alternatively (long term), we could keep the Pat<>s but generate them via the
new AVX512_masking multiclass. The difficulty is that in order to formulate
that we would have to concatenate DAGs. Currently this is only supported if
the operators of the input DAGs are identical.
llvm-svn: 215473
2014-08-12 21:13:12 +00:00
5ec912881f
[X86] Fixes commit r214890 to match the posted patch
...
This was another fallout from my local rebase where something went wrong :(
llvm-svn: 214951
2014-08-06 07:13:12 +00:00
fd2161b710
[AVX512] Add masking variant and intrinsics for valignd/q
...
This is similar to what I did with the two-source permutation recently. (It's
almost too similar so that we should consider generating the masking variants
with some tablegen help.)
Both encoding and intrinsic tests are added as well. For the latter, this is
what the IR that the intrinsic test on the clang side generates.
Part of <rdar://problem/17688758>
llvm-svn: 214890
2014-08-05 17:23:04 +00:00
f164859efc
AVX-512: Fixed intrinsic of VSQRTPS/PD instructions.
...
I set number and types of parameters according to GCC intrinsics.
llvm-svn: 213640
2014-07-22 11:07:31 +00:00
11dd5cf9f1
[X86] AVX512: Allow writemask argument in vpermt* intrinsics
...
llvm-svn: 212223
2014-07-02 21:26:01 +00:00
0d0489cea6
Hook up vector int_ctlz for AVX512.
...
llvm-svn: 211024
2014-06-16 14:12:28 +00:00
ed5f645bf3
Fix bad copy-and-paste from r210652. AVX512 masked leading zero intrinsics.
...
llvm-svn: 210901
2014-06-13 13:20:01 +00:00
5d1b7b94e4
Add AVX512 masked leadz instrinsic support.
...
llvm-svn: 210652
2014-06-11 12:54:45 +00:00
7f62b23e92
[X86] AVX512: Add vmovntdqa
...
Along with the corresponding intrinsic and tests.
llvm-svn: 210543
2014-06-10 16:39:53 +00:00
e73333a50f
AVX-512: minor change in rndscale intrinsic
...
llvm-svn: 207937
2014-05-04 13:35:37 +00:00
299cf511c4
AVX-512: optimized a shuffle pattern to VINSERTI64x4.
...
Added intrinsics for VPERMT2PS/PD/D/Q instructions.
llvm-svn: 207513
2014-04-29 09:09:15 +00:00
fd05667276
AVX-512: masked load/store + intrinsics for them.
...
llvm-svn: 203790
2014-03-13 12:05:52 +00:00
3ebfe11532
AVX-512: Fixed encoding of VPTESTMQ
...
llvm-svn: 201980
2014-02-23 14:28:35 +00:00
a30e437659
AVX-512: Added intrinsic for cvtph2ps.
...
Added VPTESTNM instruction.
Added a pattern to vselect (lit tests will follow).
llvm-svn: 200823
2014-02-05 07:05:03 +00:00
b19c9dc1a1
AVX-512: Embedded Rounding Control - encoding and printing
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Changed intrinsics for vrcp14/vrcp28 vrsqrt14/vrsqrt28 - aligned with GCC.
llvm-svn: 199102
2014-01-13 12:55:03 +00:00
172a27c750
AVX-512: Added more intrinsics for pmin/pmax, pabs, blend, pmuldq.
...
llvm-svn: 198745
2014-01-08 10:54:22 +00:00
3629b4aa0e
AVX-512: added intrinsic vcvtpd2ps (with rounding mode and without)
...
llvm-svn: 198593
2014-01-06 08:45:54 +00:00
52e4a0e109
AVX-512: Added more intrinsics for convert and min/max.
...
Removed vzeroupper from AVX-512 mode - our optimization gude does not recommend to insert vzeroupper at all.
llvm-svn: 198557
2014-01-05 10:46:09 +00:00
de3f751baf
AVX-512: Added intrinsics for vcvt, vcvtt, vrndscale, vcmp
...
Printing rounding control.
Enncoding for EVEX_RC (rounding control).
llvm-svn: 198277
2014-01-01 15:12:34 +00:00
cf08809813
AVX-512: Removed "z" suffix from AVX-512 instructions, since it is incompatible with GCC.
...
I moved a test from avx512-vbroadcast-crash.ll to avx512-vbroadcast.ll
I defined HasAVX512 predicate as AssemblerPredicate. It means that you should invoke llvm-mc with "-mcpu=knl" to get encoding for AVX-512 instructions. I need this to let AsmMatcher to set different encoding for AVX and AVX-512 instructions that have the same mnemonic and operands (all scalar instructions).
llvm-svn: 197041
2013-12-11 14:31:04 +00:00
e382c3fdcd
AVX-512: changed intrinsics for mask operations
...
llvm-svn: 196918
2013-12-10 13:53:10 +00:00
6270b388c8
AVX-512: Changed intrinsics of VPCONFLICT to match GCC builtin form
...
llvm-svn: 196914
2013-12-10 11:58:35 +00:00
e3cc4aacb9
Update AVX512 vector blend intrinsic names.
...
llvm-svn: 196581
2013-12-06 13:35:35 +00:00
cbb51dacfb
Fix assembly syntax for AVX512 vector blend instructions.
...
llvm-svn: 196393
2013-12-04 18:05:36 +00:00
d80f7d34de
Add support for AVX512 masked vector blend intrinsics.
...
llvm-svn: 194006
2013-11-04 19:14:56 +00:00
dacddb0bab
AVX-512: added VPCONFLICT instruction and intrinsics,
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added EVEX_KZ to tablegen
llvm-svn: 193959
2013-11-03 13:46:31 +00:00
394d557f41
Add AVX512 unmasked integer broadcast intrinsics and support.
...
llvm-svn: 193748
2013-10-31 13:56:31 +00:00
199c823555
AVX-512: PMIN/PMAX intrinsics and patterns
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Patch by Cameron McInally <cameron.mcinally@nyu.edu>
llvm-svn: 193497
2013-10-27 08:18:37 +00:00
8761a8f5c0
[X86][AVX512] Add patterns that match the AVX512 floating point register vbroadcast intrinsics.
...
Patch by Cameron McInally <cameron.mcinally@nyu.edu>
llvm-svn: 193422
2013-10-25 18:04:12 +00:00
4bf1c282c2
[X86][AVX512] Add patterns that match the AVX512 floating point vbroadcast intrinsics.
...
Patch by Cameron McInally <cameron.mcinally@nyu.edu>
llvm-svn: 193421
2013-10-25 17:47:18 +00:00
dd0794e51b
AVX-512: added VCVTPH2PS, VCVTPS2PH with intrinsics
...
llvm-svn: 193312
2013-10-24 07:16:35 +00:00
a3a714082b
AVX-512: Added VRCP28 and VRSQRT28 instructions and intrinsics.
...
llvm-svn: 192283
2013-10-09 08:16:14 +00:00
2e408aefe0
AVX-512: added scalar convert instructions and intrinsics.
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Fixed load folding in VPERM2I instruction.
llvm-svn: 192063
2013-10-06 13:11:09 +00:00
9a5ed9c3bd
AVX-512: added SQRT, VRSQRT14, VCOMISS, VUCOMISS, VRCP14, VPABS
...
llvm-svn: 189472
2013-08-28 11:21:58 +00:00
Igor Breger