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4 Commits

Author SHA1 Message Date
Kazushi (Jam) Marukawa 40f1e7e804 [VE] Support f128 
Support f128 using VE instructions.  Update regression tests.
I've noticed there is no load or store i128 test, so I add them too.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D86035
 2020-08-17 17:26:52 +09:00
Kazushi (Jam) Marukawa 6b461ba459 [VE] Change to use EXTRACT_SUBREG instead of COPY_TO_REGCLASS 
Summary:
Change to use EXTRACT_SUBREG instead of COPY_TO_REGCLASS in order to
remove unnecessary copy instructions.

Differential Revision: https://reviews.llvm.org/D81129
 2020-06-04 09:05:36 +02:00
Kazushi (Jam) Marukawa e981a46a77 [VE] Update lea/load/store instructions 
Summary:
Modify lea/load/store instructions to accept `disp(index, base)`
style addressing mode (called ASX format).  Also, uniform the
number of DAG nodes to have 3 operands for this ASX format
instructions, and update selectADDR functions to lower
appropriate MI.

Reviewers: arsenm, simoll, k-ishizaka

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D76822
 2020-04-06 11:49:46 +02:00
Kazushi (Jam) Marukawa f6bb58542a [VE] fp32/64 fadd/fsub/fdiv/fmul isel patterns 
Summary: fp32/64 fadd/fsub/fdiv/fmul isel patterns and tests.

Reviewers: arsenm, craig.topper, rengolin, k-ishizaka

Subscribers: merge_guards_bot, wdng, hiraditya, llvm-commits

Differential Revision: https://reviews.llvm.org/D73540
 2020-01-29 11:00:56 +01:00