e8d060dba9
Don't hardcode the order of the aliases.
...
llvm-svn: 192601
2013-10-14 16:05:12 +00:00
251d1e5d21
[msan] Test for r192599.
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llvm-svn: 192600
2013-10-14 15:17:05 +00:00
be83d8f693
[msan] Instrument x86.*_cvt* intrinsics.
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Currently MSan checks that arguments of *cvt* intrinsics are fully initialized.
That's too much to ask: some of them only operate on lower half, or even
quarter, of the input register.
llvm-svn: 192599
2013-10-14 15:16:25 +00:00
9f8e2d77c1
Reduce double set lookups by using the result of insert.
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No functionality change.
llvm-svn: 192598
2013-10-14 15:16:10 +00:00
193573ec89
[AArch64] Add support for NEON scalar integer compare instructions.
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llvm-svn: 192597
2013-10-14 14:37:40 +00:00
d1f40d760a
[AArch64] Add support for NEON scalar integer compare instructions.
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llvm-svn: 192596
2013-10-14 14:37:20 +00:00
6e2c7cbb26
Revert my commit 191617. It added a clang warning (Thanks to Ed Maste). Add a comment
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llvm-svn: 192595
2013-10-14 14:06:28 +00:00
c0cd80fb20
Do not use typo correction that is unaccessible.
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This patch fixes PR17019. When doing typo correction, Sema::CorrectTypo uses
correction already seen for the same typo. This causes problems if that
correction is from another scope and cannot be accessed in the current.
llvm-svn: 192594
2013-10-14 14:05:48 +00:00
43d90cbd86
[lsan] Support ASan's stack-use-after-return mode in LSan.
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Treat the fake stack as live memory.
llvm-svn: 192593
2013-10-14 14:04:50 +00:00
7d7768e032
[msan] Remove a long-outdated comment.
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llvm-svn: 192592
2013-10-14 13:30:40 +00:00
53169762d0
Add Cortex-A57 support
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llvm-svn: 192591
2013-10-14 13:17:07 +00:00
4400cde89a
Add subtarget feature support for Cortex-A53
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Some previous implicit defaults have changed, for example FP and NEON
are now on by default.
llvm-svn: 192590
2013-10-14 13:16:57 +00:00
2102188cfc
[mips][msa] Direct Object Emission support for BIT instructions.
...
List of instructions:
bclri.{b,h,w,d}
binsli.{b,h,w,d}
binsri.{b,h,w,d}
bnegi.{b,h,w,d}
bseti.{b,h,w,d}
sat_s.{b,h,w,d}
sat_u.{b,h,w,d}
slli.{b,h,w,d}
srai.{b,h,w,d}
srari.{b,h,w,d}
srli.{b,h,w,d}
srlri.{b,h,w,d}
llvm-svn: 192589
2013-10-14 13:07:39 +00:00
5be0cd8720
[mips][msa] Direct Object Emission support for VEC instructions.
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List of instructions:
and.v, bmnz.v, bmz.v, bsel.v, nor.v, or.v, xor.v.
llvm-svn: 192588
2013-10-14 12:57:18 +00:00
7d65ea76ea
[mips][msa] Direct Object Emission of INSVE.{b,h,w,d}.
...
llvm-svn: 192587
2013-10-14 12:38:17 +00:00
bc189eb318
[mips][msa] Direct Object Emission for the majority of the ELM instructions.
...
List of instructions:
copy_s.{b,h,w}
copy_u.{b,h,w}
sldi.{b,h,w,d}
splati.{b,h,w,d}
llvm-svn: 192586
2013-10-14 12:22:43 +00:00
da9f5e7e7f
[asan] Improve thread lifetime tracking on POSIX systems.
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Call AsanThread::Destroy() from a late-running TSD destructor.
Previously we called it before any user-registered TSD destructors, which caused
false positives in LeakSanitizer.
llvm-svn: 192585
2013-10-14 12:01:05 +00:00
7aacd9c172
[msan] Intercept strto(d|f|ld)_l and glibc-specific __strto(d|f|ld)_l.
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llvm-svn: 192583
2013-10-14 11:52:40 +00:00
b74293dc55
[mips][msa] Direct Object Emission of INSERT.{B,H,W} instruction.
...
INSERT is the first type of MSA instruction that requires a change to the way
MSA registers are parsed. This happens because MSA registers may be suffixed by
an index in the form of an immediate or a general purpose register. The changes
to parseMSARegs reflect that requirement.
llvm-svn: 192582
2013-10-14 11:49:30 +00:00
df6e6569c0
[ASan] Don't die with internal ASan error on large buffer overflows
...
Summary:
Out-of-bound access may touch not-yet allocated or already freed
and recycled from quarantine chunks. We should treat this situation as
a "free-range memory access" and avoid printing any data about that
irrelevant chunk (which may be inconsistent).
This should fix https://code.google.com/p/address-sanitizer/issues/detail?id=183
Reviewers: kcc
Reviewed By: kcc
CC: timurrrr, llvm-commits
Differential Revision: http://llvm-reviews.chandlerc.com/D1893
llvm-svn: 192581
2013-10-14 11:13:54 +00:00
421e884b31
Remove added file for the test commit
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llvm-svn: 192580
2013-10-14 10:12:30 +00:00
531912d8e4
Test commit
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llvm-svn: 192579
2013-10-14 10:07:04 +00:00
7f14630f4a
Suppress "using extended field designator is an extension" warning in use of offsetof.
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llvm-svn: 192578
2013-10-14 10:00:11 +00:00
054d533d8d
[msan] Regression test for r192575.
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llvm-svn: 192577
2013-10-14 09:53:39 +00:00
4314e319ab
tsan: allow to override OnPrint() callback in Go runtime
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llvm-svn: 192576
2013-10-14 09:52:40 +00:00
9b5517b127
[msan] Fix handling of scalar select of vectors.
...
llvm-svn: 192575
2013-10-14 09:52:09 +00:00
c7ae7529e7
[Sanitizer] Return implementation of StackTrace::CopyFrom to header
...
llvm-svn: 192574
2013-10-14 07:36:10 +00:00
82a46ebe0a
Fixed a bug in dynamic allocation memory on stack.
...
The alignment of allocated space was wrong, see Bugzila 17345.
Done by Zvi Rackover <zvi.rackover@intel.com>.
llvm-svn: 192573
2013-10-14 07:26:51 +00:00
05747f3734
Fix use-after-free in PPCallbacksTest detected by ASan bootstrap bot
...
llvm-svn: 192572
2013-10-14 07:13:59 +00:00
7438912fb8
Set the architecture from the remote executable when it's not set so the register info can be loaded properly (and thus the callstacks work)
...
llvm-svn: 192571
2013-10-14 07:09:13 +00:00
d9ba47271d
Fixed "ArgSize may be used uninitialised" error when compiling with gcc.
...
llvm-svn: 192570
2013-10-14 07:02:04 +00:00
abc416f326
tsan: allow to override OnFinalize() in front-ends that does not support weak functions (Go)
...
llvm-svn: 192569
2013-10-14 06:31:03 +00:00
d7abdb6f12
Create classes to reduce the size of the tablegen entries for the CRC32 instructions.
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llvm-svn: 192568
2013-10-14 05:19:58 +00:00
a422b09ae3
Allow pinsrw/pinsrb/pextrb/pextrw/movmskps/movmskpd/pmovmskb/extractps instructions to parse either GR32 or GR64 without resorting to duplicating instructions.
...
llvm-svn: 192567
2013-10-14 04:55:01 +00:00
4432208884
Add disassembler support for SSE4.1 register/register form of PEXTRW. There is a shorter encoding that was part of SSE2, but a memory form was added in SSE4.1. This is the register form of that encoding.
...
llvm-svn: 192566
2013-10-14 01:42:32 +00:00
7158745e55
Mark MOVMSKPS/MOVMSKPD/VPINSRWrr64i as AsmParserOnly to remove them from the disassembler tables. Add PINSRWrr64i to complement the AVX version.
...
llvm-svn: 192565
2013-10-14 01:21:22 +00:00
93fdc3fabf
Windows: Fix a typo in an assert
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llvm-svn: 192564
2013-10-14 01:17:32 +00:00
e2e0387f3e
Keep track of indentation levels in static initializers for correct indentation with tabs.
...
Summary:
Store IndentationLevel in ParentState and use it instead of the
Line::Level when indening.
Also fixed incorrect indentation level calculation in formatFirstToken.
Reviewers: djasper
Reviewed By: djasper
CC: cfe-commits, klimek
Differential Revision: http://llvm-reviews.chandlerc.com/D1797
llvm-svn: 192563
2013-10-14 00:46:35 +00:00
c4a5a3f65d
Don't use 64-bit versions of MOVMSKPD in CodeGen. The instructions only produce a 1-bit result so we can just use SUBREG_TO_REG to extend the 32-bit versions.
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llvm-svn: 192562
2013-10-14 00:24:33 +00:00
7af18578f8
Windows: Don't bother with pinning Kernel32.dll
...
We don't delay load it so it shouldn't be going anywhere.
llvm-svn: 192561
2013-10-14 00:06:58 +00:00
d46d6dea68
Merge common pointers for redeclarations of the same template across modules.
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llvm-svn: 192560
2013-10-13 23:50:45 +00:00
f39720b26e
Don't get confused by a virt-specifier after a trailing-return-type - it's not
...
an accidentally-included name for the declarator.
llvm-svn: 192559
2013-10-13 22:12:28 +00:00
5357df6290
MC: Don't assume incoming StringRef's are null terminated.
...
This can happen when processing command line arguments, which
are often stored as std::string's and later turned into
StringRef's via std::string::data(). Unfortunately this
is not guaranteed to return a null-terminated string
until C++11, causing breakage on platforms that don't do this.
llvm-svn: 192558
2013-10-13 22:09:26 +00:00
d6cbede9c5
R600: improve dump of S_WAITCNT
...
llvm-svn: 192557
2013-10-13 17:56:28 +00:00
4ee6dd6136
R600/SI: Add SinkingPass before ISel
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llvm-svn: 192556
2013-10-13 17:56:21 +00:00
d623644d17
R600/SI: Support byval arguments
...
llvm-svn: 192555
2013-10-13 17:56:16 +00:00
fa58a5fb60
R600: Use masked read sel for texture instructions
...
llvm-svn: 192554
2013-10-13 17:56:10 +00:00
301beb80d4
R600: fix swizzle export
...
llvm-svn: 192553
2013-10-13 17:56:04 +00:00
533352f696
R600: Clear the VPM bit of export instructions.
...
It makes apparently no change it to set this bit or not but the
docs recommand to left it cleared.
llvm-svn: 192552
2013-10-13 17:55:57 +00:00
e28815758e
Fix typo: inccrementally
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llvm-svn: 192551
2013-10-13 12:02:16 +00:00
Rafael Espindola