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26 Commits

Author SHA1 Message Date
Johnny Chen b90b6f1a35 Fixed a bug in DisassembleN1RegModImmFrm() where a break stmt was missing for a 
case.  Also, the 0xFF hex literal involved in the shift for ESize64 should be
suffixed "ul" to preserve the shift result.

Implemented printHex*ImmOperand() by copying from ARMAsmPrinter.cpp and added a
test case for DisassembleN1RegModImmFrm()/printHex64ImmOperand().

llvm-svn: 101557
 2010-04-16 22:40:20 +00:00
Chris Lattner 7012916275 fix an ugly wart in the MCInstPrinter api where the 
raw_ostream to print an instruction to had to be specified
at MCInstPrinter construction time instead of being able
to pick at each call to printInstruction.

llvm-svn: 100307
 2010-04-04 05:04:31 +00:00
Chris Lattner 76c564b1bb change a ton of code to not implicitly use the "O" raw_ostream 
member of AsmPrinter.  Instead, pass it in explicitly.

llvm-svn: 100306
 2010-04-04 04:47:45 +00:00
Bob Wilson ae08a736d6 Re-commit r98683 ("remove redundant writeback flag from ARM address mode 6") 
with changes to add a separate optional register update argument.  Change all
the NEON instructions with address register writeback to use it.

llvm-svn: 99095
 2010-03-20 22:13:40 +00:00
Johnny Chen 8f3004cff2 Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm 
instructions to help disassembly.

We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.

And modified test cases to not expect '+' in +reg or #+num.  For example,

; CHECK:       ldr.w	r9, [r7, #28]

llvm-svn: 98745
 2010-03-17 17:52:21 +00:00
Bob Wilson 1b4e8cc69c --- Reverse-merging r98637 into '.': 
U    test/CodeGen/ARM/tls2.ll
U    test/CodeGen/ARM/arm-negative-stride.ll
U    test/CodeGen/ARM/2009-10-30.ll
U    test/CodeGen/ARM/globals.ll
U    test/CodeGen/ARM/str_pre-2.ll
U    test/CodeGen/ARM/ldrd.ll
U    test/CodeGen/ARM/2009-10-27-double-align.ll
U    test/CodeGen/Thumb2/thumb2-strb.ll
U    test/CodeGen/Thumb2/ldr-str-imm12.ll
U    test/CodeGen/Thumb2/thumb2-strh.ll
U    test/CodeGen/Thumb2/thumb2-ldr.ll
U    test/CodeGen/Thumb2/thumb2-str_pre.ll
U    test/CodeGen/Thumb2/thumb2-str.ll
U    test/CodeGen/Thumb2/thumb2-ldrh.ll
U    utils/TableGen/TableGen.cpp
U    utils/TableGen/DisassemblerEmitter.cpp
D    utils/TableGen/RISCDisassemblerEmitter.h
D    utils/TableGen/RISCDisassemblerEmitter.cpp
U    Makefile.rules
U    lib/Target/ARM/ARMInstrNEON.td
U    lib/Target/ARM/Makefile
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMAsmPrinter.cpp
U    lib/Target/ARM/AsmPrinter/ARMInstPrinter.h
D    lib/Target/ARM/Disassembler
U    lib/Target/ARM/ARMInstrFormats.td
U    lib/Target/ARM/ARMAddressingModes.h
U    lib/Target/ARM/Thumb2ITBlockPass.cpp

llvm-svn: 98640
 2010-03-16 16:59:47 +00:00
Johnny Chen 3d9327bd06 Initial ARM/Thumb disassembler check-in. It consists of a tablgen backend 
(RISCDisassemblerEmitter) which emits the decoder functions for ARM and Thumb,
and the disassembler core which invokes the decoder function and builds up the
MCInst based on the decoded Opcode.

Added sub-formats to the NeonI/NeonXI instructions to further refine the NEONFrm
instructions to help disassembly.

We also changed the output of the addressing modes to omit the '+' from the
assembler syntax #+/-<imm> or +/-<Rm>.  See, for example, A8.6.57/58/60.

And modified test cases to not expect '+' in +reg or #+num.  For example,

; CHECK:       ldr.w	r9, [r7, #28]

llvm-svn: 98637
 2010-03-16 16:36:54 +00:00
Johnny Chen f5e81aeba5 Added Thumb2 LDRD/STRD pre/post variants for disassembly only. 
Plus fixed the encoding of t2LDRDpci such that P = 1 and W = 0 (offset mode).

llvm-svn: 98217
 2010-03-11 01:13:36 +00:00
Johnny Chen 9a3e2398ae Factored out the disassembly printing of CPS option, MSR mask, and Negative Zero 
operands into their own PrintMethod, in order not to pollute the printOperand()
impl with disassembly only Imm modifiers.

llvm-svn: 98172
 2010-03-10 18:59:38 +00:00
Johnny Chen 0dae1cbf1c AL is an optional mnemonic extension for always, except in IT instructions. 
Add printMandatoryPredicateOperand() PrintMethod for IT predicate printing.

Ref: A8.3 Conditional execution
llvm-svn: 97571
 2010-03-02 17:57:15 +00:00
Evan Cheng b18525937c More consistent thumb1 asm printing. 
llvm-svn: 89328
 2009-11-19 06:57:41 +00:00
Bob Wilson d95ccd6c4d Print VMOV (immediate) operands as hexadecimal values. Apple's assembler 
will not accept negative values for these.  LLVM's default operand printing
sign extends values, so that valid unsigned values appear as negative
immediates.  Print all VMOV immediate operands as hex values to resolve this.
Radar 7372576.

llvm-svn: 86301
 2009-11-06 23:33:28 +00:00
Evan Cheng 4a609f3cef Use fconsts and fconstd to materialize small fp constants. 
llvm-svn: 85362
 2009-10-28 01:44:26 +00:00
Chris Lattner 175d04c90f tidy 
llvm-svn: 84738
 2009-10-21 04:10:24 +00:00
Chris Lattner 9351e4f4b2 implement some more easy hooks. 
llvm-svn: 84614
 2009-10-20 06:22:33 +00:00
Chris Lattner 60d5131653 Implement some hooks, make printOperand abort if unknown modifiers are 
present.

llvm-svn: 84613
 2009-10-20 06:15:28 +00:00
Chris Lattner 85ab670644 add supprort for the 'sbit' operand, MOVi apparently has one. 
llvm-svn: 84577
 2009-10-20 00:46:11 +00:00
Chris Lattner 19c52201bd add support for instruction predicates. 
llvm-svn: 84575
 2009-10-20 00:42:49 +00:00
Chris Lattner 2f69ed8f4c implement printSORegOperand, add lowering for the nasty and despicable MOVi2pieces :) 
llvm-svn: 84573
 2009-10-20 00:40:56 +00:00
Chris Lattner 186c6b0834 lower the ARM::CONSTPOOL_ENTRY pseudo op, giving us constant pool entries 
like:

@ BB#1:
	.align	2
LCPI1_0:
	.long	L_.str-(LPC0+8)

Note that proper indentation of the label :)

llvm-svn: 84558
 2009-10-19 22:33:05 +00:00
Chris Lattner add5749ac8 add MCInstLower support for lowering ARM::PICADD, a pseudo op for pic stuffola. 
llvm-svn: 84553
 2009-10-19 22:23:04 +00:00
Chris Lattner ef2979b1da add register list and hacked up addrmode #4 support, we now get this: 
_main:
	stmsp! sp!, {r7, lr}
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, [sp]
	ldr r0, LCPI1_0
	bl _printf
	ldr r0, [sp]
	mov sp, r7
	ldmsp! sp!, {r7, pc}

Note the unhappy ldm/stm because of modifiers being ignored.

llvm-svn: 84546
 2009-10-19 22:09:23 +00:00
Chris Lattner 7ddfdc4133 add addrmode2 support, getting us up to: 
_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, [sp]
	ldr r0, LCPI1_0
	bl _printf
	ldr r0, [sp]
	mov sp, r7
	ldm , 

llvm-svn: 84543
 2009-10-19 21:57:05 +00:00
Chris Lattner 89d47205b5 add printing support for SOImm operands, getting us to: 
_main:
	stm , 
	mov r7, sp
	sub sp, sp, #4
	mov r0, #0
	str r0, 

llvm-svn: 84535
 2009-10-19 21:21:39 +00:00
Chris Lattner 93e3ef6536 wire up some basic printOperand goodness, giving us stuff like this before 
we abort:

_main:
	stm , 
	mov r7, sp
	sub sp, sp, 
	mov r0, 
	str r0, 

llvm-svn: 84532
 2009-10-19 20:59:55 +00:00
Chris Lattner a290778859 stub out a minimal ARMInstPrinter. 
llvm-svn: 84527
 2009-10-19 19:56:26 +00:00