Commit Graph

161 Commits

Author SHA1 Message Date
Evan Cheng 0584836340 Thumb asm syntax does not want 's' suffix for flag setting opcodes.
llvm-svn: 33717
2007-01-31 20:12:31 +00:00
Evan Cheng 83f35170fa - Fix codegen for pc relative constant (e.g. JT) in thumb mode:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        mov r1, #PCRELV0
        add r1, pc

- In thumb mode, it's not possible to use .set generate a pc relative stub
  address. The stub is ARM code which is in a different section from the thumb
  code. Load the value from a constpool instead.
- Some asm printing clean up.

llvm-svn: 33664
2007-01-30 20:37:08 +00:00
Evan Cheng 1cd3c0efb8 Change the operand orders to t_addrmode_s* to make it easier to morph
instructions that use these address modes to instructions that use
t_addrmode_sp.

llvm-svn: 33651
2007-01-30 02:35:32 +00:00
Evan Cheng 863736b0ad Use BL to implement Thumb far jumps.
llvm-svn: 33649
2007-01-30 01:13:37 +00:00
Evan Cheng 0701c5a074 Thumb jumptable support.
llvm-svn: 33568
2007-01-27 02:29:45 +00:00
Evan Cheng f40b9006a8 Thumb add / sub with carry.
llvm-svn: 33562
2007-01-27 00:07:15 +00:00
Evan Cheng add7f164a1 Represent tADDspi and tSUBspi as two-address instructions.
llvm-svn: 33551
2007-01-26 21:33:19 +00:00
Evan Cheng d02d75c295 extload -> zextload
llvm-svn: 33542
2007-01-26 19:13:16 +00:00
Evan Cheng 1526ba50d9 Use PC relative ldr to load from a constantpool in Thumb mode.
llvm-svn: 33484
2007-01-24 08:53:17 +00:00
Evan Cheng c0b7366cf9 - Reorg Thumb load / store instructions. Combine each rr and ri pair of
instructions into one (e.g. tLDRrr, tLDRri -> tLDR).
- Thumb ldrsb and ldrsh only have the [reg, reg] address format. If the
  address is not an add, materialize a 0 immediate into a register and use
  it as the offset field.

llvm-svn: 33470
2007-01-23 22:59:13 +00:00
Evan Cheng 10043e215b ARM backend contribution from Apple.
llvm-svn: 33353
2007-01-19 07:51:42 +00:00