Commit Graph

359339 Commits

Author SHA1 Message Date
Nathan James e8158bf0e7 [NFC] Clean up braces and anon namespace 2020-07-05 11:16:40 +01:00
Raphael Isemann 779432690f [lldb][NFC] Clarify that spaces can't be in breakpoint names
We already check for spaces but we don't mention it in the error message.
2020-07-05 10:55:02 +02:00
Raphael Isemann fc1d95eb7b [lldb][NFC] Remove an unnecessary cast in SBCommandInterpreter 2020-07-05 10:54:18 +02:00
Joachim Protze 3fc97f9636 [OpenMP][Tests] NFC use type macro in printf 2020-07-05 09:17:18 +02:00
Fangrui Song aed6a1b137 Add tests for clang -fno-zero-initialized-in-bss and llc -nozero-initialized-in-bss
And rename the CC1 option.
2020-07-04 23:26:57 -07:00
Kai Luo 68e07da3e5 [clang][PowerPC] Enable -fstack-clash-protection option for ppc64
Differential Revision: https://reviews.llvm.org/D81355
2020-07-05 03:43:56 +00:00
Georgy Komarov afd81a637d
[llvm-objcopy] Fix crash when removing symbol table at same time as adding a symbol
This patch resolves crash that occurs when user wanted to remove all
symbols and add a brand new one using:

```
llvm-objcopy -R .symtab --add-symbol foo=1234 in.o out.o
```

Before these changes the symbol table internally being null when adding
new symbols. For now we will regenerate symtab in this case.

This fixes: https://bugs.llvm.org/show_bug.cgi?id=43930

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D82935
2020-07-05 05:14:00 +03:00
Thomas Lively 65330f394b [WebAssembly] Do not assume br_table range checks will be gt_u
OSS-Fuzz and the Emscripten test suite uncovered some edge cases in
which the range check instruction seemed to be an (i32.const 0) or
other unexpected instruction, triggering an assertion. Unfortunately
the reproducers are rather complicated, so they don't make good unit
tests. This commit removes the bad assertion and conservatively
optimizes range checks only when the range check instruction is
i32.gt_u.

Differential Revision: https://reviews.llvm.org/D83169
2020-07-04 18:11:24 -07:00
Nico Weber 7e2d27bc55 Fix two -Wrange-loop-analysis warnings that Xcode 12 beta incorrectly complains about
Xcode 12 beta apparently has the Wrange-loop-analysis changes from
half a year ago, but it seems to lack https://reviews.llvm.org/D72212
which made the warning usable again.
2020-07-04 20:41:33 -04:00
Nico Weber 90a35bd074 [gn build] fix link of libclang_rt.asan_osx_dynamic.dylib if command line tools are not installed 2020-07-04 20:26:39 -04:00
Nico Weber 05c5ff5ab0 [gn build] make stage2_unix_toolchain set clang_base_path
This fixes the build of compiler-rt on macOS when _not_ using
clang_base_path in args.gn: Xcode clang knows where to find the
SDK, but regular clang doesn't and needs a -isysroot parameter.
We correctly add that parameter when clang_base_path is set,
but else we omit it. If clang_base_path was not set, we also
didn't add the flag for stage2_unix_toolchain() when we build
compiler-rt with just-built clang.

Make stage2_unix_toolchain() use clang_base_path instead of setting
cc / cxx. It's less code, and it gets things like this right.
2020-07-04 19:36:09 -04:00
Roman Lebedev f804bd586e
[llvm-reduce] extractGVsFromModule(): don't crash when deleting instr twice
As it can be seen in newly-added (previously-crashing) test-case,
there can be a situation where multiple GV's are used in instr,
and we would schedule the same instruction to be deleted several times,
crashing when trying to delete it the second time.

We could either store WeakVH (done here), or use something set-like.
I think using WeakVH is prevalent in these cases elsewhere.
2020-07-05 01:01:46 +03:00
Roman Lebedev fbbb6884e1
[llvm-reduce] extractArgumentsFromModule(): don't crash when deleting instr twice
As it can be seen in newly-added (previously-crashing) test-case,
there can be a situation where multiple arguments are used in instr,
and we would schedule the same instruction to be deleted several times,
crashing when trying to delete it the second time.

We could either store WeakVH (done here), or use something set-like.
I think using WeakVH is prevalent in these cases elsewhere.
2020-07-05 00:52:42 +03:00
Craig Topper 76123d338d [DAGCombiner] visitSIGN_EXTEND_INREG should fold sext_vector_inreg(undef) to 0 not undef.
We need to ensure that the sign bits of the result all match
so we can't fold to undef.

Similar to PR46585.

Reviewed By: lebedev.ri

Differential Revision: https://reviews.llvm.org/D83163
2020-07-04 14:35:49 -07:00
sstefan1 6c4a5e9257 [OpenMPOpt] ICV Tracking
This is the first and most basic ICV Tracking implementation. For this
first version, we only support deduplication within the same BB.

Reviewers: jdoerfert, JonChesterfield, hamax97, jhuber6, uenoku,
baziotis

Differential Revision: https://reviews.llvm.org/D81788
2020-07-04 23:31:50 +02:00
Mehdi Amini fbc06b2280 Revert "[MLIR] Parallelize affine.for op to 1-D affine.parallel op"
This reverts commit 5f2843857f.
This broke the build when -DDBUILD_SHARED_LIBS=ON is used.
2020-07-04 20:55:47 +00:00
Roman Lebedev 7ea46aee36
Revert "[AssumeBundles] Use operand bundles to encode alignment assumptions"
Assume bundle can have more than one entry with the same name,
but at least AlignmentFromAssumptionsPass::extractAlignmentInfo() uses
getOperandBundle("align"), which internally assumes that it isn't the
case, and happily crashes otherwise.

Minimal reduced reproducer: run `opt -alignment-from-assumptions` on

target datalayout = "e-m:e-p270:32:32-p271:32:32-p272:64:64-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-linux-gnu"

%0 = type { i64, %1*, i8*, i64, %2, i32, %3*, i8* }
%1 = type opaque
%2 = type { i8, i8, i16 }
%3 = type { i32, i32, i32, i32 }

; Function Attrs: nounwind
define i32 @f(%0* noalias nocapture readonly %arg, %0* noalias %arg1) local_unnamed_addr #0 {
bb:
  call void @llvm.assume(i1 true) [ "align"(%0* %arg, i64 8), "align"(%0* %arg1, i64 8) ]
  ret i32 0
}

; Function Attrs: nounwind willreturn
declare void @llvm.assume(i1) #1

attributes #0 = { nounwind "reciprocal-estimates"="none" }
attributes #1 = { nounwind willreturn }


This is what we'd have with -mllvm -enable-knowledge-retention

This reverts commit c95ffadb24.
2020-07-04 23:49:23 +03:00
peter klausler 5d5b968252 [flang] Add fixes and missing stmts to I/O runtime API handlers (ext. I/O part 8)
Complete the rework of the initial implementation of external I/O
to fix problems found in testing (tests to follow); add handlers
for hitherto unimplemented PAUSE, FLUSH, ENDFILE, BACKSPACE, and
REWIND statements.

Reviewed By: tskeith, sscalpone

Differential Revision: https://reviews.llvm.org/D83162
2020-07-04 12:53:31 -07:00
Craig Topper 120c5f1057 [DAGCombiner] Don't fold zext_vector_inreg/sext_vector_inreg(undef) to undef. Fold to 0.
zext_vector_inreg needs to produces 0s in the extended bits and
sext_vector_inreg needs to produce upper bits that are all the
same. So we should fold them to a 0 vector instead of undef.

Fixes PR46585.
2020-07-04 11:42:53 -07:00
Craig Topper 21d8f66d20 [X86] Add test caes for pr46585. NFC 2020-07-04 11:42:50 -07:00
Roman Lebedev 11a3f040c7
[Utils] Make -assume-builder/-assume-simplify actually work on Old-PM
clang w/ old-pm currently would simply crash
when -mllvm  -enable-knowledge-retention=true is specified.

Clearly, these two passes had no Old-PM test coverage,
which would have shown the problem - not requiring AssumptionCacheTracker,
but then trying to always get it.

Also, why try to get domtree only if it's cached,
but at the same time marking it as required?
2020-07-04 21:06:36 +03:00
peter klausler 45b5c79a31 [flang] Extend & fix per-I/O-statement state (ext. I/O work part 7)
The per-I/O-statement state structures need to support missing
external I/O statements, and some bugs found in testing with
formatted input and record advancement are fixed.  The effects
of these changes will not be visible until further patches to
the I/O API handlers are pushed.

Reviewed By: tskeith

Differential Revision: https://reviews.llvm.org/D83151
2020-07-04 10:49:00 -07:00
Amara Emerson 85e144329c [profile] Mark gcov test as unsupported on Darwin. 2020-07-04 10:41:27 -07:00
Craig Topper e652c0f8f3 [X86] Teach lowerShuffleAsBlend to use bit blend for v16i8/v32i8/v16i16 when avx512vl is enabled but not avx512bw.
Probably not super important since there are no real CPUs with
avx512vl and not avx512bw. But vpternlog should be better than
vblendvb.

I do wonder if we should use vpternlog even with BWI. We
currently use vblendmb or vpblendmw by putting the mask into a GPR
and moving it to a k-register. But I don't think we hoist the
GPR to k-register copy in machine LICM. Using VPTERNLOG would use
a constant pool load, but has the advantage that we're pretty good
at hoisting and rematerializing those.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D83156
2020-07-04 10:26:56 -07:00
Craig Topper b4eb415a99 [X86] Disable VPBLENDVB formation in combineLogicBlendIntoPBLENDV if VPTERNLOG is supported.
VPBLENDVB is multiple uops while VPTERNLOG is a single uop. So
we should use that instead.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D83155
2020-07-04 10:12:19 -07:00
Vy Nguyen dc13ac0280 Revert "[libcxx] Put clang::trivial_abi on std::unique_ptr, std::shared_ptr, and std::weak_ptr"
This reverts commit 5cde3c9633.

The tests were reported failing on clang10
2020-07-04 11:29:08 -04:00
Roman Lebedev 7fed3cfadb
[clang] Fix two tests that are affected by llvm opt change 2020-07-04 18:26:22 +03:00
Sanjay Patel 3b8ae1001f [InstCombine] fix miscompile from umul_with_overflow matching
As noted in PR46561:
https://bugs.llvm.org/show_bug.cgi?id=46561
...it takes something beyond a minimal IR example to trigger
this bug because it relies on matching non-canonical IR.

There are no tests that show the need for matching this
pattern, so I'm just deleting it to fix the miscompile.
2020-07-04 11:16:23 -04:00
Roman Lebedev c3b8bd1eea
[InstCombine] Always try to invert non-canonical predicate of an icmp
Summary:
The actual transform i was going after was:
https://rise4fun.com/Alive/Tp9H
```
Name: zz
Pre: isPowerOf2(C0) && isPowerOf2(C1) && C1 == C0
%t0 = and i8 %x, C0
%r = icmp eq i8 %t0, C1
  =>
%t = icmp eq i8 %t0, 0
%r = xor i1 %t, -1

Name: zz
Pre: isPowerOf2(C0)
%t0 = and i8 %x, C0
%r = icmp ne i8 %t0, 0
  =>
%t = icmp eq i8 %t0, 0
%r = xor i1 %t, -1
```
but as it can be seen from the current tests, we already canonicalize most of it,
and we are only missing handling multi-use non-canonical icmp predicates.

If we have both `!=0` and `==0`, even though we can CSE them,
we end up being stuck with them. We should canonicalize to the `==0`.

I believe this is one of the cleanup steps i'll need after `-scalarizer`
if i end up proceeding with my WIP alloca promotion helper pass.

Reviewers: spatel, jdoerfert, nikic

Reviewed By: nikic

Subscribers: zzheng, hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D83139
2020-07-04 18:12:04 +03:00
Sanjay Patel ef70cc9d1a [InstCombine] improve debug value names; NFC
The use of 'tmp' can trigger warnings from the update_test_checks.py
script. That's evidence of a flaw in the script's logic, but we
can always do better than naming variables 'tmp' in LLVM too.

The phi test file should be updated with auto-generated regex CHECK
lines, so it isn't affected by cosmetic diffs, but I don't have
time to do that right now.
2020-07-04 11:06:30 -04:00
Sanjay Patel 14936e01e2 [InstCombine] add test for miscompile (PR46561); NFC 2020-07-04 11:06:30 -04:00
Simon Pilgrim 56a8a5c9fe [DAG] matchBinOpReduction - match subvector reduction patterns beyond a matched shufflevector reduction
Currently matchBinOpReduction only handles shufflevector reduction patterns, but in many cases these only occur in the final stages of a reduction, once we're down to legal vector widths.

Before this its likely that we are performing reductions using subvector extractions to repeatedly split the source vector in half and perform the binop on the halves.

Assuming we've found a non-partial reduction, this patch continues looking for subvector reductions as far as it can beyond the last shufflevector.

Fixes PR37890
2020-07-04 15:28:15 +01:00
David Zarzycki e56e96a264 [libcxx testing] Remove ALLOW_RETRIES from another test 2020-07-04 10:15:21 -04:00
Simon Pilgrim 7bfe4102a9 [X86][SSE] Add add/fadd reduction shuffle+subvector tests
Tests based on the PR37890 test cases - the vector combine pass should leave us with a reduction chain ending in extract(add(x,shuffle(x,1,-1,...))), but the higher reduction stages will be subvector extractions not shuffles.
2020-07-04 15:10:09 +01:00
Yash Jain 5f2843857f [MLIR] Parallelize affine.for op to 1-D affine.parallel op
Introduce pass to convert parallel affine.for op into 1-D
affine.parallel op. Run using --affine-parallelize. Removes
test-detect-parallel: pass for checking parallel affine.for ops.

Differential Revision: https://reviews.llvm.org/D82672
2020-07-04 19:09:23 +05:30
Simon Pilgrim 71f342d6c3 [X86][AVX] Fold PACK(LOSUBVECTOR(SHUFFLE(X)),HISUBVECTOR(SHUFFLE(X))) -> SHUFFLE(PACK(LOSUBVECTOR(X),HISUBVECTOR(X)))
Using PACK for truncations leaves us with intermediate shuffles that can be tricky to remove while the truncation tree is being formed.

This fold helps pull out the PERMQ case which is one of the most common, avoiding some costly lane-crossing shuffles.

A future patch will begin adding more general shuffle folding, which we should be able to use for HADD/HSUB as well.
2020-07-04 13:54:30 +01:00
LLVM GN Syncbot 07d4d84676 [gn build] Port b6cbe6cb03 2020-07-04 12:02:31 +00:00
Kirstóf Umann b6cbe6cb03 [analyzer][NFC] Move the data structures from CheckerRegistry to the Core library
If you were around the analyzer for a while now, you must've seen a lot of
patches that awkwardly puts code from one library to the other:

* D75360 moves the constructors of CheckerManager, which lies in the Core
  library, to the Frontend library. Most the patch itself was a struggle along
  the library lines.
* D78126 had to be reverted because dependency information would be utilized
  in the Core library, but the actual data lied in the frontend.
  D78126#inline-751477 touches on this issue as well.

This stems from the often mentioned problem: the Frontend library depends on
Core and Checkers, Checkers depends on Core. The checker registry functions
(`registerMallocChecker`, etc) lie in the Checkers library in order to keep each
checker its own module. What this implies is that checker registration cannot
take place in the Core, but the Core might still want to use the data that
results from it (which checker/package is enabled, dependencies, etc).

D54436 was the patch that initiated this. Back in the days when CheckerRegistry
was super dumb and buggy, it implemented a non-documented solution to this
problem by keeping the data in the Core, and leaving the logic in the Frontend.
At the time when the patch landed, the merger to the Frontend made sense,
because the data hadn't been utilized anywhere, and the whole workaround without
any documentation made little sense to me.

So, lets put the data back where it belongs, in the Core library. This patch
introduces `CheckerRegistryData`, and turns `CheckerRegistry` into a short lived
wrapper around this data that implements the logic of checker registration. The
data is tied to CheckerManager because it is required to parse it.

Side note: I can't help but cringe at the fact how ridiculously awkward the
library lines are. I feel like I'm thinking too much inside the box, but I guess
this is just the price of keeping the checkers so modularized.

Differential Revision: https://reviews.llvm.org/D82585
2020-07-04 12:31:51 +02:00
Sam McCall 4f2e7f6fb1 [clangd] Try to fix windows buildbot. NFC
http://45.33.8.238/win/19116/step_9.txt
2020-07-04 12:03:46 +02:00
Uday Bondhugula 6d6d5db251 [MLIR][Linalg] Generate the right type of load/store when lowering max/min pooling ops
While lowering min/max pooling ops to loops, generate the right kind of
load/stores (std or affine) instead of always generating std
load/stores.

Differential Revision: https://reviews.llvm.org/D83080
2020-07-04 14:55:02 +05:30
Paul Walker 7356b4243a [SVE] Fix invalid assert in expand_DestructiveOp.
AArch64ExpandPseudo::expand_DestructiveOp contains an assert to
ensure the destructive operand's register is unique.  However,
this is only required when psuedo expansion emits a movprfx.

A simple example when a movprfx is not required is
  Z0 = FADD_ZPZZ_UNDEF_S P0, Z0, Z0
which expands to an unprefixed FADD_ZPmZ_S instruction.

This patch moves the assert to the places where a movprfx is emitted.

Differential Revision: https://reviews.llvm.org/D83029
2020-07-04 09:21:40 +00:00
Sam McCall 15a60fe09f [clangd] Config: compute config in TUScheduler and BackgroundIndex
Summary:
ClangdServer owns the question of exactly which config to create, but
TUScheduler/BackgroundIndex control threads and so decide at which point
to inject it.

Reviewers: kadircet

Subscribers: ilya-biryukov, javed.absar, MaskRay, jkorous, arphaman, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D83095
2020-07-04 11:18:14 +02:00
Nikita Popov 3b671022e4 [InstSimplify] Simplify comparison between zext(x) and sext(x)
This is picking up a loose thread from D69006: We can simplify
(zext x) ule (sext x) and (zext x) sge (sext x) to true, with
various permutations. Oddly, SCEV knows about this identity,
but nothing on the IR level does.

Differential Revision: https://reviews.llvm.org/D83081
2020-07-04 11:03:00 +02:00
Nikita Popov 93ccb8eb52 [InstSimplify] Add additional zext/sext comparison tests (NFC)
Add vector variants, and negative tests where the operand does
not match.
2020-07-04 11:03:00 +02:00
LLVM GN Syncbot 2ac9c45910 [gn build] Port 8bd000a65f 2020-07-04 08:53:11 +00:00
Sam McCall 8bd000a65f [clangd] Config: loading and caching config from disk.
Summary:
The Provider extension point is designed to also be implemented by
ClangdLSPServer (to inject config-over-lsp) and likely by embedders.

Reviewers: kadircet

Subscribers: mgorny, ilya-biryukov, MaskRay, jkorous, arphaman, jfb, usaxena95, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D82964
2020-07-04 10:48:31 +02:00
Craig Topper fed432523e [X86] Directly emit VPTERNLOG from canonicalizeBitSelect when possible.
Seems to produce better results on some rotate tests. And is
neutral for other tests.
2020-07-03 22:08:28 -07:00
Kai Luo c352e0885a [PowerPC] Implement probing for prologue
This patch is part of supporting `-fstack-clash-protection`. Implemented
probing when emitting prologue.

Differential Revision: https://reviews.llvm.org/D81460
2020-07-04 03:07:08 +00:00
Craig Topper e75f2d5a8c [X86] Add matching support for X86ISD::ANDNP to X86DAGToDAGISel::tryVPTERNLOG. 2020-07-03 17:50:35 -07:00
peter klausler 0006354c3b [flang] Further implementation of external I/O unit operations (part 6)
Rework initial implementation of external I/O unit operations to
fix problems exposed in unit tests (in a later patch).  Add flushing.

Reviewed By: sscalpone

Differential Revision: https://reviews.llvm.org/D83147
2020-07-03 17:31:01 -07:00