39db48d0d4
Better Error Reporting
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Report missing template arguments more helpfully by supplying the name
of the missing argument in the error message.
llvm-svn: 140034
2011-09-19 18:26:07 +00:00
2266c007e3
Migrate this to use clang by default as well.
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llvm-svn: 139936
2011-09-16 20:36:22 +00:00
73ec21f301
We now look for clang, then llvm-gcc, then gcc as our compiler. We don't need
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this anymore.
llvm-svn: 139935
2011-09-16 20:36:20 +00:00
ee8157cb41
Fix mem type for VEX.128 form of VROUNDP*. Remove filter preventing VROUND from being recognized by disassembler.
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llvm-svn: 139691
2011-09-14 06:41:26 +00:00
07863d80b7
[tablegen] In ClangAttrEmitter.cpp handle SourceLocation arguments to attributes.
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llvm-svn: 139617
2011-09-13 18:41:43 +00:00
3171285edf
In ClangAttrEmitter.cpp emit code that allows attributes to keep their source range.
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llvm-svn: 139598
2011-09-13 16:05:43 +00:00
e98d8a5c84
Remove filter that was preventing MOVDQU/MOVDQA and their VEX forms from being disassembled. Also added encodings for the other register/register form of these instructions. Fixes PR10848.
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llvm-svn: 139588
2011-09-13 06:54:58 +00:00
a88e356017
Fix disassembling of reverse register/register forms of ADD/SUB/XOR/OR/AND/SBB/ADC/CMP/MOV.
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llvm-svn: 139485
2011-09-11 21:41:45 +00:00
a948cb9058
Fix disassembling of PAUSE instruction. Fixes PR10900. Also fixed NOP disassembling to ignore OpSize and REX.W.
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llvm-svn: 139484
2011-09-11 20:23:20 +00:00
8726d330f1
Update Clang AST attribute reader tblgen generation to match with ASTReader change
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llvm-svn: 139414
2011-09-09 21:37:29 +00:00
a05627ebaf
Thumb2 assembly parsing and encoding for LDREX/LDREXB/LDREXD/LDREXH.
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llvm-svn: 139381
2011-09-09 18:37:27 +00:00
e776b580c1
Make sure to handle the case where emitPredicateMatch returns false. Noticed by inspection.
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llvm-svn: 139317
2011-09-08 21:00:31 +00:00
f774712782
Added LateParsed property to TableGen attributes.
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This patch was written by DeLesley Hutchins.
llvm-svn: 139300
2011-09-08 17:40:49 +00:00
21d293a37f
Fix warning on windows; use of comparison with bool argument.
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llvm-svn: 139286
2011-09-08 08:12:01 +00:00
43674ad44d
Fix a use of freed string contents.
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Speculatively try to fix our windows testers with a patch I found on the internet.
llvm-svn: 139279
2011-09-08 05:25:49 +00:00
61abca6daa
whitespace
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llvm-svn: 139278
2011-09-08 05:23:14 +00:00
2392c53e73
Thumb2 assembly parsing and encoding for LDRBT.
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llvm-svn: 139267
2011-09-07 23:39:14 +00:00
5bfa8bab06
Thumb2 parsing and encoding for LDR(immediate).
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The immediate offset of the non-writeback i8 form (encoding T4) allows
negative offsets only. The positive offset form of the encoding is the
LDRT instruction. Immediate offsets in the range [0,255] use encoding T3
instead.
llvm-svn: 139254
2011-09-07 20:58:57 +00:00
8067df9503
Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
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llvm-svn: 139250
2011-09-07 19:42:28 +00:00
3d76f312b2
Dependency should be on the output file name, not the dependency file
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name.
llvm-svn: 139220
2011-09-07 02:12:03 +00:00
09ade9bb8b
valgrind: Suppress glibc's optiized strcasecmp harder.
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llvm-svn: 139084
2011-09-03 17:59:31 +00:00
67ba2403e8
Attempt to silence known valgrind errors.
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llvm-svn: 139048
2011-09-02 22:59:34 +00:00
09d153eb12
Make RecordVal Name an Init
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Store a RecordVal's name as an Init to allow class-qualified Record
members to reference Records that have Init names. We'll use this to
provide more programmability in how we name defs and their associated
members.
llvm-svn: 139031
2011-09-02 20:12:07 +00:00
54e09b4799
Fix the disassembly of the X86 "crc32w %ax, %eax" instruction. Bug 10702.
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llvm-svn: 139014
2011-09-02 18:03:03 +00:00
94ce535647
Make IC_VEX* not inherit from IC_*. Prevents instructions with no VEX form from disassembling to their non-VEX form. Also prevents weak filter collisons that were keeping valid VEX instructions from decoding properly. Make VEX_L* not inherit from VEX_* because the VEX.L bit always important. This stops packed int VEX encodings from being disassembled when specified with VEX.L=1. Fixes PR10831 and PR10806.
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llvm-svn: 138997
2011-09-02 04:17:54 +00:00
db4ce60328
Fix up r137380 based on post-commit review by Jim Grosbach.
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llvm-svn: 138948
2011-09-01 18:02:14 +00:00
93f3082118
lit: Normalize pathsep slashes also on %T.
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On Python-w32 with mingw msys bash, %T was replaced to "x:\foo\bar...". msys bash cannot handle DOSish paths.
llvm-svn: 138852
2011-08-31 03:56:17 +00:00
e6fba77971
Follow up to r138791.
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Add a instruction flag: hasPostISelHook which tells the pre-RA scheduler to
call a target hook to adjust the instruction. For ARM, this is used to
adjust instructions which may be setting the 's' flag. ADC, SBC, RSB, and RSC
instructions have implicit def of CPSR (required since it now uses CPSR physical
register dependency rather than "glue"). If the carry flag is used, then the
target hook will *fill in* the optional operand with CPSR. Otherwise, the hook
will remove the CPSR implicit def from the MachineInstr.
llvm-svn: 138810
2011-08-30 19:09:48 +00:00
d74c19449e
Lit option for ignoring stderr output.
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This is useful for testing a build a temporarily hand instrumented
build.
Patch by arrowdodger!
llvm-svn: 138804
2011-08-30 17:42:33 +00:00
4f2fba1108
Add vvvv support to disassembling of instructions with MRMDestMem and MRMDestReg form. Needed to support mem dest form of vmaskmovps/d. Fixes PR10807.
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llvm-svn: 138795
2011-08-30 07:09:35 +00:00
7e2489a7c9
Fix the disassembly of the X86 crc32 instruction. Bug 10702 and rdar://8795217
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llvm-svn: 138771
2011-08-29 22:06:28 +00:00
d22f9b395b
Reverted r138652, valgrind doesn't understand obj:*/tblgen.
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llvm-svn: 138703
2011-08-27 06:17:30 +00:00
b205c029a4
Improve encoding support for BLX with immediat eoperands, and fix a BLX decoding bug this uncovered.
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llvm-svn: 138675
2011-08-26 23:32:08 +00:00
28dc5abd05
valgrind: Always suppress tblgen leaks.
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I'll clean up the rest of the XFAIL: vg_leak lines if this works.
llvm-svn: 138652
2011-08-26 20:41:20 +00:00
37e94d06ba
lit: Add %T as a replacement for the output directory
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llvm-svn: 138640
2011-08-26 19:05:18 +00:00
76e3e0b554
Give ATTR_VEX higher priority when generating the disassembler context table. Fixes disassembling of VEX instructions with 'pp'=00. Fixes subset of PR10678.
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llvm-svn: 138552
2011-08-25 07:42:00 +00:00
0a0b3071df
Thumb parsing and encoding support for ADD SP instructions.
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Fix the test FIXME and add parsing support for the ADD (SP plus immediate)
and ADD (SP plus register) instruction forms.
llvm-svn: 138488
2011-08-24 21:22:15 +00:00
1b8457a84c
Thumb1 ADD/SUB SP instructions are predicable in Thumb2 mode.
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Add the predicate operand to the instructions. Update the back end
accordingly where the instructions are used. Restrict the SP operands
to actually only be SP, as otherwise these break assembly parsing for the
normal instruction variants.
llvm-svn: 138445
2011-08-24 17:46:13 +00:00
ffa5a909b4
Thread safety: Adding in an option for variadic expr* array of arguments
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llvm-svn: 138351
2011-08-23 18:49:23 +00:00
c50ea3beaf
Fix fpimmm->fpimm typo.
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Patch by Micah Villmow!
llvm-svn: 138330
2011-08-23 15:42:35 +00:00
9f1761c3e0
utils/lit/lit/TestingConfig.py: Pass TEMP and TMP to tests on Win32 hosts.
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Win32 GetTempPath() tends to pick up %WINDIR% when neither TEMP nor TMP was found. %WINDIR% should not be treated writable on recent Windows OS.
llvm-svn: 138192
2011-08-20 05:44:58 +00:00
9b4ae4bb1c
utils/lit/lit/TestingConfig.py: Split out environment vars for Win32.
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llvm-svn: 138191
2011-08-20 05:44:52 +00:00
a7b2d444b6
Allow non zero_reg explicit values for OptionalDefOperands in aliases.
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llvm-svn: 138073
2011-08-19 20:33:06 +00:00
b527f4498a
Tidy up. Formatting.
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llvm-svn: 138067
2011-08-19 19:53:51 +00:00
a4043c4b32
Allow the MCDisassembler to return a "soft fail" status code, indicating an instruction that is disassemblable, but invalid. Only used for ARM UNPREDICTABLE instructions at the moment.
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Patch by James Molloy.
llvm-svn: 137830
2011-08-17 17:44:15 +00:00
54cd240d0f
Update uwtable vim color!
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llvm-svn: 137806
2011-08-17 02:29:07 +00:00
d152e2cc00
Prefer diagnostics from target predicate in asm matcher.
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llvm-svn: 137742
2011-08-16 20:12:35 +00:00
aecb7501ad
Avoid evaluating Neon macro arguments more than once by disabling type checks.
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It turns out that the use of "__extension__" in these macros was disabling
the expected "incompatible pointer" warnings, so these type checks were not
doing anything anyway. They introduced a serious bug by evaluating some
macro arguments twice, which is a big problem for arguments with side effects.
I'll have to find another way to get the right type checking. Radar 9947657.
llvm-svn: 137680
2011-08-15 23:22:56 +00:00
120a96a721
MCTargetAsmParser target match predicate support.
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Allow a target assembly parser to do context sensitive constraint checking
on a potential instruction match. This will be used, for example, to handle
Thumb2 IT block parsing.
llvm-svn: 137675
2011-08-15 23:03:29 +00:00
b59abbd4fd
Move MatchResultTy enum into base class definition.
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No need for it to be redefined as part of every derived target asm parser
class.
llvm-svn: 137649
2011-08-15 20:53:08 +00:00
David Greene