Commit Graph

76630 Commits

Author SHA1 Message Date
Benjamin Kramer e7ae31cc25 XFAIL tblgen tests on leak checkers.
llvm-svn: 141533
2011-10-10 13:09:59 +00:00
Bill Wendling ea662bb32f When getting the number of bits necessary for addressing mode
ARMII::AddrModeT1_s, we need to take into account that if the frame register is
ARM::SP, then the number of bits is 8. If it's not ARM::SP, then the number of
bits is 5.

llvm-svn: 141529
2011-10-10 07:24:23 +00:00
Craig Topper a14c5723eb Put a bunch of calls to ToggleFeature behind proper if statements.
llvm-svn: 141527
2011-10-10 05:34:02 +00:00
Chad Rosier b60187ae74 Fix a regression from r138445. If we're loading from the frame/base pointer
the tADDrSPi instruction can't be used.  Make sure we're updating the opcode
to tADDi3 in all cases.
rdar://10254707

llvm-svn: 141523
2011-10-10 01:03:35 +00:00
Justin Holewinski dd40b0d792 PTX: Print .ptr kernel attributes if PTX version >= 2.2
llvm-svn: 141508
2011-10-09 15:42:02 +00:00
Craig Topper fe9179fa4f Add Ivy Bridge 16-bit floating point conversion instructions for the X86 disassembler.
llvm-svn: 141505
2011-10-09 07:31:39 +00:00
Jakob Stoklund Olesen 513d1213cc Prevent potential NOREX bug.
A GR8_NOREX virtual register is created when extrating a sub_8bit_hi
sub-register:

  %vreg2<def> = COPY %vreg1:sub_8bit_hi; GR8_NOREX:%vreg2 %GR64_ABCD:%vreg1
  TEST8ri_NOREX %vreg2, 1, %EFLAGS<imp-def>; GR8_NOREX:%vreg2

If such a live range is ever split, its register class must not be
inflated to GR8.  The sub-register copy can only target GR8_NOREX.

I dont have a test case for this theoretical bug.

llvm-svn: 141500
2011-10-08 20:20:03 +00:00
Jakob Stoklund Olesen 729abd360e Add TEST8ri_NOREX pseudo to constrain sub_8bit_hi copies.
In 64-bit mode, sub_8bit_hi sub-registers can only be used by NOREX
instructions. The COPY created from the EXTRACT_SUBREG DAG node cannot
target all GR8 registers, only those in GR8_NOREX.

TO enforce this, we ensure that all instructions using the
EXTRACT_SUBREG are GR8_NOREX constrained.

This fixes PR11088.

llvm-svn: 141499
2011-10-08 18:28:28 +00:00
Jakob Stoklund Olesen b81dcdef7b Add missing test case for r141410.
llvm-svn: 141498
2011-10-08 18:06:54 +00:00
Benjamin Kramer 645ad1d4ae Include direct.h for _mkdir on mingw32 too.
llvm-svn: 141495
2011-10-08 15:49:19 +00:00
Che-Liang Chiou 8a984e9418 Revert r141079: tblgen: add preprocessor as a separate mode
llvm-svn: 141492
2011-10-08 12:39:26 +00:00
Nicolas Geoffray a0263e7aca Always check if a method or a type exist before trying to create it.
llvm-svn: 141490
2011-10-08 11:56:36 +00:00
NAKAMURA Takumi 648b2fafd8 lib/Object: Suppress warnings on gcc-4.3.4 cygwin
llvm-svn: 141485
2011-10-08 11:22:53 +00:00
NAKAMURA Takumi f995985eba lib/DebugInfo/DWARFDebugLine.cpp: De-Unicode-ify.
llvm-svn: 141484
2011-10-08 11:22:47 +00:00
NAKAMURA Takumi ade616cb57 Whitespace
llvm-svn: 141483
2011-10-08 11:22:41 +00:00
Anton Korobeynikov e45373520d Disable ABS optimization for Thumb1 target, we don't have necessary instructions there.
llvm-svn: 141481
2011-10-08 08:38:45 +00:00
Akira Hatanaka 6be7d6c976 Simplify definition of FP move instructions.
llvm-svn: 141476
2011-10-08 03:50:18 +00:00
Akira Hatanaka 2365f90676 Define classes and multiclasses for FP binary instructions.
llvm-svn: 141475
2011-10-08 03:38:41 +00:00
Akira Hatanaka c7548dec7d Define multiclasses for FP-to-FP instructions.
llvm-svn: 141474
2011-10-08 03:29:22 +00:00
Akira Hatanaka 13ae13bdc2 Define classes for FP unary instructions and multiclasses for FP-to-fixed point
conversion instructions. 

llvm-svn: 141473
2011-10-08 03:19:38 +00:00
Andrew Trick ce0cb3a101 Unit test for LSR phi reuse in r141442.
llvm-svn: 141472
2011-10-08 02:34:51 +00:00
Akira Hatanaka 557c8e3443 Add patterns for unaligned load and store instructions and enable the
instruction selector to generate them.

llvm-svn: 141471
2011-10-08 02:24:10 +00:00
Andrew Trick eef7308df6 Add an extra safety check in front of the optimization in r141442.
llvm-svn: 141470
2011-10-08 02:16:39 +00:00
Bill Wendling e9574be6a3 Use the code that lowers the arguments and spills any values which are alive
across unwind edges. This is for the back-end which expects such things.

The code is from the original SjLj EH pass.

llvm-svn: 141463
2011-10-08 00:56:47 +00:00
Peter Collingbourne 6ddf7f443e Add clang-tblgen to OPTIONAL_DIRS when building native tools for the
cross build, so that a native version of clang-tblgen is available.
Should unbreak Clang cross build.

Also disable Polly for the native tool build, since it depends on
external libraries which may not be available, and it isn't required
anyway.

llvm-svn: 141454
2011-10-08 00:27:38 +00:00
Michael J. Spencer ba4a362276 llvm-objdump: Add relocation and archive support.
llvm-svn: 141451
2011-10-08 00:18:30 +00:00
Michael J. Spencer ee8fc6a622 PathV2: Add simplified version of exists that returns false on error.
llvm-svn: 141450
2011-10-08 00:18:12 +00:00
Michael J. Spencer 159970f733 Object: Add support for opening stdin.
llvm-svn: 141449
2011-10-08 00:17:58 +00:00
Michael J. Spencer 7eb8159927 Object: constize Archive.
llvm-svn: 141448
2011-10-08 00:17:45 +00:00
Jim Grosbach c87d60a58c Enable ARM mode VDUP(scalar) tests.
llvm-svn: 141447
2011-10-07 23:57:03 +00:00
Jim Grosbach d0637bfc68 ARM NEON assembly parsing and encoding for VDUP(scalar).
llvm-svn: 141446
2011-10-07 23:56:00 +00:00
Andrew Trick 7fb669ab48 LSR should only reuse phis that match its formula.
Fixes rdar://problem/5064068

llvm-svn: 141442
2011-10-07 23:46:21 +00:00
Eli Friedman 195464184e Fix APInt::operator*= so that it computes the correct result for large integers where there is unsigned overflow. Fix APFloat::toString so that it doesn't depend on the incorrect behavior in common cases (and computes the correct result in some rare cases). Fixes PR11086.
llvm-svn: 141441
2011-10-07 23:40:49 +00:00
Nick Lewycky 133a16871f Don't emit the symbol table entry for the .symtab_shndx section either.
llvm-svn: 141440
2011-10-07 23:29:53 +00:00
Nick Lewycky c6ac5f7388 Remove extraneous curlies. No functionality change.
llvm-svn: 141439
2011-10-07 23:28:32 +00:00
Jim Grosbach 6e5778f7b1 ARM prefix asmparser operand kind enums for readability.
llvm-svn: 141438
2011-10-07 23:24:09 +00:00
Bill Wendling 883ec97115 Take all of the invoke basic blocks and make the dispatch basic block their new
successor. Remove the old landing pad from their successor list, because it's
now the successor of the dispatch block. Now that the landing pad blocks are no
longer the destination of invokes, we can mark them as normal basic blocks
instead of landing pads.

This more closely resembles what the CFG is actually doing.

llvm-svn: 141436
2011-10-07 23:18:02 +00:00
Bill Wendling 6a37c64a47 Add a bool value to set the IsLandingPad flag to.
llvm-svn: 141435
2011-10-07 23:06:01 +00:00
Bill Wendling f9f5e455d4 Take the code that was emitted for the llvm.eh.dispatch.setup intrinsic and emit
it with the new SjLj emitter stuff. This way there's no need to emit that
kind-of-hacky intrinsic.

llvm-svn: 141419
2011-10-07 22:08:37 +00:00
Bill Wendling 7ecfbd90ef Thread the chain through the eh.sjlj.setjmp intrinsic, like it's documented to
do. This will be useful later on with the new SJLJ stuff.

llvm-svn: 141416
2011-10-07 21:25:38 +00:00
Nick Lewycky 8b02d36a23 Don't emit a shstrtabindex in the reserved range. Spotted by inspection and
patch by Cary Coutant!

llvm-svn: 141413
2011-10-07 20:58:24 +00:00
Nick Lewycky 4eb1143038 Clarify/fix typo. No functionality change.
llvm-svn: 141412
2011-10-07 20:56:23 +00:00
Jakob Stoklund Olesen 464fcc0035 Constrain both operands on MOVZX32_NOREXrr8.
This instruction is explicitly encoded without an REX prefix, so both
operands but be *_NOREX.

Also add an assertion to copyPhysReg() that fires when the MOV8rr_NOREX
constraints are not satisfied.

This fixes a miscompilation in 20040709-2 in the gcc test suite.

llvm-svn: 141410
2011-10-07 20:15:54 +00:00
Michael J. Spencer 5fd56b8302 Fix a few changes I missed.
llvm-svn: 141392
2011-10-07 19:52:41 +00:00
Michael J. Spencer cfb6cc7b14 Fix GCC again.
llvm-svn: 141389
2011-10-07 19:46:12 +00:00
Michael J. Spencer c1363cf21a Fix spelling in comment.
llvm-svn: 141386
2011-10-07 19:25:47 +00:00
Michael J. Spencer e5fd004719 Change relocation API to be per section. This time without breaking GCC.
llvm-svn: 141385
2011-10-07 19:25:32 +00:00
Jim Grosbach b8d9f51e4c Improve ARM assembly parser diagnostic for unexpected tokens.
Consider:
  mov r8, r11 fred

Previously, we issued the not very informative:
x.s:6:1: error: unexpected token in argument list

^

Now we generate:
x.s:5:14: error: unexpected token in argument list
  mov r8, r11 fred
              ^

llvm-svn: 141380
2011-10-07 18:27:04 +00:00
Bill Wendling 206d8a7f48 Revert 141376 and 141377 due to breaking the build.
--- Reverse-merging r141377 into '.':
U    tools/llvm-objdump/MachODump.cpp
--- Reverse-merging r141376 into '.':
U    include/llvm/Object/COFF.h
U    include/llvm/Object/ObjectFile.h
U    include/llvm-c/Object.h
U    tools/llvm-objdump/llvm-objdump.cpp
U    lib/Object/MachOObjectFile.cpp
U    lib/Object/COFFObjectFile.cpp
U    lib/Object/Object.cpp
U    lib/Object/ELFObjectFile.cpp

llvm-svn: 141379
2011-10-07 18:25:37 +00:00
David Greene 33f619971f Remove Multidefs
Multidefs are a bit unwieldy and incomplete.  Remove them in favor of
another mechanism, probably for loops.

Revert "Make Test More Thorough"
Revert "Fix a typo."
Revert "Vim Support for Multidefs"
Revert "Emacs Support for Multidefs"
Revert "Document Multidefs"
Revert "Add a Multidef Test"
Revert "Update Test for Multidefs"
Revert "Process Multidefs"
Revert "Parser Multidef Support"
Revert "Lexer Support for Multidefs"
Revert "Add Multidef Data Structures"

llvm-svn: 141378
2011-10-07 18:25:05 +00:00