Commit Graph

464 Commits

Author SHA1 Message Date
Jakob Stoklund Olesen 0c18757c9d Oops. Don't normalize spill weights twice.
When the normalizeSpillWeights function was introduced, I forgot to remove this
normalization.

This change could affect register allocation. Hopefully for the better.

llvm-svn: 110119
2010-08-03 17:21:16 +00:00
Owen Anderson a57b97e7e7 Fix batch of converting RegisterPass<> to INTIALIZE_PASS().
llvm-svn: 109045
2010-07-21 22:09:45 +00:00
Jakob Stoklund Olesen 37c42a3d02 Remove many calls to TII::isMoveInstr. Targets should be producing COPY anyway.
TII::isMoveInstr is going tobe completely removed.

llvm-svn: 108507
2010-07-16 04:45:42 +00:00
Jakob Stoklund Olesen b5c899d11b Fix small bug in isMoveInstr -> COPY translation
llvm-svn: 108013
2010-07-09 20:55:49 +00:00
Jakob Stoklund Olesen bd953d1805 Change TII::foldMemoryOperand API to require the machine instruction to be
inserted in a MBB, and return an already inserted MI.

This target API change is necessary to allow foldMemoryOperand to call
storeToStackSlot and loadFromStackSlot when folding a COPY to a stack slot
reference in a target independent way.

The foldMemoryOperandImpl hook is going to change in the same way, but I'll wait
until COPY folding is actually implemented. Most targets only fold copies and
won't need to specialize this hook at all.

llvm-svn: 107991
2010-07-09 17:29:08 +00:00
Jakob Stoklund Olesen 00264624a9 Convert EXTRACT_SUBREG to COPY when emitting machine instrs.
EXTRACT_SUBREG no longer appears as a machine instruction. Use COPY instead.

Add isCopy() checks in many places using isMoveInstr() and isExtractSubreg().
The isMoveInstr hook will be removed later.

llvm-svn: 107879
2010-07-08 16:40:22 +00:00
Jakob Stoklund Olesen a1e883dcf6 Remove references to INSERT_SUBREG after de-SSA.
Fix X86InstrInfo::convertToThreeAddressWithLEA to generate COPY instead of
INSERT_SUBREG.

llvm-svn: 107878
2010-07-08 16:40:15 +00:00
Jakob Stoklund Olesen f0e551d4f4 Revert "Remove references to INSERT_SUBREG after de-SSA" r107725.
Buildbot breakage.

llvm-svn: 107744
2010-07-07 00:32:25 +00:00
Jakob Stoklund Olesen e2d3067f6b Remove references to INSERT_SUBREG after de-SSA
llvm-svn: 107732
2010-07-06 23:40:35 +00:00
Jakob Stoklund Olesen 70ee3ecd33 Convert INSERT_SUBREG to COPY in TwoAddressInstructionPass.
INSERT_SUBREG will now only appear in SSA machine instructions.

Fix the handling of partial redefs in ProcessImplicitDefs. This is now relevant
since partial redef COPY instructions appear.

llvm-svn: 107726
2010-07-06 23:26:25 +00:00
Jakob Stoklund Olesen 4c82a9e7d0 Detect and handle COPY in many places.
This code is transitional, it will soon be possible to eliminate
isExtractSubreg, isInsertSubreg, and isMoveInstr in most places.

llvm-svn: 107547
2010-07-03 00:04:37 +00:00
Benjamin Kramer a000002428 VNInfos don't need to be destructed anymore.
llvm-svn: 106943
2010-06-26 11:30:59 +00:00
Jakob Stoklund Olesen 55d738e2e1 Don't track kills in VNInfo. Use interval ends instead.
The VNInfo.kills vector was almost unused except for all the code keeping it
updated. The few places using it were easily rewritten to check for interval
ends instead.

The two new methods LiveInterval::killedAt and killedInRange are replacements.

This brings us down to 3 independent data structures tracking kills.

llvm-svn: 106905
2010-06-25 22:53:05 +00:00
Jakob Stoklund Olesen 9b659142a6 Remove the now unused LiveIntervals::getVNInfoSourceReg().
This method was always a bit too simplistic for the real world. It didn't really
deal with subregisters and such.

llvm-svn: 106781
2010-06-24 20:18:15 +00:00
Jakob Stoklund Olesen 7f894d8fdc Remove the -fast-spill option.
This code path has never really been used, and we are going to be handling
spilling through the Spiller interface in the future.

llvm-svn: 106777
2010-06-24 19:56:08 +00:00
Jakob Stoklund Olesen 45230239e4 Replace a big gob of old coalescer logic with the new CoalescerPair class.
CoalescerPair can determine if a copy can be coalesced, and which register gets
merged away. The old logic in SimpleRegisterCoalescing had evolved into
something a bit too convoluted.

This second attempt fixes some crashes that only occurred Linux.

llvm-svn: 106769
2010-06-24 18:15:01 +00:00
Jakob Stoklund Olesen 53ccab7d1c Verify that VNI kills are pointing to existing instructions.
In this case it is essential that the kill is real because the spiller will
decide to omit a spill if it thinks there is a later kill.

llvm-svn: 106751
2010-06-24 15:56:59 +00:00
Jakob Stoklund Olesen dbb58d2974 Revert "Replace a big gob of old coalescer logic with the new CoalescerPair class."
Whiny buildbots.

llvm-svn: 106710
2010-06-24 00:52:22 +00:00
Jakob Stoklund Olesen f38e6720cc Replace a big gob of old coalescer logic with the new CoalescerPair class.
CoalescerPair can determine if a copy can be coalesced, and which register gets
merged away. The old logic in SimpleRegisterCoalescing had evolved into
something a bit too convoluted.

llvm-svn: 106701
2010-06-24 00:12:39 +00:00
Jakob Stoklund Olesen 07f4fa8198 TwoAddressInstructionPass::CoalesceExtSubRegs can insert INSERT_SUBREG
instructions, but it doesn't really understand live ranges, so the first
INSERT_SUBREG uses an implicitly defined register.

Fix it in LiveVariableAnalysis by adding the <undef> flag.

llvm-svn: 106333
2010-06-18 22:29:44 +00:00
Jakob Stoklund Olesen 207cd4bbd7 Allow a register to be redefined multiple times in a basic block.
LiveVariableAnalysis was a bit picky about a register only being redefined once,
but that really isn't necessary.

Here is an example of chained INSERT_SUBREGs that we can handle now:

68      %reg1040<def> = INSERT_SUBREG %reg1040, %reg1028<kill>, 14
                register: %reg1040 +[70,134:0)
76      %reg1040<def> = INSERT_SUBREG %reg1040, %reg1029<kill>, 13
                register: %reg1040 replace range with [70,78:1) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,134:0)  0@78-(134) 1@70-(78)
84      %reg1040<def> = INSERT_SUBREG %reg1040, %reg1030<kill>, 12
                register: %reg1040 replace range with [78,86:2) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,86:2)[86,134:0)  0@86-(134) 1@70-(78) 2@78-(86)
92      %reg1040<def> = INSERT_SUBREG %reg1040, %reg1031<kill>, 11
                register: %reg1040 replace range with [86,94:3) RESULT: %reg1040,0.000000e+00 = [70,78:1)[78,86:2)[86,94:3)[94,134:0)  0@94-(134) 1@70-(78) 2@78-(86) 3@86-(94)

rdar://problem/8096390

llvm-svn: 106152
2010-06-16 21:29:40 +00:00
Jakob Stoklund Olesen 818e4df2b4 Use readsWritesVirtualRegister instead of counting uses and defs when inserting
spills and reloads.

This means that a partial define of a register causes a reload so the other
parts of the register are preserved.

The reload can be prevented by adding an <imp-def> operand for the full
register. This is already done by the coalescer and live interval analysis where
relevant.

llvm-svn: 105369
2010-06-03 00:07:47 +00:00
Evan Cheng 3858451e09 - Change MachineInstr::findRegisterDefOperandIdx so it can also look for defs
that are aliases of the specified register.
- Rename modifiesRegister to definesRegister since it's looking a def of the
specific register or one of its super-registers. It's not looking for def of a
sub-register or alias that could change the specified register.
- Added modifiesRegister to look for defs of aliases.

llvm-svn: 104377
2010-05-21 20:53:24 +00:00
Jakob Stoklund Olesen b4e1687270 Revert "Use MachineInstr::readsWritesVirtualRegister to determine if a register is read."
This reverts r104322. I think it was causing miscompilations.

llvm-svn: 104323
2010-05-21 17:36:32 +00:00
Jakob Stoklund Olesen 8e8e090301 Use MachineInstr::readsWritesVirtualRegister to determine if a register is read.
This correctly handles partial redefines and undef uses.

llvm-svn: 104322
2010-05-21 16:42:30 +00:00
Jakob Stoklund Olesen 1f3801062d If the first definition of a virtual register is a partial redef, add an
<imp-def> operand for the full register. This ensures that the full physical
register is marked live after register allocation.

llvm-svn: 104320
2010-05-21 16:32:16 +00:00
Nick Lewycky c53cc4f8bf Fix typo in comment.
llvm-svn: 104209
2010-05-20 03:30:09 +00:00
Evan Cheng 166a7993ba Yes, if the redef is a copy, update the old val# with the copy. But make sure to clear the copy field if the redef is not a copy.
llvm-svn: 103922
2010-05-17 01:47:47 +00:00
Chris Lattner 93cd0f1c89 improve portability to systems that don't have powf/modf (e.g. solaris 9)
patch by Evzen Muller!

llvm-svn: 103876
2010-05-15 17:10:24 +00:00
Evan Cheng e26e56e72b A partial re-def instruction may be a copy.
llvm-svn: 103850
2010-05-15 01:35:44 +00:00
Evan Cheng faef5d0281 Re-defined valno is always valno even for partial re-def's.
llvm-svn: 103410
2010-05-10 17:33:49 +00:00
Evan Cheng 38d9a6f805 Teach liveintervalanalysis about virtual registers which are defined by reg_sequence instructions that are formed by registers defined by distinct instructions. e.g.
80      %reg1041:6<def> = VSHRNv4i16 %reg1034<kill>, 12, pred:14, pred:%reg0
. . .
120     %reg1041:5<def> = VSHRNv4i16 %reg1039<kill>, 12, pred:14, pred:%reg0

llvm-svn: 103102
2010-05-05 18:27:40 +00:00
Evan Cheng 4c908f4181 Teach PHI elimination to remove REG_SEQUENCE instructions and update references of the source operands with references of the destination with subreg indices. e.g.
%reg1029<def>, %reg1030<def> = VLD1q16 %reg1024<kill>, ...
%reg1031<def> = REG_SEQUENCE %reg1029<kill>, 5, %reg1030<kill>, 6
=>
%reg1031:5<def>, %reg1031:6<def> = VLD1q16 %reg1024<kill>, ...

PHI elimination now does more than phi elimination. It is really a de-SSA pass.

llvm-svn: 103039
2010-05-04 20:26:52 +00:00
Bob Wilson c936b56871 Print basic block numbers in live interval debug output. Since the rest of the
debug output is showing machine instructions, the IR-level basic block names
aren't very meaningful, and because multiple machine basic blocks may be
derived from one IR-level BB, they're also not unique.

llvm-svn: 102960
2010-05-03 21:38:11 +00:00
Evan Cheng a5a8f76cea - Really preserve dbg_value instructions when the register is spilled.
- Also, update dbg_value is the value is being re-matted from a frame slot, e.g. fixed slots for arguments.

llvm-svn: 102565
2010-04-28 23:52:26 +00:00
Evan Cheng c72d8a7dad Re-enable 102323 with fix: do not update dbg_value's with incorrect frame indices when the live interval are being re-materialized.
llvm-svn: 102361
2010-04-26 18:37:21 +00:00
Evan Cheng 5ad3cc1d5e Temporary disable spiller modifying dbg_value. It's breaking build.
llvm-svn: 102327
2010-04-26 08:24:07 +00:00
Evan Cheng ed69b382ea - Move TargetLowering::EmitTargetCodeForFrameDebugValue to TargetInstrInfo and rename it to emitFrameIndexDebugValue.
- Teach spiller to modify DBG_VALUE instructions to reference spill slots.

llvm-svn: 102323
2010-04-26 07:38:55 +00:00
Dan Gohman 9d2d053e11 Eliminate MachineBasicBlock::const_livein_iterator and make
MachineBasicBlock::livein_iterator a const_iterator, because
clients shouldn't ever be using the iterator interface to
mutate the livein set.

llvm-svn: 101147
2010-04-13 16:57:55 +00:00
Chris Lattner 2104b8d36e rename llvm::llvm_report_error -> llvm::report_fatal_error
llvm-svn: 100709
2010-04-07 22:58:41 +00:00
Benjamin Kramer 04c713dd45 Introduce SpecificBumpPtrAllocator, a wrapper for BumpPtrAllocator which allows
only a single type of object to be allocated. Use it to make VNInfo destruction
typesafe.

llvm-svn: 99919
2010-03-30 20:16:45 +00:00
Torok Edwin 8061bb141e Reapply r99881 with some fixes: only call destructor in releaseMemory!
llvm-svn: 99883
2010-03-30 11:17:48 +00:00
Torok Edwin a2d1dc42e1 Revert 99881, it brooke smooshlab's llvm-gcc-i386-darwin9.
llvm-svn: 99882
2010-03-30 10:25:08 +00:00
Torok Edwin ba6d13c0ea Introduce another Reset() method in BumpPtrAllocator that calls a destructor
on all objects it has allocated, if they are all of the same size and alignment.
Use this to destruct all VNInfos allocated in LiveIntervalAnalysis (PR6653).

valnos is not reliable for this purpose, as seen in r99400
(which still leaked, and sometimes caused double frees).

llvm-svn: 99881
2010-03-30 10:08:26 +00:00
Evan Cheng cbcccce420 Avoid being influenced by the presence of dbg_value instructions.
llvm-svn: 99879
2010-03-30 05:49:07 +00:00
Bob Wilson 4d87012eb3 Revert Edwin's change that is breaking MultiSource/Applications/ClamAV/clamscan.
--- Reverse-merging r99400 into '.':
D    test/CodeGen/Generic/2010-03-24-liveintervalleak.ll
U    lib/CodeGen/LiveIntervalAnalysis.cpp

llvm-svn: 99419
2010-03-24 20:25:25 +00:00
Torok Edwin 4bbfdd41ea Fix memory leak in liveintervals: the destructor for VNInfos must be called,
otherwise the SmallVector it contains doesn't free its memory.
In most cases LiveIntervalAnalysis could get away by not calling the destructor,
because VNInfos are bumpptr-allocated, and smallvectors usually don't grow.
However when the SmallVector does grow it always leaks.

This is the valgrind shown leak from the original testcase:
==8206== 18,304 bytes in 151 blocks are definitely lost in loss record 164 of 164
==8206==    at 0x4A079C7: operator new(unsigned long) (vg_replace_malloc.c:220)
==8206==    by 0x4DB7A7E: llvm::SmallVectorBase::grow_pod(unsigned long, unsigned long) (in /home/edwin/clam/git/builds/defaul
t/libclamav/.libs/libclamav.so.6.1.0)
==8206==    by 0x4F90382: llvm::VNInfo::addKill(llvm::SlotIndex) (in /home/edwin/clam/git/builds/default/libclamav/.libs/libcl
amav.so.6.1.0)
==8206==    by 0x5126B5C: llvm::LiveIntervals::handleVirtualRegisterDef(llvm::MachineBasicBlock*, llvm::ilist_iterator<llvm::M
achineInstr>, llvm::SlotIndex, llvm::MachineOperand&, unsigned int, llvm::LiveInterval&) (in /home/edwin/clam/git/builds/defau
lt/libclamav/.libs/libclamav.so.6.1.0)
==8206==    by 0x512725E: llvm::LiveIntervals::handleRegisterDef(llvm::MachineBasicBlock*, llvm::ilist_iterator<llvm::MachineI
nstr>, llvm::SlotIndex, llvm::MachineOperand&, unsigned int) (in /home/edwin/clam/git/builds/default/libclamav/.libs/libclamav
.so.6.1.0)
==8206==    by 0x51278A8: llvm::LiveIntervals::computeIntervals() (in /home/edwin/clam/git/builds/default/libclamav/.libs/libc
lamav.so.6.1.0)
==8206==    by 0x5127CB4: llvm::LiveIntervals::runOnMachineFunction(llvm::MachineFunction&) (in /home/edwin/clam/git/builds/de
fault/libclamav/.libs/libclamav.so.6.1.0)
==8206==    by 0x4DAE935: llvm::FPPassManager::runOnFunction(llvm::Function&) (in /home/edwin/clam/git/builds/default/libclama
v/.libs/libclamav.so.6.1.0)
==8206==    by 0x4DAEB10: llvm::FunctionPassManagerImpl::run(llvm::Function&) (in /home/edwin/clam/git/builds/default/libclama
v/.libs/libclamav.so.6.1.0)
==8206==    by 0x4DAED3D: llvm::FunctionPassManager::run(llvm::Function&) (in /home/edwin/clam/git/builds/default/libclamav/.l
ibs/libclamav.so.6.1.0)
==8206==    by 0x4D8BE8E: llvm::JIT::runJITOnFunctionUnlocked(llvm::Function*, llvm::MutexGuard const&) (in /home/edwin/clam/git/builds/default/libclamav/.libs/libclamav.so.6.1.0)
==8206==    by 0x4D8CA72: llvm::JIT::getPointerToFunction(llvm::Function*) (in /home/edwin/clam/git/builds/default/libclamav/.libs/libclamav.so.6.1.0)

llvm-svn: 99400
2010-03-24 13:50:36 +00:00
Evan Cheng 403062313f Fix liveintervals handling of dbg_value instructions.
llvm-svn: 98686
2010-03-16 21:51:27 +00:00
Evan Cheng 8c4df8160e The check for coalescing a virtual register to a physical register, e.g.
cl = EXTRACT_SUBREG reg1024, 1, is overly conservative. It should check
for overlaps of vr's live interval with the super registers of the
physical register (ECX in this case) and let JoinIntervals() handle checking
the coalescing feasibility against the physical register (cl in this case).

llvm-svn: 98251
2010-03-11 08:20:21 +00:00
Dale Johannesen 8340cc0d6c Fix a bug in DEBUG_VALUE handling Devang ran into.
I'll get this loop right yet.

llvm-svn: 98155
2010-03-10 15:06:26 +00:00