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1005 Commits

Author SHA1 Message Date
Chris Lattner 090eed0483 Remove type casts that are no longer needed 
llvm-svn: 24661
 2005-12-11 07:45:47 +00:00
Chris Lattner 3d9559fedc Fix the JIT failures from last night. 
llvm-svn: 24659
 2005-12-11 07:37:41 +00:00
Nate Begeman 4e56db674c Add support for TargetConstantPool nodes to the dag isel emitter, and use 
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.

llvm-svn: 24657
 2005-12-10 02:36:00 +00:00
Nate Begeman ade6f9a255 Add support patterns to many load and store instructions which will 
hopefully use patterns in the near future.

llvm-svn: 24651
 2005-12-09 23:54:18 +00:00
Chris Lattner e0f5f8e43c Teach the PPC backend about the ctor and dtor list when not using __main and 
linking the entire program into one bc file.

llvm-svn: 24645
 2005-12-09 18:24:29 +00:00
Chris Lattner 29e6c3dbf9 Add another important case we miss 
llvm-svn: 24639
 2005-12-08 07:13:28 +00:00
Chris Lattner de085f0165 Silence another annoying GCC warning 
llvm-svn: 24627
 2005-12-06 20:56:18 +00:00
Chris Lattner fea33f7e64 Use new PPC-specific nodes to represent shifts which require the 6-bit 
amount handling that PPC provides.  These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits.  This fixes a miscompilation of crafty with
the new front-end.

llvm-svn: 24615
 2005-12-06 02:10:38 +00:00
Chris Lattner f3322af5c6 Add some explicit type casts so that tblgen knows the type of the shift 
amount, which is not necessarily the same as the type being shifted.

llvm-svn: 24594
 2005-12-05 02:34:05 +00:00
Chris Lattner efc86f5f7a The basic fneg cases are already autogen'd 
llvm-svn: 24592
 2005-12-04 19:04:38 +00:00
Chris Lattner f979794717 Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen 
improvements.

llvm-svn: 24591
 2005-12-04 19:01:59 +00:00
Chris Lattner fd857daa0d Finish moving uncond br over to .td file, remove from .cpp file. 
llvm-svn: 24590
 2005-12-04 18:48:01 +00:00
Chris Lattner d9d18aff6a Define BR in the .td file now that Evan made tblgen smarter. 
llvm-svn: 24589
 2005-12-04 18:42:54 +00:00
Chris Lattner df9287836e Make sure these get added into the codegenmap when appropriate 
llvm-svn: 24566
 2005-12-01 18:09:22 +00:00
Nate Begeman 006bb04f3a Support multiple ValueTypes per RegisterClass, needed for upcoming vector 
work.  This change has no effect on generated code.

llvm-svn: 24563
 2005-12-01 04:51:06 +00:00
Nate Begeman aa5f8f2a26 Cosmetic change, better reflects actual values 
llvm-svn: 24562
 2005-12-01 04:48:26 +00:00
Chris Lattner bd099102f0 Fix a regression caused by a patch earlier today 
llvm-svn: 24561
 2005-12-01 03:50:19 +00:00
Evan Cheng d94aa71e1a Use a getCopyToReg() variant to generate a flaggy CopyToReg node. 
llvm-svn: 24558
 2005-12-01 00:41:50 +00:00
Chris Lattner e318977940 SelectNodeTo now returns N. Use it instead of return N directly. 
llvm-svn: 24549
 2005-11-30 22:53:06 +00:00
Chris Lattner 3713e6b49c Fix Regression/CodeGen/PowerPC/2005-11-30-vastart-crash.ll 
llvm-svn: 24547
 2005-11-30 20:40:54 +00:00
Nate Begeman 6f8c1ace6e No longer track value types for asm printer operands, and remove them as 
an argument to every operand printing function.  Requires some slight
tweaks to x86, the only user.

llvm-svn: 24541
 2005-11-30 18:54:35 +00:00
Nate Begeman 1064d6ec43 First chunk of actually generating vector code for packed types. These 
changes allow us to generate the following code:

_foo:
        li r2, 0
        lvx v0, r2, r3
        vaddfp v0, v0, v0
        stvx v0, r2, r3
        blr

for this llvm:

void %foo(<4 x float>* %a) {
entry:
        %tmp1 = load <4 x float>* %a
        %tmp2 = add <4 x float> %tmp1, %tmp1
        store <4 x float> %tmp2, <4 x float>* %a
        ret void
}

llvm-svn: 24534
 2005-11-30 08:22:07 +00:00
Nate Begeman 048b26387b Represent the encoding of the SPR instructions as they actually are, so 
that we can use the correct SPR numbers in the InstrInfo.td file.  This is
necessary to support VRsave.

llvm-svn: 24521
 2005-11-29 22:42:50 +00:00
Nate Begeman 3e7db9c6d5 Hook up one type, v4f32, to the VR RegisterClass for now. 
llvm-svn: 24517
 2005-11-29 08:17:20 +00:00
Nate Begeman c138118cdb Add the remainder of the AltiVec 4 x float instructions. Further 
enhancements will be necessary to teach the code generator that since
there is no fmul, it will have to do vmaddfp, adding +0.0.

llvm-svn: 24516
 2005-11-29 08:04:45 +00:00
Chris Lattner 9c415364cf No targets support line number info yet. 
llvm-svn: 24513
 2005-11-29 06:16:21 +00:00
Nate Begeman 89b049af90 Add the majority of the vector machien value types we expect to support, 
and make a few changes to the legalization machinery to support more than
16 types.

llvm-svn: 24511
 2005-11-29 05:45:29 +00:00
Evan Cheng 1d4af53444 Fixed a comment bug: 
createPPCPatternInstructionSelector -> createPPCISelPattern

llvm-svn: 24510
 2005-11-29 04:59:46 +00:00
Chris Lattner 7a18a25d33 don't say this is i128, because it isn't yet. Hopefully nate will change 
this to be something sane, but in the mean time it is unused, so safe to
make something bogus.

llvm-svn: 24504
 2005-11-29 00:41:40 +00:00
Nate Begeman 11fd6b22b1 Small tweaks noticed while on the plane. 
llvm-svn: 24492
 2005-11-26 22:39:34 +00:00
Nate Begeman 8492fd30ab Some first bits of AltiVec stuff: Instruction Formats, Encodings, and 
Registers.  Apologies to Jim if the scheduling info so far isn't accurate.

There's a few more things like VRsave support that need to be finished up
in my local tree before I can commit code that Does The Right Thing for
turning 4 x float into the various altivec packed float instructions.

llvm-svn: 24489
 2005-11-23 05:29:52 +00:00
Chris Lattner ef83ebd45d Use generic constant pool emission code in the AsmPrinter class. 
llvm-svn: 24465
 2005-11-21 08:26:15 +00:00
Chris Lattner ffbfa71866 Use the FunctionNumber provided by the AsmPrinter class 
llvm-svn: 24462
 2005-11-21 08:14:07 +00:00
Chris Lattner dd3bf8e4a2 Use CommentString where possible, fix a bug where aix mode wouldn't assemble 
due to basic blocks being misnamed.

llvm-svn: 24459
 2005-11-21 08:02:41 +00:00
Chris Lattner a0222a1698 unify the darwin and aix constant pool printers 
llvm-svn: 24458
 2005-11-21 07:57:37 +00:00
Chris Lattner 99946fb63f Adjust to capitalized AsmPrinter method names 
llvm-svn: 24456
 2005-11-21 07:51:23 +00:00
Chris Lattner c2bc19af57 use PrivateGlobalPrefix for basic blocks 
llvm-svn: 24453
 2005-11-21 07:41:05 +00:00
Chris Lattner b650241f8b This is now implemented in common codegen code 
llvm-svn: 24446
 2005-11-21 07:06:58 +00:00
Chris Lattner 41cb115afb set PrivateGlobalPrefix on darwin, use it when printing out CP references 
llvm-svn: 24441
 2005-11-21 06:47:58 +00:00
Chris Lattner cdde9990b7 only use dyld stubs if not in ppc-static mode. This completes support for 
non-static codegen.

llvm-svn: 24403
 2005-11-17 19:40:30 +00:00
Chris Lattner 6ab87fa360 refactor call operand handling to eliminate special cases from printOp. 
llvm-svn: 24401
 2005-11-17 19:25:59 +00:00
Chris Lattner bd9efdb64c disentangle call operands from branch operands a bit 
llvm-svn: 24400
 2005-11-17 19:16:08 +00:00
Chris Lattner 3570cf456b add an option to generate completely non-pic code, corresponding to what 
gcc -static produces on PPC.  This is used for building kexts and other things.

With this, materializing the address of a global looks like:

        lis r2, ha16(L_H$non_lazy_ptr)
        la r3, lo16(L_H$non_lazy_ptr)(r2)

we're still emitting stubs for functions, which is wrong.  That is next.

llvm-svn: 24399
 2005-11-17 18:55:48 +00:00
Chris Lattner 8f8ed28a64 Fix a bug that resistor on IRC hit where we tried to create token factor 
nodes of load results, not of their chain results.

llvm-svn: 24398
 2005-11-17 18:30:17 +00:00
Chris Lattner 5aba6ae3b3 Enable global address legalization, fixing a todo and allowing the removal 
of some code.  This exposes the implicit load from the stubs to the DAG, allowing
them to be optimized by the dag combiner.  It also moves darwin specific stuff
out of the isel into the legalizer, and allows more to be moved to the .td file.

llvm-svn: 24397
 2005-11-17 18:26:56 +00:00
Chris Lattner 0fe88e3f32 Teach the selector to fold lo(g) into load instruction immediate fields 
llvm-svn: 24396
 2005-11-17 18:02:16 +00:00
Chris Lattner 4b11fa284d Generate LA and ADDIS when possible. 
llvm-svn: 24395
 2005-11-17 17:52:01 +00:00
Chris Lattner 3648c20472 Use the right accessor to create this node 
llvm-svn: 24394
 2005-11-17 17:51:38 +00:00
Chris Lattner 595088aa0f Add an initial hack at legalizing GlobalAddress into the appropriate nodes 
on Darwin to remove smarts from the isel.  This is currently disabled by
default (uncomment setOperationAction(ISD::GlobalAddress to enable it).
tblgen needs to become smarter about tglobaladdr nodes and bigger patterns
needed to be added to the .td file.  However, we can currently emit stuff like
this:  :)

        li r2, lo16(L_x$non_lazy_ptr)
        lis r3, ha16(L_x$non_lazy_ptr)
        lwzx r2, r3, r2

The obvious improvements will follow.

llvm-svn: 24390
 2005-11-17 07:30:41 +00:00
Chris Lattner 63ed749ce0 LI could theoretically be used for the lo-part of a global address, just like 
lis can be used for the high part.

llvm-svn: 24388
 2005-11-17 07:04:43 +00:00