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4009 Commits

Author SHA1 Message Date
Evan Cheng e5a94a03e2 Add inc + dec patterns which fold load + stores. 
llvm-svn: 24686
 2005-12-13 01:02:47 +00:00
Evan Cheng bde9e6fca6 Add neg and not patterns which fold load + stores. 
llvm-svn: 24685
 2005-12-13 00:54:44 +00:00
Evan Cheng c414d563f0 Missed a couple redundant explicit type casts. 
llvm-svn: 24684
 2005-12-13 00:25:07 +00:00
Evan Cheng 62e6808aa5 Fix some bad choice of names: i16SExt8 ->i16immSExt8, etc. 
llvm-svn: 24683
 2005-12-13 00:14:11 +00:00
Evan Cheng 86b2cf22d2 * Split immSExt8 to i16SExt8 and i32SExt8 for i16 and i32 immediate operands. 
This enables the removal of some explicit type casts.
* Rename immZExt8 to i16ZExt8 as well.

llvm-svn: 24682
 2005-12-13 00:01:09 +00:00
Evan Cheng 3e52756928 Add some integer mul patterns. 
llvm-svn: 24681
 2005-12-12 23:47:46 +00:00
Evan Cheng af3fe8217a Add some sub patterns. 
llvm-svn: 24675
 2005-12-12 21:54:05 +00:00
Evan Cheng 67ed58e22b When SelectLEAAddr() fails, it shouldn't cause the side effect of having the 
base or index operands being selected.

llvm-svn: 24674
 2005-12-12 21:49:40 +00:00
Evan Cheng bfd259a2b7 For ISD::RET, if # of operands >= 2, try selection the real data dep. operand 
first before the chain.
e.g.
int X;

int foo(int x)
{
  x += X + 37;
  return x;
}

If chain operand is selected first, we would generate:
	movl X, %eax
	movl 4(%esp), %ecx
	leal 37(%ecx,%eax), %eax

rather than
	movl $37, %eax
	addl 4(%esp), %eax
	addl X, %eax

which does not require %ecx. (Due to ADD32rm not matching.)

llvm-svn: 24673
 2005-12-12 20:32:18 +00:00
Andrew Lenharth cd54254af3 fix FP selects 
llvm-svn: 24672
 2005-12-12 20:30:09 +00:00
Chris Lattner d6b17765e4 remove some never-completed and now-obsolete code. 
llvm-svn: 24671
 2005-12-12 20:12:20 +00:00
Evan Cheng e80248b378 Add a few more add / store patterns. e.g. ADD32mi8. 
llvm-svn: 24670
 2005-12-12 19:45:23 +00:00
Andrew Lenharth b8296181e0 restore a more restricted select 
llvm-svn: 24668
 2005-12-12 17:43:52 +00:00
Chris Lattner a4c6cc5af4 Fix typo :( 
llvm-svn: 24664
 2005-12-11 18:43:13 +00:00
Chris Lattner 254e0a842f add selectcc 
llvm-svn: 24662
 2005-12-11 08:35:54 +00:00
Chris Lattner 090eed0483 Remove type casts that are no longer needed 
llvm-svn: 24661
 2005-12-11 07:45:47 +00:00
Chris Lattner e6f2c82073 Realize the constant pool & global addrs must always be ptr type 
llvm-svn: 24660
 2005-12-11 07:45:04 +00:00
Chris Lattner 3d9559fedc Fix the JIT failures from last night. 
llvm-svn: 24659
 2005-12-11 07:37:41 +00:00
Andrew Lenharth 20d0b81c04 FP select improvements (and likely breakage), oh and crazy people might want to *return* floating point values. Don't see why myself 
llvm-svn: 24658
 2005-12-11 03:54:31 +00:00
Nate Begeman 4e56db674c Add support for TargetConstantPool nodes to the dag isel emitter, and use 
them in the PPC backend, to simplify some logic out of Select and
SelectAddr.

llvm-svn: 24657
 2005-12-10 02:36:00 +00:00
Evan Cheng 3c5198336c Use SDTCisPtrTy type property for store address. 
llvm-svn: 24656
 2005-12-10 01:59:36 +00:00
Evan Cheng 0d6cfee704 * Added X86 store patterns. 
* Added X86 dec patterns.

llvm-svn: 24654
 2005-12-10 00:48:20 +00:00
Nate Begeman ade6f9a255 Add support patterns to many load and store instructions which will 
hopefully use patterns in the near future.

llvm-svn: 24651
 2005-12-09 23:54:18 +00:00
Chris Lattner 27656ac89c Add SDTCisPtrTy and use it for loads, to indicate that the operand of a load 
must be a pointer.  This removes a type check out of the code generated by
tblgen for load matching.

llvm-svn: 24650
 2005-12-09 22:58:42 +00:00
Evan Cheng 275a3ed80c Added patterns for ADD8rm, etc. These fold load operands. e.g. addb 4(%esp), %al 
llvm-svn: 24648
 2005-12-09 22:48:48 +00:00
Chris Lattner e0f5f8e43c Teach the PPC backend about the ctor and dtor list when not using __main and 
linking the entire program into one bc file.

llvm-svn: 24645
 2005-12-09 18:24:29 +00:00
Andrew Lenharth 87bf2234b5 it helps if your conditionals are not reversed 
llvm-svn: 24641
 2005-12-09 00:45:42 +00:00
Chris Lattner 29e6c3dbf9 Add another important case we miss 
llvm-svn: 24639
 2005-12-08 07:13:28 +00:00
Evan Cheng 790af6d18f Added support for ComplexPattern. 
llvm-svn: 24638
 2005-12-08 04:28:48 +00:00
Evan Cheng f039648614 Added explicit type field to ComplexPattern. 
llvm-svn: 24637
 2005-12-08 02:15:07 +00:00
Evan Cheng c9fab31098 * Added intelligence to X86 LEA addressing mode matching routine so it returns 
false if the match is not profitable. e.g. leal 1(%eax), %eax.
* Added patterns for X86 integer loads and LEA32.

llvm-svn: 24635
 2005-12-08 02:01:35 +00:00
Chris Lattner 3225733e65 X86 doesn't support sextinreg for 8-bit things either. 
llvm-svn: 24631
 2005-12-07 17:59:14 +00:00
Andrew Lenharth 26473b6b58 fix divide and remainder 
llvm-svn: 24628
 2005-12-06 23:27:39 +00:00
Chris Lattner de085f0165 Silence another annoying GCC warning 
llvm-svn: 24627
 2005-12-06 20:56:18 +00:00
Andrew Lenharth 973cd1c845 more decent branches for FP. I might have to make some intermediate nodes to actually be able to use the DAG for FPcmp 
llvm-svn: 24625
 2005-12-06 20:43:30 +00:00
Andrew Lenharth 29b7ef0065 OK, this does wonders for broken stuff 
llvm-svn: 24624
 2005-12-06 20:40:34 +00:00
Chris Lattner fea33f7e64 Use new PPC-specific nodes to represent shifts which require the 6-bit 
amount handling that PPC provides.  These are generated by the lowering code
and prevents the dag combiner from assuming (rightfully) that the shifts
don't only look at 5 bits.  This fixes a miscompilation of crafty with
the new front-end.

llvm-svn: 24615
 2005-12-06 02:10:38 +00:00
Andrew Lenharth e788bbf6ef added instructions with inverted immediates 
llvm-svn: 24614
 2005-12-06 00:33:53 +00:00
Andrew Lenharth 08c4a775e6 yea, it helps to have your path set right when testing 
llvm-svn: 24613
 2005-12-05 23:41:45 +00:00
Andrew Lenharth 3c7c4d7508 These never trigger, but whatever 
llvm-svn: 24612
 2005-12-05 23:19:44 +00:00
Evan Cheng c0c190239d Remove unnecessary let hasCtrlDep=1 now it can be inferred. 
llvm-svn: 24611
 2005-12-05 23:09:43 +00:00
Andrew Lenharth 5bfcd1e63a move this over to the dag 
llvm-svn: 24609
 2005-12-05 20:50:53 +00:00
Andrew Lenharth 9410433966 fix constant pool loads 
llvm-svn: 24607
 2005-12-05 17:51:02 +00:00
Chris Lattner 3c0b8f577d Several things: 
1. Remove redundant type casts now that PR673 is implemented.
2. Implement the OUT*ir instructions correctly.  The port number really
   *is* a 16-bit value, but the patterns should only match if the number
   is 0-255.  Update the patterns so they now match.
3. Fix patterns for shifts to reflect that the shift amount is always an
   i8, not an i16 as they were believed to be before.  This previous fib
   stopped working when we started knowing that CL has type i8.
4. Change use of i16i8imm in SH*ri patterns to all be imm.

llvm-svn: 24599
 2005-12-05 02:40:25 +00:00
Chris Lattner 282c2af4d8 On some targets (e.g. X86), shift amounts are not the same as the value 
being shifted.  Don't assume they are.

llvm-svn: 24598
 2005-12-05 02:37:26 +00:00
Chris Lattner c54cddd25b Add some explicit type casts so that tblgen knows the type of the shiftamount, which is not necessarily the same as the type being shifted. 
llvm-svn: 24595
 2005-12-05 02:34:29 +00:00
Chris Lattner f3322af5c6 Add some explicit type casts so that tblgen knows the type of the shift 
amount, which is not necessarily the same as the type being shifted.

llvm-svn: 24594
 2005-12-05 02:34:05 +00:00
Chris Lattner efc86f5f7a The basic fneg cases are already autogen'd 
llvm-svn: 24592
 2005-12-04 19:04:38 +00:00
Chris Lattner f979794717 Autogen matching code for ADJCALLSTACK[UP|DOWN], thanks to Evan's tblgen 
improvements.

llvm-svn: 24591
 2005-12-04 19:01:59 +00:00
Chris Lattner fd857daa0d Finish moving uncond br over to .td file, remove from .cpp file. 
llvm-svn: 24590
 2005-12-04 18:48:01 +00:00