Commit Graph

14328 Commits

Author SHA1 Message Date
Jakub Staszak 3f158fdf6e Introduce "expect" intrinsic instructions.
llvm-svn: 134516
2011-07-06 18:22:43 +00:00
Dan Gohman 024bb8fa07 Remove the ObjC ARC passes from the default optimization list, and add
extension points to be used by clang.

llvm-svn: 134444
2011-07-05 22:01:44 +00:00
Devang Patel 347a112df3 Speculatively revert r134431.
llvm-svn: 134440
2011-07-05 21:16:28 +00:00
Devang Patel e550f25f8a Clear debug loc while updating insert point.
llvm-svn: 134431
2011-07-05 18:58:22 +00:00
Michael J. Spencer dea45cc7cf Fix 80-col.
llvm-svn: 134409
2011-07-05 14:49:08 +00:00
Tobias Grosser d562d30a20 SuccIterator on bbs without terminator insts
Remove the assert that triggers if SuccIterator is constructed for a basic block
without a terminator instruction. Instead of triggering an assert a succ_end()
iterator is returned. This models a basic block with zero successors and allows
us to use F->viewCFG() on incompletely constructed functions.

llvm-svn: 134398
2011-07-04 23:09:02 +00:00
Jakob Stoklund Olesen 25a404eb81 Include a source location when complaining about bad inline assembly.
Add a MI->emitError() method that the backend can use to report errors
related to inline assembly. Call it from X86FloatingPoint.cpp when the
constraints are wrong.

This enables proper clang diagnostics from the backend:

$ clang -c pr30848.c
pr30848.c:5:12: error: Inline asm output regs must be last on the x87 stack
  __asm__ ("" : "=u" (d));  /* { dg-error "output regs" } */
           ^
1 error generated.

llvm-svn: 134307
2011-07-02 03:53:34 +00:00
Evan Cheng fb71f4260a Add getFeatureBits to extract feature bits for a given CPU.
llvm-svn: 134298
2011-07-02 00:43:44 +00:00
Eric Christopher 1620130729 Remove the confusing getDarwinNumber() api and friends.
Part of rdar://9714064

llvm-svn: 134291
2011-07-02 00:19:55 +00:00
Douglas Gregor de3c92674e Add initial *-*-rtems* target, from Joel Sherrill
llvm-svn: 134282
2011-07-01 22:41:06 +00:00
Evan Cheng 0711c4d489 Add MCSubtargetInfo target registry stuff.
llvm-svn: 134279
2011-07-01 22:25:04 +00:00
Evan Cheng 0d639a28aa Rename TargetSubtarget to TargetSubtargetInfo for consistency.
llvm-svn: 134259
2011-07-01 21:01:15 +00:00
Evan Cheng 54b68e3432 - Added MCSubtargetInfo to capture subtarget features and scheduling
itineraries.
- Refactor TargetSubtarget to be based on MCSubtargetInfo.
- Change tablegen generated subtarget info to initialize MCSubtargetInfo
  and hide more details from targets.

llvm-svn: 134257
2011-07-01 20:45:01 +00:00
Evan Cheng 703a0fbf39 Hide the call to InitMCInstrInfo into tblgen generated ctor.
llvm-svn: 134244
2011-07-01 17:57:27 +00:00
Rafael Espindola 968af4fee2 Fix use after free.
llvm-svn: 134234
2011-07-01 04:40:50 +00:00
Evan Cheng d8e27a584e Switch SubtargetFeatures from std::string to StringRef.
llvm-svn: 134219
2011-07-01 00:23:10 +00:00
Bill Wendling b403f0c4ed Add target a target hook to get the register number used by the compact unwind
encoding for the registers it knows about. Return -1 if it can't handle that
register.

llvm-svn: 134202
2011-06-30 23:20:32 +00:00
Rafael Espindola 070f96c567 Create a isFullCopy predicate.
llvm-svn: 134189
2011-06-30 21:15:52 +00:00
Rafael Espindola b10a0f223a Add r134057 back, but splice the predecessor after the successors phi
nodes.

Original message:
Let simplify cfg simplify bb with only debug and lifetime intrinsics.

llvm-svn: 134182
2011-06-30 20:14:24 +00:00
Evan Cheng fe6e405e8c Fix the ridiculous SubtargetFeatures API where it implicitly expects CPU name to
be the first encoded as the first feature. It then uses the CPU name to look up
features / scheduling itineray even though clients know full well the CPU name
being used to query these properties.

The fix is to just have the clients explictly pass the CPU name!

llvm-svn: 134127
2011-06-30 01:53:36 +00:00
Eric Christopher f81292ba3b Remove getRegClassForInlineAsmConstraint and all dependencies.
Fixes rdar://9643582

llvm-svn: 134123
2011-06-30 01:20:03 +00:00
Devang Patel 0eada03216 Revert r133953 for now.
llvm-svn: 134116
2011-06-29 23:50:13 +00:00
Andrew Trick e98e9a1540 Added IRBuilder::SetInsertPoint(Use) to find a valid insertion point
that dominates the given Use.

llvm-svn: 134111
2011-06-29 23:01:52 +00:00
Andrew Trick f0f9f45087 whitespace
llvm-svn: 134110
2011-06-29 22:52:51 +00:00
Evan Cheng 77ec04c656 Indentation
llvm-svn: 134100
2011-06-29 21:58:37 +00:00
Chad Rosier 96ed721d9b Temporarily revert r134057: "Let simplify cfg simplify bb with only debug and
lifetime intrinsics" due to buildbot failures.

llvm-svn: 134071
2011-06-29 16:22:11 +00:00
Rafael Espindola 4c0dfcec7e Let simplify cfg simplify bb with only debug and lifetime intrinsics.
llvm-svn: 134057
2011-06-29 05:25:47 +00:00
Evan Cheng 8264e272a9 Sink SubtargetFeature and TargetInstrItineraries (renamed MCInstrItineraries) into MC.
llvm-svn: 134049
2011-06-29 01:14:12 +00:00
Evan Cheng 6502f0094e Trim include
llvm-svn: 134048
2011-06-29 00:35:31 +00:00
Evan Cheng d051f0a837 Unbreak every backend.
llvm-svn: 134031
2011-06-28 21:33:11 +00:00
Evan Cheng 194c3dc01f Move CallFrameSetupOpcode and CallFrameDestroyOpcode to TargetInstrInfo.
llvm-svn: 134030
2011-06-28 21:14:33 +00:00
Evan Cheng df8974ef2f Add MCInstrInfo registeration machinery.
llvm-svn: 134026
2011-06-28 20:29:03 +00:00
Evan Cheng 1e210d08d8 Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc
llvm-svn: 134024
2011-06-28 20:07:07 +00:00
Evan Cheng 6cc775f905 - Rename TargetInstrDesc, TargetOperandInfo to MCInstrDesc and MCOperandInfo and
sink them into MC layer.
- Added MCInstrInfo, which captures the tablegen generated static data. Chang
TargetInstrInfo so it's based off MCInstrInfo.

llvm-svn: 134021
2011-06-28 19:10:37 +00:00
Jay Foad 2a31eb49c7 PR10210: New method ConstantArray::getAsCString(). Use it in LTO to
avoid getting embedded trailing null bytes in std::strings.

llvm-svn: 133999
2011-06-28 08:24:19 +00:00
Andrew Trick 526605d06f Cleanup. Fix a stupid variable name.
llvm-svn: 133996
2011-06-28 05:44:06 +00:00
Andrew Trick 411daa5e81 SCEVExpander: give new insts a name that identifies the reponsible pass.
llvm-svn: 133992
2011-06-28 05:07:32 +00:00
Evan Cheng 21afabe73d Remove RegClass2VRegMap from MachineRegisterInfo.
llvm-svn: 133967
2011-06-27 23:54:40 +00:00
Evan Cheng 105974d497 Remove RCBarriers from TargetInstrDesc.
llvm-svn: 133964
2011-06-27 23:47:21 +00:00
Evan Cheng b7d00313dc Remove the experimental (and unused) pre-ra splitting pass. Greedy regalloc can split live ranges.
llvm-svn: 133962
2011-06-27 23:40:45 +00:00
Devang Patel 4dc034df1d During bottom up fast-isel, instructions emitted to materalize registers are at top of basic block and do not have debug location. This may misguide debugger while entering the basic block and sometimes debugger provides semi useful view of current location to developer by picking up previous known location as current location. Assign a sensible location to the first instruction in a basic block, if it does not have one location derived from source file, so that debugger can provide meaningful user experience to developers in edge cases.
llvm-svn: 133953
2011-06-27 22:32:04 +00:00
Evan Cheng 8d71a75777 More refactoring. Move getRegClass from TargetOperandInfo to TargetInstrInfo.
llvm-svn: 133944
2011-06-27 21:26:13 +00:00
Owen Anderson a84be6c96b Add support for alternative register names, useful for instructions whose operands are logically equivalent to existing registers, but happen to be printed specially. For example, an instruciton that prints d0[0] instead of s0.
Patch by Jim Grosbach.

llvm-svn: 133940
2011-06-27 21:06:21 +00:00
Evan Cheng c8b39c7952 Rename unnecessary forward declaration.
llvm-svn: 133928
2011-06-27 19:41:39 +00:00
Nick Lewycky 3e334a42d7 Move onlyUsedByLifetimeMarkers to ValueTracking so that it can be used by other
passes as well.

llvm-svn: 133904
2011-06-27 04:20:45 +00:00
Jakob Stoklund Olesen 537a302d1a Distinguish early clobber output operands from clobbered registers.
Both become <earlyclobber> defs on the INLINEASM MachineInstr, but we
now use two different asm operand kinds.

The new Kind_Clobber is treated identically to the old
Kind_RegDefEarlyClobber for now, but x87 floating point stack inline
assembly does care about the difference.

This will pop a register off the stack:

  asm("fstp %st" : : "t"(x) : "st");

While this will pop the input and push an output:

  asm("fst %st" : "=&t"(r) : "t"(x));

We need to know if ST0 was a clobber or an output operand, and we can't
depend on <dead> flags for that.

llvm-svn: 133902
2011-06-27 04:08:33 +00:00
Rafael Espindola 676c405acb There is only one register coalescer. Merge it into the base class and
remove the analysis group.

llvm-svn: 133899
2011-06-26 22:34:10 +00:00
Rafael Espindola fef3c64a1f Move RegisterCoalescer.h to lib/CodeGen.
llvm-svn: 133895
2011-06-26 21:41:06 +00:00
Michael J. Spencer 1d6167fd30 Object: Add proper error handling.
llvm-svn: 133872
2011-06-25 17:55:23 +00:00
Michael J. Spencer ec29b121ff Make Binary the parent of ObjectFile and update children to new interface.
llvm-svn: 133870
2011-06-25 17:54:50 +00:00