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4 Commits

Author SHA1 Message Date
Nikolay Haustov cb9dddb1d7 [AMDGPU] Assembler: Update SOP* tests 
Add VI encodings.
Reformat sopp.s to match style of other files.

Differential Revision: http://reviews.llvm.org/D18084

llvm-svn: 263540
 2016-03-15 07:44:57 +00:00
Nikolay Haustov 2a62b3c244 [AMDGPU] Fix operands of S_BFE_U64 and S_BFM_B64 
src1 of s_bfe_u64 is 32-bit (same as s_bfe_i64).
src0 and src1 of s_bfm_b64 are 32-bit.
Update tests.

Review: http://reviews.llvm.org/D17480

Reviewers: arsenm
llvm-svn: 261621
 2016-02-23 09:19:14 +00:00
Matt Arsenault 192b282bf3 AMDGPU: Define correct number of SGPRs 
There are actually 104 so 2 were missing.

More assembler tests with high register number tuples
will be included in later patches.

llvm-svn: 251999
 2015-11-03 22:39:50 +00:00
Tom Stellard 45bb48ea19 R600 -> AMDGPU rename 
llvm-svn: 239657
 2015-06-13 03:28:10 +00:00