Commit Graph

146993 Commits

Author SHA1 Message Date
Simon Pilgrim c8da0c0bdf Fix signed/unsigned warning
llvm-svn: 299194
2017-03-31 10:45:35 +00:00
Zvi Rackover 38ba75c238 Instsimplify: Adding shufflevector test. NFC.
Adding some test-cases demonstrating cases that need to be improved.
To be followed by patches that improve these cases.

llvm-svn: 299189
2017-03-31 07:46:02 +00:00
Craig Topper a4f660b669 [APInt] Add unittests that demonstrate how very broken APIntOps::isShiftedMask is.
Did you know that 0 is a shifted mask? But 0x0000ff00 and 0x000000ff aren't? At least we get 0xff000000 right.

I only see one usage of this function in the code base today and its in InstCombine. I think its protected against 0 being misreported as a mask. I guess we just don't have tests for the missed cases.

llvm-svn: 299187
2017-03-31 06:30:25 +00:00
Mikael Holmen 79235bd4d8 [Scalarizer] Handle scalar arguments in vector GEP
Summary:
Triggered by commit r298620: "[LV] Vectorize GEPs".

If we encounter a vector GEP with scalar arguments, we splat the scalar
into a vector of appropriate size before we scatter the argument.

Reviewers: arsenm, mehdi_amini, bkramer

Reviewed By: arsenm

Subscribers: bjope, mssimpso, wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D31416

llvm-svn: 299186
2017-03-31 06:29:49 +00:00
Andrew Wilkins dc0fe7abfc Go binding: Add GetCurrentDebugLocation to obtain debug location from builder
Summary:

Currently Go binding only has SetCurrentDebugLocation method.
I added GetCurrentDebugLocation method to IRBuilder instance.

I added this because I want to save current debug location, change debug location temporary and restore the saved one finally.
This is useful when source location jumps and goes back after while LLVM IR generation.

I also added tests for this to ir_test.go.
I confirmed that all test passed with this patch based on r298890

Patch by Ryuichi Hayashida!

Differential Revision: https://reviews.llvm.org/D31415

llvm-svn: 299185
2017-03-31 04:59:57 +00:00
Peter Collingbourne 7b30f16c9f Re-apply r299168 and r299169 now that the libdeps are fixed.
llvm-svn: 299184
2017-03-31 04:47:07 +00:00
Peter Collingbourne c66018e247 Move llvm::emitLinkerFlagsForGlobalCOFF() to Mangler.
llvm-svn: 299183
2017-03-31 04:46:50 +00:00
Peter Collingbourne 2e0ffe9858 Move llvm::canBeOmittedFromSymbolTable() to Analysis.
llvm-svn: 299182
2017-03-31 04:46:31 +00:00
Kostya Serebryany a617e16ff1 [libFuzzer] simplify the code a bit
llvm-svn: 299180
2017-03-31 04:17:45 +00:00
Kostya Serebryany 7de1f1a826 [libFuzzer] tests: don't test 64-bit comparison on 32-bit builds
llvm-svn: 299179
2017-03-31 03:51:40 +00:00
Kostya Serebryany b1f802cf80 [libFuzzer] ensure that strncmp is not inlined in a test
llvm-svn: 299177
2017-03-31 03:34:33 +00:00
Dean Michael Berris 46979b4ec2 [XRay][docs] Add XRayExample to docindex.
llvm-svn: 299172
2017-03-31 02:51:19 +00:00
Peter Collingbourne f10698b940 Revert r299168 and r299169 due to library dependency issues.
http://bb.pgr.jp/builders/i686-mingw32-RA-on-linux/builds/25073/steps/build_llvmclang/logs/stdio

llvm-svn: 299171
2017-03-31 02:44:50 +00:00
Peter Collingbourne 1f7fa72f82 Fix 32-bit build.
llvm-svn: 299169
2017-03-31 02:32:53 +00:00
Peter Collingbourne d9717aa0e4 LTO: Reduce memory consumption by creating an in-memory symbol table for InputFiles. NFCI.
Introduce symbol table data structures that can be potentially written to
disk, have the LTO library build those data structures using temporarily
constructed modules and redirect the LTO library implementation to go through
those data structures. This allows us to remove the LLVMContext and Modules
owned by InputFile.

With this change I measured a peak memory consumption decrease from 5.4GB to
2.8GB in a no-op incremental ThinLTO link of Chromium on Linux. The impact on
memory consumption is larger in COFF linkers where we are currently forced
to materialize all metadata in order to read linker options. Peak memory
consumption linking a large piece of Chromium for Windows with full LTO and
debug info decreases from >64GB (OOM) to 15GB.

Part of PR27551.

Differential Revision: https://reviews.llvm.org/D31364

llvm-svn: 299168
2017-03-31 02:28:30 +00:00
Kostya Serebryany af2dfce683 [libFuzzer] make sure we don't execute libFuzzer's mem* and str* hooks while calling mem*/str* inside libFuzzer itself
llvm-svn: 299167
2017-03-31 02:21:28 +00:00
Eric Christopher 9fd267c221 Temporarily revert "[PPC] In PPCBoolRetToInt change the bool value to i64 if the target is ppc64" as it's causing test failures, I've given Carrot a testcase offline.
This reverts commit r298955.

llvm-svn: 299153
2017-03-31 02:16:54 +00:00
Dean Michael Berris 5685468f9d [XRay][tools] Remove some assertions in llvm-xray graph
Summary:
Assertions assuming that function calls may not have zero durations do
not seem to hold in the wild. There are valid cases where the conversion
of the tsc counters end up becoming zero-length durations. These
assertions don't really hold and the algorithms don't need those to be
true for them to work.

Reviewers: dblaikie, echristo

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31519

llvm-svn: 299150
2017-03-31 01:56:45 +00:00
Eric Christopher 276989f54c Fix typo, defind -> defined.
llvm-svn: 299149
2017-03-31 01:46:30 +00:00
Kostya Serebryany 3033065df9 [libFuzzer] try to fix value-profile-strncmp on the Mac bot
llvm-svn: 299145
2017-03-31 00:52:39 +00:00
Peter Collingbourne 61781ac26e ModuleSummaryAnalysis: Use a more precise #include. NFC.
llvm-svn: 299142
2017-03-31 00:08:24 +00:00
Dan Gohman 970d02c42d [WebAssembly] Initial linking metadata support
Add support for the new relocations and linking metadata section support in
https://github.com/WebAssembly/tool-conventions/blob/master/Linking.md. In
particular, this allows LLVM to indicate which variable is the stack pointer,
so that it can be linked with other objects.

This also adds support for emitting type relocations for call_indirect
instructions.

Right now, this is mainly tested by using wabt and hexdump to examine the
output on selected testcases. We'll add more tests as the design stablizes
and more of the pieces are in place.

llvm-svn: 299141
2017-03-30 23:58:19 +00:00
Matt Arsenault 1074cb5420 AMDGPU: Rename isKernel
What we really want to do is distinguish functions that may
be called by other functions, and graphics shaders are not
called kernels.

llvm-svn: 299140
2017-03-30 23:58:04 +00:00
Dean Michael Berris 38daca6300 [XRay][docs] Examples for how to use XRay
Summary:
This document is an attempt at showing how XRay could be used to debug
latency issues with LLVM tools, and how to use the llvm-xray tool to
analyse XRay traces.

Reviewers: echristo, mehdi_amini, davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31493

llvm-svn: 299133
2017-03-30 23:46:36 +00:00
Peter Collingbourne 6b193966ac ThinLTOBitcodeWriter: Use Module::global_values(). NFCI.
llvm-svn: 299132
2017-03-30 23:43:08 +00:00
Matt Arsenault c749bdc346 LangRef: Don't refer to a 'generic' address space.
Consistently call this the default address space.

llvm-svn: 299131
2017-03-30 23:36:47 +00:00
Eric Christopher bf8f759305 Add testcase for r299124.
Patch by Tim Shen!

llvm-svn: 299125
2017-03-30 22:35:10 +00:00
Eric Christopher b9c56d1235 getPristineRegs is not accurately considering shrink wrapping puts
registers not saved in certain blocks. Use explicit getCalleeSavedInfo
and isLiveIn instead.

This fixes pr32292.

Patch by Tim Shen!

llvm-svn: 299124
2017-03-30 22:34:20 +00:00
Craig Topper 79e5bc528d [InstCombine] Fix typo last->least. NFC
llvm-svn: 299123
2017-03-30 22:28:55 +00:00
Matt Arsenault 79f837c254 AMDGPU: Add all atomicrmw fields to atomic.inc/dec
Add scope, order, isVolatile

llvm-svn: 299122
2017-03-30 22:21:40 +00:00
Craig Topper 3a40a397c3 [InstSimplify] Use m_SignBit instead of calling getSignBit and using m_Specific. NFCI
llvm-svn: 299121
2017-03-30 22:21:16 +00:00
Craig Topper 6856d341a8 [InstSimplify] Use APInt::isMaxSignedValue() instead of comparing with ~APInt::getSignBit. NFC
llvm-svn: 299120
2017-03-30 22:10:54 +00:00
Hongbin Zheng bfd7c38de7 [SimplifyIndvar] Replace the sdiv used by IV if we can prove both of its operands are non-negative
Since there is no sdiv in SCEV, an 'udiv' is a better canonical form than an 'sdiv' as the user of induction variable

Differential Revision: https://reviews.llvm.org/D31488

llvm-svn: 299118
2017-03-30 21:56:56 +00:00
Craig Topper 3001b35189 [AVX-512] Fix bad comment from r299112. NFC
llvm-svn: 299114
2017-03-30 21:05:33 +00:00
Rafael Espindola 1eee6eda0e Use os.path.realpath when tracking the cwd.
This is needed by TestCases/Posix/coverage-direct.cc

The problem is that the test does:

mkdir <dir>
cd <dir>
cd ..
rm -rf <dir>
<more commands>

the current directory currently looks like "/.../<dir>/../" which
doesn't exist when dir is deleted.

at some point we should probably switch to using the os current
directory (specially if we want to add subshell), but this is a small
incremental improvement.

llvm-svn: 299113
2017-03-30 21:05:31 +00:00
Craig Topper 533b1bde1b [AVX-512] Fix another case where fastisel was generating a GR8 to VK1 copy. This time after calls returning i1.
Fixes PR32472.

llvm-svn: 299112
2017-03-30 21:02:52 +00:00
Rafael Espindola ec1bc0f584 lit: support redirect from globs
This adds support for commands like

FileCheck < foobar*

which is used by some asan tests because the file they want to read
has a pid in the name.

llvm-svn: 299111
2017-03-30 20:48:58 +00:00
Stanislav Mekhanoshin 89653dfd2a [AMDGPU] Add GlobalOpt parameter to Always Inliner pass
If set to false it does not remove global aliases. With this parameter
set to false it should be safe to run the pass before link.

Differential Revision: https://reviews.llvm.org/D31489

llvm-svn: 299108
2017-03-30 20:16:02 +00:00
Adrian Prantl 346dcaf1fa Teach stripNonLineTableDebugInfo() to remap DILocations in !llvm.loop nodes.
llvm-svn: 299107
2017-03-30 20:10:56 +00:00
Juergen Ributzka cad1249106 [Object] Remove check for BIND_OPCODE_DONE/REBASE_OPCODE_DONE.
BIND_OPCODE_DONE/REBASE_OPCODE_DONE may appear at the end of the opcode array,
but they are not required to. The linker only adds them as padding to align the
opcodes to pointer size.

This fixes rdar://problem/31285560.

llvm-svn: 299104
2017-03-30 19:56:50 +00:00
Davide Italiano a0bd28c4d9 [AArch64ISelLowering] Remove `else` after `return` in LowerGlobalTLSAddress.
llvm-svn: 299103
2017-03-30 19:52:31 +00:00
Davide Italiano de05686ec6 [AArch64] Simplify isSingExtended()/isZeroExtended(). NFCI.
llvm-svn: 299102
2017-03-30 19:46:18 +00:00
Derek Schuff d3d84fdda1 [WebAssembly] Improve support for WebAssembly binary format
Mostly this change adds support converting to and from
YAML which will allow us to write more test cases for
the WebAssembly MC and lld ports.

Better support for objdump, readelf, and nm will be in
followup CLs.

I had to update the two wasm test binaries because they
used the old style 'name' section which is no longer
supported.

Differential Revision: https://reviews.llvm.org/D31099

Patch by Sam Clegg

llvm-svn: 299101
2017-03-30 19:44:09 +00:00
Yaron Keren 9d27c47b46 Following r297661, disable dup workaround to disable duplicate STDOUT fd closing and instead directly prevent closing of STD* file descriptors.
We do not want to close STDOUT as there may have been several uses of it
such as the case: llc %s -o=- -pass-remarks-output=- -filetype=asm
which cause multiple closes of STDOUT_FILENO and/or use-after-close of it.
Using dup() in getFD doesn't work as we end up with original STDOUT_FILENO
open anyhow.

reviewed by Rafael Espindola

Differential Revision: https://reviews.llvm.org/D31505

llvm-svn: 299098
2017-03-30 19:30:51 +00:00
Adam Nemet edaec6de73 [DAGCombiner] Initial support for the fast-math flag contract
Now alternatively to the TargetOption.AllowFPOpFusion global flag, FMUL->FADD
can also use the per operation FMF to allow fusion.

The idea here is not to port everything to the new scheme (e.g. fused
multiply-and-sub will be ported later) but that this work all the way from
clang.

The transformation is conditionalized on *both* the FADD and the FMUL having
the FMF contract flag.

Differential Revision: https://reviews.llvm.org/D31169

llvm-svn: 299096
2017-03-30 18:53:04 +00:00
Ahmed Bougacha 6dd6082472 [CodeGen] Pass SDAG an ORE, and replace FastISel stats with remarks.
In the long-term, we want to replace statistics with something
finer-grained that lets us gather per-function data.
Remarks are that replacement.

Create an ORE instance in SelectionDAGISel, and pass it to
SelectionDAG.

SelectionDAG was used so that we can emit remarks from all
SelectionDAG-related code, including TargetLowering and DAGCombiner.
This isn't used in the current patch but Adam tells me he's interested
for the fp-contract combines.

Use the ORE instance to emit FastISel failures as remarks (instead of
the mix of dbgs() dumps and statistics that we currently have).

Eventually, we want to have an API that tells us whether remarks are
enabled (http://llvm.org/PR32352) so that we don't emit expensive
remarks (in this case, dumping IR) when it's not needed.  For now, use
'isEnabled' as a crude replacement.

This does mean that the replacement for '-fast-isel-verbose' is now
'-pass-remarks-missed=isel'.  Additionally, clang users also need to
enable remark diagnostics, using '-Rpass-missed=isel'.

This also removes '-fast-isel-verbose2': there are no static statistics
that we want to only enable in asserts builds, so we can always use
the remarks regardless of the build type.

Differential Revision: https://reviews.llvm.org/D31405

llvm-svn: 299093
2017-03-30 17:49:58 +00:00
Sanjay Patel 6d5ba061f8 [DAGCombiner] add helper function for visitORLike; NFCI
This combines all of the equivalent clean-ups for foldAndOfSetCCs:
https://reviews.llvm.org/rL298938
https://reviews.llvm.org/rL298940
https://reviews.llvm.org/rL298944
https://reviews.llvm.org/rL298949
https://reviews.llvm.org/rL298950
https://reviews.llvm.org/rL299002
https://reviews.llvm.org/rL299013

The sins of code duplication are on full display here:
each function is missing a fold that wasn't copied over from its logical sibling. 

llvm-svn: 299091
2017-03-30 17:32:42 +00:00
Chris Bieneman 460b54ef6d [yaml2obj] Enable and fix tests
Summary:
These tests were not being run because the yaml extension
wasn't be picked up by lit.

This change also fixes the tests which themselves were broken.

Patch By: Sam Clegg

Reviewers: beanz

Reviewed By: beanz

Subscribers: fhahn

Differential Revision: https://reviews.llvm.org/D31436

llvm-svn: 299088
2017-03-30 16:35:02 +00:00
Andrew Ng 84b07dbd75 Test commit.
Correct assertion messages in MachineOperand for some of the setters.

llvm-svn: 299075
2017-03-30 13:17:25 +00:00
Simon Pilgrim 68168d17b9 Spelling mistakes in comments. NFCI.
Based on corrections mentioned in patch for clang for PR27635

llvm-svn: 299072
2017-03-30 12:59:53 +00:00
Simon Pilgrim ef4509b36e Spelling mistakes in comments. NFCI.
llvm-svn: 299069
2017-03-30 12:30:15 +00:00
Kristof Beyls 7a76b315d6 Revert "Make naming in Host.h in line with coding standards."
This reverts r299062, which caused build failures on Windows.
It also reverts the attempts to fix the windows builds in r299064 and r299065.
The introduction of namespace llvm::sys::detail makes MSVC, and seemingly also
mingw, complain about ambiguity with the existing namespace llvm::detail.
E.g.:
C:\b\slave\sanitizer-windows\llvm\include\llvm/Support/MathExtras.h(184): error C2872: 'detail': ambiguous symbol
C:\b\slave\sanitizer-windows\llvm\include\llvm/Support/PointerLikeTypeTraits.h(31): note: could be 'llvm::detail'
C:\b\slave\sanitizer-windows\llvm\include\llvm/Support/Host.h(80): note: or       'llvm::sys::detail'

In r299064 and r299065 I tried to fix these ambiguities, based on the errors
reported in the log files. It seems however that the build stops early when
this kind of error is encountered, and many build-then-fix-iterations on
Windows may be needed to fix this. Therefore reverting r299062 for now to
get the build working again on Windows.

llvm-svn: 299066
2017-03-30 11:06:25 +00:00
Kristof Beyls 1ba115a113 Another attempt fix the Windows builds
By changing more detail::... to llvm::detail::...

llvm-svn: 299065
2017-03-30 10:47:41 +00:00
Kristof Beyls 2157e9a22a Attempt to fix the Windows builds by using llvm::detail::... instead of detail::...
llvm-svn: 299064
2017-03-30 10:14:40 +00:00
Daniel Sanders c270c500b7 [globalisel][tablegen] Change Expected<bool> to Error and rename functions.
Functions that still return Expected<X> are now called createAndImport*()

Changing the return type was requested in the review comments for r299001

llvm-svn: 299063
2017-03-30 09:36:33 +00:00
Kristof Beyls ca878c943b Make naming in Host.h in line with coding standards.
Based on post-commit review comments by Chandler Carruth on
https://reviews.llvm.org/D31236. Thanks!

llvm-svn: 299062
2017-03-30 09:31:59 +00:00
Kristof Beyls 9e46396ecc Refactor getHostCPUName to allow testing on non-native hardware.
This refactors getHostCPUName so that for the architectures that get the
host cpu info on linux from /proc/cpuinfo, the /proc/cpuinfo parsing
logic is present in the build, even if it wasn't built on a linux system
for that architecture.

Since the code is present in the build, we can then test that code also
on other systems, i.e. we don't need to have buildbots setup for all
architectures on linux to be able to test this. Instead, developers will
test this as part of the regression test run.

As an example, a few unit tests are added to test getHostCPUName for ARM
running linux. A unit test is preferred over a lit-based test, since the
expectation is that in the future, the functionality here will grow over
what can be tested with "llc -mcpu=native".

This is a preparation step to enable implementing the range of
improvements discussed on PR30516, such as adding AArch64 support,
support for big.LITTLE systems, reducing code duplication.

Differential Revision: https://reviews.llvm.org/D31236

llvm-svn: 299060
2017-03-30 07:24:49 +00:00
Craig Topper eafcbe2d10 [APInt] Remove references to integerPartWidth outside of APFloat implentation.
Turns out integerPartWidth only explicitly defines the width of the tc functions in the APInt class. Functions that aren't used by APInt implementation itself. Many places in the code base already assume APInt is made up of 64-bit pieces. Explicitly assuming 64-bit here doesn't make that situation much worse. A full audit would need to be done if it ever changes.

llvm-svn: 299059
2017-03-30 05:49:03 +00:00
Kostya Serebryany 01ddc1cfd5 [libFuzzer] remove a stale flag from tests, run value-profile-strncmp.test longer (hopefully, will fix the OSX bot)
llvm-svn: 299051
2017-03-30 04:22:20 +00:00
Zvi Rackover 7569436f81 [DAGCombine] A shuffle of a splat is always the splat itself
Summary:
Add a simplification:
shuffle (splat-shuffle), undef, M --> splat-shuffle

Fixes pr32449

Patch by Sanjay Patel

Reviewers: eli.friedman, RKSimon, spatel

Reviewed By: spatel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31426

llvm-svn: 299047
2017-03-30 01:42:57 +00:00
Kostya Serebryany d7d1d517ee [libFuzzer] best effort support for -fsanitize-coverage=trace-pc instrumentation. It is less efficient and precise than -fsanitize-coverage=trace-pc-guard, but still works
llvm-svn: 299046
2017-03-30 01:27:20 +00:00
Eric Christopher 9ea300f08d If the DIUnit has flags passed on it then have DW_AT_producer be a combination of DICompileUnit::Producer and Flags.
The darwin behavior is unchanged and will continue to use DW_AT_APPLE_flags.

Patch by Zhizhou Yang

llvm-svn: 299038
2017-03-29 23:34:27 +00:00
Reid Kleckner acd9a6f09d [codeview] Fix buggy BeginIndexMapSize assertion
This assert is just trying to test that processing each record adds
exactly one entry to the index map. The assert logic was wrong when the
first record in the type stream was a field list.

I've simplified the code by moving the LF_FIELDLIST-specific logic into
the callback for that record type.

llvm-svn: 299035
2017-03-29 22:51:22 +00:00
Sanjay Patel b8a728f993 [CodeGen] clean up and add tests for scalar and-of-setcc; NFC
https://bugs.llvm.org/show_bug.cgi?id=32401

llvm-svn: 299034
2017-03-29 21:58:52 +00:00
Davide Italiano e13920f407 [X86IselLowering] Remove extraneous semicolon. NFCI.
Unbreaks the build with GCC -Werror.

llvm-svn: 299030
2017-03-29 21:34:58 +00:00
Davide Italiano cdcdc97879 [DAGCombiner] Remove else after return. NFCI.
llvm-svn: 299022
2017-03-29 19:39:46 +00:00
Adrian McCarthy 4d93d66ddd Re-land: "Make NativeExeSymbol a concrete subclass of NativeRawSymbol [PDB]"
This should work on all platforms now that r299006 has landed.  Tested locally
on Windows and Linux.

This moves exe symbol-specific method implementations out of NativeRawSymbol
into a concrete subclass. Also adds implementations for hasCTypes and
hasPrivateSymbols and a simple test to ensure the native reader can access the
summary information for the executable from the PDB.

Original Differential Revision: https://reviews.llvm.org/D31059

llvm-svn: 299019
2017-03-29 19:27:08 +00:00
Rafael Espindola b26bc7fddc Add ifunc support to ModuleSymbolTable.
Do that by creating a global_values, which is similar to
global_objects, but also iterates over aliases and ifuncs.

llvm-svn: 299018
2017-03-29 19:26:26 +00:00
Matthew Simpson c8f0aeccda [InstCombine] Correct the check for vector GEPs
Some of the GEP combines (e.g., descaling) can't handle vector GEPs. We have an
existing check that attempts to bail out if given a vector GEP. However, the
check only tests the GEP's pointer operand. A GEP results in a vector of
pointers if at least one of its operands is vector-typed (e.g., its pointer
operand could be a scalar, but its index could be a vector). We should just
check the type of the GEP itself. This should fix PR32414.

Reference: https://bugs.llvm.org/show_bug.cgi?id=32414
Differential Revision: https://reviews.llvm.org/D31470

llvm-svn: 299017
2017-03-29 18:23:08 +00:00
Sanjay Patel ff211bb5a6 [DAGCombiner] unify type checks and add asserts; NFCI
We had a mix of type checks and usage that wasn't very clear.

llvm-svn: 299013
2017-03-29 18:08:01 +00:00
Adrian McCarthy 5fcfc2c025 llvm-pdbdump: If we don't change the color, don't reset the color.
The -output-color option was successful at suppressing color changes, but
was still allowing color resets.

Differential Revision: https://reviews.llvm.org/D31468

llvm-svn: 299006
2017-03-29 17:11:27 +00:00
Simon Pilgrim 8362c95257 [X86] Tidied up comment - we don't custom lower add/sub i64 on i686 anymore. NFCI.
llvm-svn: 299004
2017-03-29 15:41:58 +00:00
Sanjay Patel 087e922328 [DAGCombiner] reduce code duplication by rearranging checks; NFCI
llvm-svn: 299002
2017-03-29 15:37:33 +00:00
Daniel Sanders ffc7d58a0d [tablegen][globalisel] Convert the SelectionDAG importer to a tree walking approach. NFC
Summary:
But don't actually inspect the tree any deeper than we already do. This
change is NFC but the next one will enable full traversal of the
source/destination patterns.

Depends on D30535

Reviewers: t.p.northover, qcolombet, aditya_nandakumar, rovka, ab

Subscribers: igorb, dberris, llvm-commits, kristof.beyls

Differential Revision: https://reviews.llvm.org/D30536

llvm-svn: 299001
2017-03-29 15:37:18 +00:00
Simon Pilgrim fc97d5049f Spelling mistakes in comments. NFCI.
llvm-svn: 299000
2017-03-29 15:27:24 +00:00
Sven van Haastregt 04bfa87f12 [MachineVerifier] Drop a spurious const
As of r298987 the argument is a value that we std::move, so it
shouldn't be const anymore.

llvm-svn: 298999
2017-03-29 15:25:06 +00:00
Filipe Cabecinhas 8b94273fe6 Cleanup in preparation for D30703. NFCI
Make the enumerators follow the coding convention and start with OW_...

llvm-svn: 298996
2017-03-29 14:42:27 +00:00
Rafael Espindola bed91eb46d Fix GettingStarted.rst statement.
Patch by Wei-Ren Chen!

llvm-svn: 298995
2017-03-29 14:27:38 +00:00
Rafael Espindola b5c07ea03a Remove unused argument.
llvm-svn: 298994
2017-03-29 14:20:38 +00:00
Simon Pilgrim 2845189bd1 [X86][AVX2] Prevent unary interleaving patterns from calling lowerVectorShuffleAsSplitOrBlend (PR32453)
llvm-svn: 298993
2017-03-29 13:00:00 +00:00
Simon Pilgrim b670ba4e87 [AMDGPU] Tidy up computeKnownBitsForTargetNode/ComputeNumSignBitsForTargetNode arguments. NFCI.
Based on comment in D31249.

llvm-svn: 298991
2017-03-29 12:09:25 +00:00
Simon Pilgrim be22cff6fd [X86][MMX] Added generic sitofp test to compare against existing cvtdq2ps test.
llvm-svn: 298989
2017-03-29 10:47:18 +00:00
Simon Pilgrim ebd433d9fc [X86] Removed old comment. NFCI.
No longer makes sense as the previous opcode mnemonic it was referring to is long gone.

llvm-svn: 298988
2017-03-29 10:44:51 +00:00
Sven van Haastregt 039a6d9f9f [MachineVerifier] Avoid reference to nullptr
Instantiation of the MachineVerifierPass through
PassInfo::getNormalCtor would yield a segfault since the default
constructor of the MachineVerifierPass takes a reference to nullptr.

Patch by Simone Pellegrini.

Differential Revision: https://reviews.llvm.org/D31387

llvm-svn: 298987
2017-03-29 09:08:25 +00:00
Eric Christopher 5829741c46 Move the x86 cpu feature rtm from Haswell to Skylake matching clang commit r298956.
llvm-svn: 298986
2017-03-29 07:40:44 +00:00
Craig Topper d9f51350b8 [AVX-512] Remove explicit KMOVWrk from isel patterns. COPY_TO_REGCLASS to GR32 is enough.
llvm-svn: 298985
2017-03-29 07:31:56 +00:00
Craig Topper d284606327 [AVX-512] Remove explicit KMOVWrk/KMOVWKr instructions from patterns where we can just use COPY_TO_REGCLASS instead.
This will result in a KMOVW or KMOVD being emitted during register allocation. And in at least some cases this might allow the register coalescer to remove the copy all together.

llvm-svn: 298984
2017-03-29 06:55:28 +00:00
Dean Michael Berris 60c2487874 [XRay] Update FDR log reader to be aware of buffer sizes per thread.
Summary:
It is problematic for this reader that it expects to read data from
several threads, but the header or message format does not define
framing. Since the buffers are reused, we can't rely on skipping
zeroed out data as a synchronization method either.

There is an argument that this is not version compatible with the format
the reader expected previously. I argue that since the writer wrote garbage
past the end of buffer record, there is no currently working reader to
compromise.

The corresponding writer change is posted to D31384.

Reviewers: dberris, pelikan

Reviewed By: dberris

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31385

llvm-svn: 298983
2017-03-29 06:10:12 +00:00
Dean Michael Berris f454301b56 [XRay][tools] Handle "no subcommand" case for llvm-xray
Summary:
Currently the llvm-xray commandline tool fails to handle the case for
when no subcommand is provided in a graceful manner. This fixes that to
print the help message explaining the subcommands and the available
options.

Reviewers: pcc, pelikan

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31409

llvm-svn: 298975
2017-03-29 04:55:45 +00:00
Adam Nemet 92a5cf4366 [SDAG] Remove -enable-fmf-dag
This is no longer needed as spotted by Sanjay in
https://reviews.llvm.org/D31165.

llvm-svn: 298963
2017-03-28 23:46:14 +00:00
Adam Nemet cb69117ee7 [SDAG] Handle VectorReduction in SDNodeFlags::intersectWith
Spotted by Sanjay in https://reviews.llvm.org/D31165

llvm-svn: 298962
2017-03-28 23:46:12 +00:00
Adam Nemet 6820f391eb [SDAG] Add AllowContract to SNodeFlags
Properly propagate the FMF from the LLVM IR to this flag.

This is toward moving fp-contraction=fast from an LLVM TargetOption to a
FastMathFlag in order to fix PR25721.

Differential Revision: https://reviews.llvm.org/D31165

llvm-svn: 298961
2017-03-28 23:46:08 +00:00
Peter Collingbourne 192d8520de More accurate header inclusions. NFC.
llvm-svn: 298960
2017-03-28 23:35:34 +00:00
Craig Topper a795be60c1 [AVX-512] Add test case that was supposed to go with r298957.
llvm-svn: 298959
2017-03-28 23:29:35 +00:00
Craig Topper 331297c62e [AVX-512] Punt on fast-isel of truncates to i1 when AVX512 is enabled.
We should be masking the value and emitting a register copy like we do in non-fast isel. Instead we were just updating the value map and emitting nothing.

After r298928 we started seeing cases where we would create a copy from GR8 to GR32 because the source register in a VK1 to GR32 copy was replaced by the GR8 going into a truncate.

This fixes PR32451.

llvm-svn: 298957
2017-03-28 23:20:37 +00:00
Guozhi Wei f8d40181c9 [PPC] In PPCBoolRetToInt change the bool value to i64 if the target is ppc64
In PPCBoolRetToInt bool value is changed to i32 type. On ppc64 it may introduce an extra zero extension for the return value. This patch changes the integer type to i64 to avoid the zero extension on ppc64.

This patch fixed PR32442.

Differential Revision: https://reviews.llvm.org/D31407

llvm-svn: 298955
2017-03-28 22:55:01 +00:00
Sanjay Patel a41a5c29f0 [DAGCombiner] reduce code duplication with local variables; NFCI
llvm-svn: 298954
2017-03-28 22:45:53 +00:00
Eric Christopher 69b191c628 Add a similar test for tailcall optimization as in r270287 for aarch64.
llvm-svn: 298952
2017-03-28 22:37:43 +00:00
Peter Collingbourne 0d56b959ad LTO: Replace InputFile::Symbol::getFlags() with predicate accessors. NFC.
This makes the predicates independent of the flag representation
and makes the code a little easier to read.

llvm-svn: 298951
2017-03-28 22:31:35 +00:00
Sanjay Patel 9747d8070b [DAG] fix formatting; NFC
llvm-svn: 298950
2017-03-28 22:25:25 +00:00
Sanjay Patel d832eddde5 [DAGCombiner] remove redundant conditions and duplicated code; NFCI
llvm-svn: 298949
2017-03-28 22:22:50 +00:00
Stanislav Mekhanoshin baf31ac7c8 [AMDGPU] Boost unroll threshold for loops reading local memory
This is less important than increase threshold for private memory,
but still brings performance improvements in a wide range of tests.
Unrolling more for local memory serves three purposes: it allows
to combine ds operations if offset becomes static, saves registers
used for offsets in case of static offsets, and allows better lds
latency hiding.

Differential Revision: https://reviews.llvm.org/D31412

llvm-svn: 298948
2017-03-28 22:13:51 +00:00
Stanislav Mekhanoshin b933c3f554 [AMDGPU] Fix recorded region boundaries in max-occupancy scheduler
This is incorrect to record region boundaries before scheduling,
it may change after scheduling. As a result second pass may see less
instructions to schedule than it should.

Differential Revision: https://reviews.llvm.org/D31434

llvm-svn: 298945
2017-03-28 21:48:54 +00:00
Sanjay Patel d2a26db991 [DAGCombiner] rename variables in foldAndOfSetCCs for easier reading; NFCI
llvm-svn: 298944
2017-03-28 21:40:41 +00:00
Simon Pilgrim c7c5aa47cf [X86][MMX] Match MMX fp_to_sint conversions from XMM registers
We currently perform the various fp_to_sint XMM conversion and then transfer to the MMX register (on 32-bit via the stack).

This patch improves support for MOVDQ2Q XMM to MMX transfers and adds the XMM->MMX fp_to_sint direct conversion patterns. The SSE2 specifications are the same as for XMM->XMM and XMM->MMX rounding/exceptions/etc.

Differential Revision: https://reviews.llvm.org/D30868

llvm-svn: 298943
2017-03-28 21:32:11 +00:00
Matt Arsenault 323b021b5e Fix crashing on TargetCustom PseudoSourceValues
Default to something more reasonable if printCustom isn't implemented.

llvm-svn: 298941
2017-03-28 20:33:12 +00:00
Sanjay Patel 3230e4be11 [DAGCombiner] clean up foldAndOfSetCCs; NFCI
1. Fix bogus comment.
2. Early exit to reduce indent.
3. Change node pointer param to what it really is: an SDLoc.

llvm-svn: 298940
2017-03-28 20:28:16 +00:00
Adam Nemet cd847a8f30 [IR] Add AllowContract to FastMathFlags
-ffp-contract=fast does not currently work with LTO because it's passed as a
TargetOption to the backend rather than in the IR. This adds it to
FastMathFlags.

This is toward fixing PR25721

Differential Revision: https://reviews.llvm.org/D31164

llvm-svn: 298939
2017-03-28 20:11:52 +00:00
Sanjay Patel 16af53a395 [DAGCombiner] add helper function for and-of-setcc folds; NFC
This is just a cut and paste followed by clang-format. Clean up to follow.

llvm-svn: 298938
2017-03-28 19:58:46 +00:00
Mehdi Amini b5a46c1f45 Add support for -fno-builtin to LTO and ThinLTO to libLTO
Reviewers: tejohnson, pcc

Subscribers: Prazek, dexonsmith, llvm-commits

Differential Revision: https://reviews.llvm.org/D30791

llvm-svn: 298936
2017-03-28 18:55:44 +00:00
Stanislav Mekhanoshin 9053f22eeb [AMDGPU] Split -amdgpu-early-inline-all option
Previously it was covered by the internalization. It turns out we cannot
run internalizer in FE, it break separate compilation tests. Thus early
inliner gets its own option.

Differential Revision: https://reviews.llvm.org/D31429

llvm-svn: 298935
2017-03-28 18:23:24 +00:00
Sanjay Patel f01a1dad7f [x86] use VPMOVMSK to replace memcmp libcalls for 32-byte equality
Follow-up to:
https://reviews.llvm.org/rL298775

llvm-svn: 298933
2017-03-28 17:23:49 +00:00
Weiming Zhao da4d12a8e5 Revert "Dont emit Mapping symbols for sections that contain only data."
It breaks some lld tests.

This reverts commit 3a50eea6d9732ab40e9a7aebe6be777b53a8b35c.

llvm-svn: 298932
2017-03-28 17:15:11 +00:00
Nirav Dave 472b5efc8b [SDAG] Deal with deleted node in PromoteIntShiftOp
Deal with case that initial node is deleted during dag-combine leading
to an assertional failure in promoteIntShiftOp.

Fixes PR32420.

Reviewers: spatel, RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31403

llvm-svn: 298931
2017-03-28 17:09:49 +00:00
Zvi Rackover a4c354951b Add reproducer test for pr32449. NFC.
llvm-svn: 298930
2017-03-28 16:45:23 +00:00
Simon Pilgrim 3e2aa7f40e [X86][AVX2] Add support for combining v16i16 shuffles to VPBLENDW
llvm-svn: 298929
2017-03-28 16:40:38 +00:00
Craig Topper 058f2f6d72 [AVX-512] Fix accidental uses of AH/BH/CH/DH after copies to/from mask registers
We've had several bugs(PR32256, PR32241) recently that resulted from usages of AH/BH/CH/DH either before or after a copy to/from a mask register.

This ultimately occurs because we create COPY_TO_REGCLASS with VK1 and GR8. Then in CopyToFromAsymmetricReg in X86InstrInfo we find a 32-bit super register for the GR8 to emit the KMOV with. But as these tests are demonstrating, its possible for the GR8 register to be a high register and we end up doing an accidental extra or insert from bits 15:8.

I think the best way forward is to stop making copies directly between mask registers and GR8/GR16. Instead I think we should restrict to only copies between mask registers and GR32/GR64 and use EXTRACT_SUBREG/INSERT_SUBREG to handle the conversion from GR32 to GR16/8 or vice versa.

Unfortunately, this complicates fastisel a bit more now to create the subreg extracts where we used to create GR8 copies. We can probably make a helper function to bring down the repitition.

This does result in KMOVD being used for copies when BWI is available because we don't know the original mask register size. This caused a lot of deltas on tests because we have to split the checks for KMOVD vs KMOVW based on BWI.

Differential Revision: https://reviews.llvm.org/D30968

llvm-svn: 298928
2017-03-28 16:35:29 +00:00
Sanjay Patel 5d39a98612 [x86] add separate check prefix for SSE; NFC
We want to check each test on each target, so we need another prefix
when SSE and AVX diverge (as they will if we handle 32-byte and higher). 

llvm-svn: 298926
2017-03-28 15:55:50 +00:00
Simon Pilgrim 6b30172372 [X86][SSE] Refactored shuffle BLEND combining to make future 16i16 support easier. NFCI.
Call the matchVectorShuffleAsBlend test as early as possible.

llvm-svn: 298925
2017-03-28 15:50:23 +00:00
Nirav Dave 5b414ebe63 [SDAG] Avoid deleted SDNodes PromoteIntBinOp
Reorder work in PromoteIntBinOp to prevent stale (deleted) nodes from
being used.

Fixes PR32340 and PR32345.

Reviewers: hfinkel, dbabokin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31148

llvm-svn: 298923
2017-03-28 15:41:12 +00:00
Nirav Dave 9b5563c52c [SDAG] Fix Stale SDNode usage in visitAND
Reorder CombineTo Calls to prevent potential use of deleted node.
Fixes PR32372.

Reviewers: jnspaulsson, RKSimon, uweigand, jonpa

Reviewed By: jonpa

Subscribers: jonpa, llvm-commits

Differential Revision: https://reviews.llvm.org/D31346

llvm-svn: 298920
2017-03-28 14:11:20 +00:00
Sanjay Patel e4f11334fa [x86] add AVX2 run to show 256-bit opportunity; NFC
llvm-svn: 298918
2017-03-28 13:46:50 +00:00
Simon Pilgrim aa675ca77d Fix signed/unsigned comparison warning
llvm-svn: 298917
2017-03-28 13:40:09 +00:00
Nirav Dave 423b24ae76 [SDAG] Minor cleanup of variable usage. NFC.
llvm-svn: 298916
2017-03-28 13:39:50 +00:00
Simon Pilgrim d48f47e25c [X86][SSE] Begin merging vector shuffle to BLEND for lowering and combining.
Split off matchVectorShuffleAsBlend from lowerVectorShuffleAsBlend for reuse in combining.

llvm-svn: 298914
2017-03-28 13:05:48 +00:00
Simon Pilgrim 61437ebaf4 Wdocumentation fix
llvm-svn: 298911
2017-03-28 12:29:09 +00:00
Simon Pilgrim 6afe0e2833 [X86][SSE] Set second operand to undef instead of first operand in unary shuffle combines.
Copy isn't necessary after the matchVectorShuffleWithUNPCK refactor and undef value will make some future undef/zero handling easier.

llvm-svn: 298910
2017-03-28 12:16:42 +00:00
Simon Pilgrim defee5683c Strip trailing whitespace
llvm-svn: 298909
2017-03-28 11:15:17 +00:00
Sanne Wouda d4658ee634 [AArch64] [Assembler] option to disable negative immediate conversions
Summary:
Similar to the ARM target in https://reviews.llvm.org/rL298380, this
patch adds identical infrastructure for disabling negative immediate
conversions, and converts the existing aliases to the new infrastucture.

Reviewers: rengolin, javed.absar, olista01, SjoerdMeijer, samparker

Reviewed By: samparker

Subscribers: samparker, aemerson, llvm-commits

Differential Revision: https://reviews.llvm.org/D31243

llvm-svn: 298908
2017-03-28 10:02:56 +00:00
Igor Breger f580fce2c3 [GlobalISel][X86] support G_FRAME_INDEX instruction selection.
Summary:
    G_LOAD/G_STORE, add alternative RegisterBank mapping.
    For G_LOAD, Fast and Greedy mode choose the same RegisterBank mapping (GprRegBank ) for the G_GLOAD + G_FADD , can't get rid of cross register bank copy GprRegBank->VecRegBank.

    Reviewers: zvi, rovka, qcolombet, ab

    Reviewed By: zvi

    Subscribers: llvm-commits, dberris, kristof.beyls, eladcohen, guyblank

    Differential Revision: https://reviews.llvm.org/D30979

llvm-svn: 298907
2017-03-28 09:35:06 +00:00
Anna Thomas 923e574bff [InstCombine] For select rule, use positive check of constant int for select operand. NFCI
llvm-svn: 298906
2017-03-28 09:32:24 +00:00
Anna Thomas ba04f4e925 rename instcombine test file. NFC
llvm-svn: 298904
2017-03-28 08:34:07 +00:00
Valery Pykhtin 9f3eca96eb [AMDGPU] Update SI scheduler colorHighLatenciesGroups
Depends on rL298896: MachineScheduler/ScheduleDAG: Add support for GetSubGraph

Patch by Axel Davy (axel.davy@normalesup.org)

Differential revision: https://reviews.llvm.org/D30152

llvm-svn: 298902
2017-03-28 07:19:48 +00:00
Weiming Zhao 320848458b Dont emit Mapping symbols for sections that contain only data.
Summary:
Dont emit mapping symbols for sections that contain only data.

Patched by Shankar Easwaran <shankare@codeaurora.org>

Reviewers: rengolin, peter.smith, weimingz, kparzysz, t.p.northover

Reviewed By: t.p.northover

Subscribers: t.p.northover, llvm-commits

Differential Revision: https://reviews.llvm.org/D30724

llvm-svn: 298901
2017-03-28 05:40:36 +00:00
Craig Topper 6a8518086a [APInt] Reformat tc functions to put opening curly braces on the end of the previous line. NFC
llvm-svn: 298900
2017-03-28 05:32:55 +00:00
Craig Topper 76f4246fac [APInt] Remove an anonymous namespace around static functions. NFC
llvm-svn: 298899
2017-03-28 05:32:53 +00:00
Craig Topper b003816be7 [APInt] Combine variable declaration and initialization where possible in the tc functions. NFCI
llvm-svn: 298898
2017-03-28 05:32:52 +00:00
Craig Topper 592b134aa1 [APInt] Use 'unsigned' instead of 'unsigned int' in the interface to the APInt tc functions. This is more consistent with the rest of the codebase. NFC
llvm-svn: 298897
2017-03-28 05:32:48 +00:00
Valery Pykhtin 910da13a07 MachineScheduler/ScheduleDAG: Add support for GetSubGraph
Patch by Axel Davy (axel.davy@normalesup.org)

Differential revision: https://reviews.llvm.org/D30626

llvm-svn: 298896
2017-03-28 05:12:31 +00:00
Junmo Park c7479ba86a CodeGen : Check LLVM_ENABLE_DUMP definition for dumpMachineInstrRangeWithSlotIndex.
Summary:
Add missing check routine for dumpMachineInstrRangeWithSlotIndex including LLVM_DUMP_METHOD.

Reviewers: bkramer

Differential revision: https://reviews.llvm.org/D30367

llvm-svn: 298895
2017-03-28 04:14:25 +00:00
Craig Topper f496f9a273 [APInt] Move the single word cases of the bitwise operators inline.
llvm-svn: 298894
2017-03-28 04:00:47 +00:00
Alex Shlyapnikov bbd5cc63d7 Revert "[asan] Delay creation of asan ctor."
Speculative revert. Some libfuzzer tests are affected.

This reverts commit r298731.

llvm-svn: 298890
2017-03-27 23:11:50 +00:00
Alex Shlyapnikov 09171aa31f Revert "[asan] Put ctor/dtor in comdat."
Speculative revert, some libfuzzer tests are affected.

This reverts commit r298756.

llvm-svn: 298889
2017-03-27 23:11:47 +00:00
Eric Christopher f48ef3355f Remove an oddly unnecessary temporary.
llvm-svn: 298888
2017-03-27 22:40:51 +00:00
Renato Golin be2f7d9d61 [ARM] Mark falky test unsupported until we find the cause
llvm-svn: 298887
2017-03-27 22:38:43 +00:00
Juergen Ributzka dea6379421 [libfuzzer] Remove XFAIL for OutOfMemory test.
This test is now passing on Darwin.

See rdar://problem/31282257.

llvm-svn: 298886
2017-03-27 22:33:05 +00:00
Javed Absar 3d59437093 Improve machine schedulers for in-order processors
This patch enables schedulers to specify instructions that 
cannot be issued with any other instructions.
It also fixes BeginGroup/EndGroup.

Reviewed by: Andrew Trick
Differential Revision: https://reviews.llvm.org/D30744

llvm-svn: 298885
2017-03-27 20:46:37 +00:00
Kevin Enderby 6c1d2b4cb2 Add the error handling for Mach-O dyld compact lazy bind, weak bind and
rebase entry errors and test cases for each of the error checks.

Also verified with Nick Kledzik that a BIND_OPCODE_SET_ADDEND_SLEB
opcode is legal in a lazy bind table, so code that had that as an error
check was removed.

With MachORebaseEntry and MachOBindEntry classes now returning
an llvm::Error in all cases for malformed input the variables Malformed
and logic to set use them is no longer needed and has been removed
from those classes.

Also in a few places, removed the redundant Done assignment to true
when also calling moveToEnd() as it does that assignment.

This only leaves the dyld compact export entries left to have
error handling yet to be added for the dyld compact info.

llvm-svn: 298883
2017-03-27 20:09:23 +00:00
Matthew Simpson b8ff4a4a70 [LV] Transform truncations of non-primary induction variables
The vectorizer tries to replace truncations of induction variables with new
induction variables having the smaller type. After r295063, this optimization
was applied to all integer induction variables, including non-primary ones.
When optimizing the truncation of a non-primary induction variable, we still
need to transform the new induction so that it has the correct start value.
This should fix PR32419.

Reference: https://bugs.llvm.org/show_bug.cgi?id=32419
llvm-svn: 298882
2017-03-27 20:07:38 +00:00
Craig Topper 6ebeb7041e [APInt] Move operator=(uint64_t) inline as its pretty simple and is often used with small constants that the compiler can optimize.
While there recognize that we only need to clearUnusedBits on the single word case.

llvm-svn: 298881
2017-03-27 20:07:31 +00:00