Commit Graph

146993 Commits

Author SHA1 Message Date
Simon Pilgrim e56a2d7b4c [X86][MMX] Added support for subvector extraction to MMX register
llvm-svn: 299335
2017-04-02 15:52:28 +00:00
NAKAMURA Takumi 2f181584cb APInt.h: Prune \param(s) in \returns. [-Wdocumentation]
llvm-svn: 299334
2017-04-02 15:05:18 +00:00
Simon Pilgrim 7fc08a8117 Regenerate test with codegen. NFCI.
llvm-svn: 299333
2017-04-02 14:21:14 +00:00
Simon Pilgrim 841ecebd7c Regenerate test with codegen. NFCI.
llvm-svn: 299332
2017-04-02 13:59:37 +00:00
Simon Pilgrim 637182f262 Regenerate test. NFCI.
llvm-svn: 299331
2017-04-02 13:50:44 +00:00
Daniel Berlin 07daac8a36 NewGVN: Handle coercion of constant stores, loads, memory insts.
Summary:
Depends on D30928.

This adds support for coercion of stores and memory instructions that do not require insertion to process.
Another few tests down.
I added the relevant tests from rle.ll

Reviewers: davide

Subscribers: llvm-commits, Prazek

Differential Revision: https://reviews.llvm.org/D30929

llvm-svn: 299330
2017-04-02 13:23:44 +00:00
Nikolai Bozhenov fca527af5c [BypassSlowDivision] Do not bypass division of hash-like values
Disable bypassing if one of the operands looks like a hash value. Slow
division often occurs in hashtable implementations and fast division is
never taken there because a hash value is extremely unlikely to have
enough upper bits set to zero.

A value is considered to be hash-like if it is produced by

1) XOR operation
2) Multiplication by a constant wider than the shorter type
3) PHI node with all incoming values being hash-like

Differential Revision: https://reviews.llvm.org/D28200

llvm-svn: 299329
2017-04-02 13:14:30 +00:00
Simon Pilgrim dddce31eb4 [X86][MMX] Add generic fptosi 4f32-4i32 test
llvm-svn: 299328
2017-04-02 13:10:20 +00:00
Zvi Rackover e479980686 Add another interesting shufflevector test case for InstSimplify. NFC.
Test case shows opportunity to constant fold a shuffle with one variable
input vector operand.

llvm-svn: 299327
2017-04-02 10:42:21 +00:00
Craig Topper 15e484aa2b [X86] Use tcAdd/tcSubtract to implement the slow case of operator+=/operator-=.
llvm-svn: 299326
2017-04-02 06:59:43 +00:00
Craig Topper b8f1068765 [APInt] Combine declaration and initialization. NFC
llvm-svn: 299325
2017-04-02 06:59:41 +00:00
Craig Topper b7d8faa231 [APInt] Simplify some code by using operator+=(uint64_t) instead of doing a more complex assignment into a temporary APInt just to use the APInt operator+=.
llvm-svn: 299324
2017-04-02 06:59:38 +00:00
Craig Topper d7ed50de26 [APInt] Fix typo in comment. NFC
llvm-svn: 299323
2017-04-02 06:59:36 +00:00
Daniel Berlin 8a00270838 MemorySSA: Add support for caching clobbering access in stores
Summary:
This enables us to cache the clobbering access for stores, despite the
fact that we can't rewrite the use-def chains themselves.

Early testing shows that, after this change, for larger testcases, it will be a significant net positive (memory and time) to remove the walker caching.

Reviewers: george.burgess.iv, davide

Subscribers: Prazek, llvm-commits

Differential Revision: https://reviews.llvm.org/D31567

llvm-svn: 299322
2017-04-02 05:09:15 +00:00
Craig Topper 68a3ed2e1b [APInt] Use conditional operator to simplify some code. NFC
llvm-svn: 299320
2017-04-01 21:50:10 +00:00
Craig Topper a742cb5fc8 [APInt] Implement flipAllBitsSlowCase with tcComplement. NFCI
llvm-svn: 299319
2017-04-01 21:50:08 +00:00
Craig Topper 99cfe4f99d [APInt] Fix indentation. NFC
llvm-svn: 299318
2017-04-01 21:50:06 +00:00
Craig Topper b2aaa5da42 [APInt] Implement AndAssignSlowCase using tcAnd. Do the same for Or and Xor. NFCI
llvm-svn: 299317
2017-04-01 21:50:03 +00:00
Craig Topper 278ebd2f98 [APInt] Allow GreatestCommonDivisor to take rvalue inputs efficiently. Use moves instead of copies in the loop.
Summary:
GreatestComonDivisor currently makes a copy of both its inputs. Then in the loop we do one move and two copies, plus any allocation the urem call does.

This patch changes it to take its inputs by value so that we can do a move of any rvalue inputs instead of copying. Then in the loop we do 3 move assignments and no copies. This way the only possible allocations we have in the loop is from the urem call.

Reviewers: dblaikie, RKSimon, hans

Reviewed By: dblaikie

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D31572

llvm-svn: 299314
2017-04-01 20:30:57 +00:00
Davide Italiano 16fe5822f2 [WASM] Remove other comparison of unsigned expression >= 0.
This should finally fix the GCC 7 build with -Werror.

llvm-svn: 299313
2017-04-01 19:47:52 +00:00
Davide Italiano deede839f2 [WASM] Remove a set but never used variable.
llvm-svn: 299312
2017-04-01 19:40:51 +00:00
Davide Italiano 543760218a [WASM] Remove an assertion that can never fire.
uint* is by definition always >=0.

llvm-svn: 299311
2017-04-01 19:37:15 +00:00
Davide Italiano c88169e61b [AMDGPU] Garbage collect now unused dead code. NFCI.
llvm-svn: 299310
2017-04-01 19:30:17 +00:00
Sanjay Patel 8b5ad3f00e [InstSimplify] add constant folding for fdiv/frem
Also, add a helper function so we don't have to repeat this code for each binop.

llvm-svn: 299309
2017-04-01 19:05:11 +00:00
Sanjay Patel ee0f5cc41f [InstSimplify] add tests for missed constant folding; NFC
llvm-svn: 299308
2017-04-01 18:44:03 +00:00
Sanjay Patel 1fd16f073d fix formatting; NFC
llvm-svn: 299307
2017-04-01 18:40:30 +00:00
Sanjay Patel 5e94bb00b3 fix formatting; NFC
llvm-svn: 299305
2017-04-01 15:53:12 +00:00
Sanjay Patel 665021e7ee [DAGCombiner] enable vector transforms for any/all {sign} bits set/clear
The code already allowed vector types in via "isInteger" (which might want
a more specific name), so use splat-friendly constant predicates to match
those types.

llvm-svn: 299304
2017-04-01 15:05:54 +00:00
Sanjay Patel fe9340c168 [PowerPC, x86] add vector tests for any/all {sign} bits set/clear; NFC
llvm-svn: 299303
2017-04-01 14:32:18 +00:00
Daniel Berlin 43e13a2d98 MemorySSA: Update expensive checking version of def_chain_iterator for templating changes
llvm-svn: 299301
2017-04-01 10:04:28 +00:00
Daniel Berlin 9a9c9ff260 NewGVN: Don't try to kill off the stored value of stores when
processing the congruence class of the store.
Because we use the stored value of a store as the def, it isn't dead
just because it appears as a def when it comes from a store.

Note: I have not hit any cases with the memory code as it is where
this breaks anything, just because of what memory congruences we
actually allow.  In a followup that improves memory congruence,
this bug actually breaks real stuff (but the verifier catches it).

llvm-svn: 299300
2017-04-01 09:44:33 +00:00
Daniel Berlin 9b4984926c NewGVN: Clean up GVNExpression memory hierarchy, restructure hash computation a bit so we don't have to redefine it for loads, stores, and calls
llvm-svn: 299299
2017-04-01 09:44:29 +00:00
Daniel Berlin 871ecd90ca NewGVN: Use def_chain iterator in singleReachablePhiPath instead of recursion
llvm-svn: 299298
2017-04-01 09:44:24 +00:00
Daniel Berlin 07275c3065 Move def_chain iterator to MemorySSA.h so it can be reused
llvm-svn: 299297
2017-04-01 09:44:19 +00:00
Daniel Berlin f56cc07fd2 MemorySSA.h - make clang-format happy
llvm-svn: 299296
2017-04-01 09:44:14 +00:00
Daniel Berlin d042031f0f MemorySSA: Push const correctness further.
llvm-svn: 299295
2017-04-01 09:01:12 +00:00
Daniel Berlin 7500c5641e MemorySSA: Kill the WalkTargetCache now that we have getBlockDefs.
llvm-svn: 299294
2017-04-01 08:59:45 +00:00
Craig Topper 473a80ffcb [APInt] Implement operator! using operator==(uint64_t). NFCI
llvm-svn: 299293
2017-04-01 06:50:00 +00:00
Craig Topper 9ab8d7f9c3 [APInt] Remove the mul/urem/srem/udiv/sdiv functions from the APIntOps namespace. Replace the few usages with calls to the class methods. NFC
llvm-svn: 299292
2017-04-01 05:08:57 +00:00
Craig Topper 73250168e7 [DAGCombiner] Fix fold (or (shuf A, V_0, MA), (shuf B, V_0, MB)) -> (shuf A, B, Mask) to explicitly ensure that only one of the inputs of each shuffle is a zero vector.
This can only happen when we have a mix of zero and undef elements and the two vectors have a different arrangement of zeros/undefs. The shuffle should eventually be constant folded to all zeros.

Fixes PR32484.

llvm-svn: 299291
2017-04-01 04:26:20 +00:00
Quentin Colombet 49d70d0529 Revert "Feature generic option to setup start/stop-after/before"
This reverts commit r299282.

Didn't intend to commit this :(

llvm-svn: 299288
2017-04-01 01:26:24 +00:00
Quentin Colombet fc8f048c13 Revert "Localizer fun"
This reverts commit r299283.

Didn't intend to commit this :(

llvm-svn: 299287
2017-04-01 01:26:21 +00:00
Quentin Colombet 35a47010b1 Revert "Instrument SDISel C++ patterns"
This reverts commit r299284.

Didn't intend to commit this :(

llvm-svn: 299286
2017-04-01 01:26:17 +00:00
Quentin Colombet 7f64318938 [RegBankSelect] Support REG_SEQUENCE for generic mapping
REG_SEQUENCE falls into the same category as COPY for operands mapping:
- They don't have MCInstrDesc with register constraints
- The input variable could use whatever register classes
- It is possible to have register class already assigned to the operands

In particular, given REG_SEQUENCE are always target specific because of
the subreg indices. Those indices must apply to the register class of
the definition of the REG_SEQUENCE and therefore, the target must set a
register class to that definition. As a result, the generic code can
always use that register class to derive a valid mapping for a
REG_SEQUENCE.

llvm-svn: 299285
2017-04-01 01:26:14 +00:00
Quentin Colombet b43da15602 Instrument SDISel C++ patterns
llvm-svn: 299284
2017-04-01 01:21:32 +00:00
Quentin Colombet 3c40b366c5 Localizer fun
WIP

llvm-svn: 299283
2017-04-01 01:21:28 +00:00
Quentin Colombet ffe3053a66 Feature generic option to setup start/stop-after/before
This patch refactors the code used in llc such that all the users of the
addPassesToEmitFile API have access to a homogeneous way of handling
start/stop-after/before options right out of the box.

Previously each user would have needed to duplicate this logic and set
up its own options.

NFC

llvm-svn: 299282
2017-04-01 01:21:24 +00:00
Peter Collingbourne 3420e4bf94 Fix a test to check assembly output instead of bitcode.
llvm-svn: 299279
2017-03-31 23:22:19 +00:00
Eric Christopher 60a245e0ff Reduce the number of times we query the subtarget for the same information.
llvm-svn: 299278
2017-03-31 23:12:27 +00:00
Eric Christopher cf965f2f03 Small cleanup to remove extraneous cast.
llvm-svn: 299277
2017-03-31 23:12:24 +00:00