Commit Graph

255534 Commits

Author SHA1 Message Date
Vedant Kumar e550d11d34 Rename a helper function, NFC.
llvm-svn: 295918
2017-02-23 01:22:38 +00:00
Matthias Braun 1cba1408c0 Test if we can use raw strings on all platforms compiling LLVM.
llvm-svn: 295917
2017-02-23 01:09:01 +00:00
Eli Friedman 13f2e35311 Explicitly state the behavior of inbounds with a null pointer.
See https://llvm.org/bugs/show_bug.cgi?id=31439; this reflects LLVM's
behavior in practice, and should be compatible with C/C++ rules.

Differential Revision: https://reviews.llvm.org/D28026

llvm-svn: 295916
2017-02-23 00:48:18 +00:00
Sean Callanan 3b7c7e1d64 Reverted 295897 pending refinements and fixes for green-dragon.
llvm-svn: 295915
2017-02-23 00:46:30 +00:00
Matt Arsenault d4bca1e9ef AMDGPU: Replace disabled exp inputs with undef
llvm-svn: 295914
2017-02-23 00:44:03 +00:00
Rui Ueyama 85d54b050e Fix /msvclto.
Previously, bitcode files in library paths were passed to the MSVC linker.
This patch strips them.

llvm-svn: 295913
2017-02-23 00:26:42 +00:00
Matt Arsenault a9e16e6597 AMDGPU: Add another BFE pattern
This is the pattern that falls out of the instruction's
definition if offset == 0.

llvm-svn: 295912
2017-02-23 00:23:43 +00:00
Richard Trieu d0786099b1 [ODRHash] Add IdentiferInfo and FieldDecl support.
IdentifierInfo is hashed based on the stored string.  FieldDecl versus other
Decl is now detected, as well as differently named fields.

Differential Revision: https://reviews.llvm.org/D21675

llvm-svn: 295911
2017-02-23 00:23:01 +00:00
Rafael Espindola a55b86c0e5 Reduce templating a bit. NFC.
llvm-svn: 295909
2017-02-23 00:02:03 +00:00
Matt Arsenault 79a45db7f5 AMDGPU: Use clamp with f64
llvm-svn: 295908
2017-02-22 23:53:37 +00:00
Greg Clayton 98f9bcc1c9 Fixed errors in AllocatedBlock:
- Allow zero byte size request for memory and ensure it gets a unique address
- Exit the free block loop when we find an appropriate free block

<rdar://problem/30644888>

llvm-svn: 295907
2017-02-22 23:42:55 +00:00
Michael Kuperstein 6181c62b95 Revert r295868 because it breaks a different SLP lit test.
llvm-svn: 295906
2017-02-22 23:35:13 +00:00
Matt Arsenault d5c6515b68 AMDGPU: Fold FP clamp as modifier bit
The manual is unclear on the details of this. It's not
clear to me if denormals are not allowed with clamp,
or if that is only omod. Not allowing denorms for
fp16 or fp64 isn't useful so I also question if that
is really a restriction. Same with whether this is valid
without IEEE mode enabled.

llvm-svn: 295905
2017-02-22 23:27:53 +00:00
Wei Ding f2cce02eb2 AMDGPU : Update TrapCode based on Trap Handler ABI.
Differential Revision: http://reviews.llvm.org/D30232

llvm-svn: 295904
2017-02-22 23:22:19 +00:00
Alex Lorenz f9a28a287c [ObjC][Modules] Don't perform property lookup in hidden class extensions
rdar://30603803

llvm-svn: 295903
2017-02-22 23:18:49 +00:00
Justin Bogner d519a92a27 [libFuzzer] Update traces hooks test after r293741
This test now passes on darwin.

llvm-svn: 295902
2017-02-22 23:12:36 +00:00
Peter Collingbourne 6321251a4e ELF: Simplify the thinlto.ll test and verify that importing is working correctly.
llvm-svn: 295901
2017-02-22 23:06:49 +00:00
Justin Bogner 59c8420018 [libFuzzer] Mark a test that infinite loops as unsupported
We need to investigate this, but for now it just causes too much
headache when trying to run these tests.

llvm-svn: 295900
2017-02-22 23:05:17 +00:00
Matt Arsenault f5262256a1 AMDGPU: Add replacement bfe intrinsics
llvm-svn: 295899
2017-02-22 23:04:58 +00:00
Sanjay Patel 4805ce0b17 [InstCombine] don't try SimplifyDemandedInstructionBits from add/sub because it's slow and unlikely to succeed
Notably, no regression tests change when we remove these calls, and these are expensive calls.

The motivation comes from the general acknowledgement that the compiler is getting slower:
http://lists.llvm.org/pipermail/llvm-dev/2017-January/109188.html
http://lists.llvm.org/pipermail/llvm-dev/2016-December/108279.html

And specifically the test case attached to PR32037:
https://bugs.llvm.org//show_bug.cgi?id=32037

Profiling the middle-end (opt) part of the compile:
$ ./opt -O2 row_common.bc -o /dev/null

...visitAdd and visitSub are near the top of the instcombine list, and the calls to SimplifyDemandedInstructionBits()
are high within each of those. Those calls account for 1%+ of the opt time in either debug or release profiles. And 
that's the rough win I see from this patch when testing opt built release from r295864 on an iMac with Haswell 4GHz
(model 4790K).

It seems unlikely that we'd be able to eliminate add/sub or change their operands given that add/sub normally affect
all bits, and the PR32037 example shows no IR difference after this change using -O2.

Also worth noting - the code comment in visitAdd:
// This handles stuff like (X & 254)+1 -> (X&254)|1
...isn't true. That transform is handled later with a call to haveNoCommonBitsSet().

Differential Revision: https://reviews.llvm.org/D30270

llvm-svn: 295898
2017-02-22 23:01:12 +00:00
Sean Callanan ff1fb7f846 Changed builld-llvm.py to use .json files
LLDB has many branches in a variety of repositories.
The build-script.py file is subtly different for each set.
This is unnecessary and causes merge headaches.

This patch makes build-llvm.py consult a directory full 
of .json files, each one of which matches a particular
branch using a regular expression.

Differential revision: https://reviews.llvm.org/D30275

llvm-svn: 295897
2017-02-22 22:57:59 +00:00
George Rokos 63efdd9e1e [OpenMP] Missing virtual destructor in KMPAffinity
Added virtual destructor in a class containing virtual functions.

Differential Revision: https://reviews.llvm.org/D30271

llvm-svn: 295896
2017-02-22 22:50:28 +00:00
Dylan McKay 19d9533496 [AVR] Disable integrated assembler for a few tests
Fixes the build.

llvm-svn: 295895
2017-02-22 22:41:13 +00:00
George Burgess IV 75b34a9610 [CodeGen] Add param info for ctors with ABI args.
This fixes a few assertion failures. Please see the added test case.

llvm-svn: 295894
2017-02-22 22:38:25 +00:00
Eugene Zelenko db56e5a89a [CodeGen] Fix some Clang-tidy modernize and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 295893
2017-02-22 22:32:51 +00:00
Krzysztof Parzyszek ab57c2bad3 [Hexagon] Implement @llvm.readcyclecounter()
llvm-svn: 295892
2017-02-22 22:28:47 +00:00
Matt Arsenault 7b6c5d28f5 AMDGPU: Don't add emergency stack slot if all spills are SGPR->VGPR
This should avoid reporting any stack needs to be allocated in the
case where no stack is truly used. An unused stack slot is still
left around in other cases where there are real stack objects
but no spilling occurs.

llvm-svn: 295891
2017-02-22 22:23:32 +00:00
Richard Trieu 639d7b68d6 [ODRHash] static_cast and Stmt hashing.
Add support for static_cast in classes.  Add pointer-independent profiling for
Stmt's, sharing most of the logic with Stmt::Profile.  This is the first of the
deep sub-Decl diffing for error messages.

Differential Revision: https://reviews.llvm.org/D21675

llvm-svn: 295890
2017-02-22 22:22:42 +00:00
Daniel Berlin fccbda967a PredicateInfo: Support switch statements
Summary:
Depends on D29606 and D29682

Makes us pass GVN's edge.ll (we also will pass a few other testcases
they just need cleaning up).

Thoughts on the Predicate* hiearchy of classes especially welcome :)
(it's not clear to me how best to organize it, and currently, the getBlock* seems ... uglier than maybe wasting a field somewhere or something).

Reviewers: davide

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D29747

llvm-svn: 295889
2017-02-22 22:20:58 +00:00
Daniel Berlin 211a1209a5 Add pair conversion functions to BasicBlockEdge.
llvm-svn: 295888
2017-02-22 22:20:53 +00:00
Daniel Berlin 17e8d0eae2 Move updating functions to MemorySSAUpdater.
Add updater to passes that now need it.
Move around code in MemorySSA to expose needed functions.

Summary: Mostly cleanup

Reviewers: george.burgess.iv

Subscribers: llvm-commits, Prazek

Differential Revision: https://reviews.llvm.org/D30221

llvm-svn: 295887
2017-02-22 22:19:55 +00:00
Richard Smith 64cb9ca456 PR32034: Evaluate _Atomic(T) in-place when T is a class or array type.
This is necessary in order for the evaluation of an _Atomic initializer for
those types to have an associated object, which an initializer for class or
array type needs.

llvm-svn: 295886
2017-02-22 22:09:50 +00:00
Matthew Simpson 835b246d7f [LV] Update floating-point induction test checks (NFC)
llvm-svn: 295885
2017-02-22 21:56:02 +00:00
Wei Mi 74d5a90fa6 [LSR] Canonicalize formula and put recursive Reg related with current loop in ScaledReg.
After rL294814, LSR formula can have multiple SCEVAddRecExprs inside of its BaseRegs.
Previous canonicalization will swap the first SCEVAddRecExpr in BaseRegs with ScaledReg.
But now we want to swap the SCEVAddRecExpr Reg related with current loop with ScaledReg.
Otherwise, we may generate code like this: RegA + lsr.iv + RegB, where loop invariant
parts RegA and RegB are not grouped together and cannot be promoted outside of loop.
With this patch, it will ensure lsr.iv to be generated later in the expr:
RegA + RegB + lsr.iv, so that RegA + RegB can be promoted outside of loop.

Differential Revision: https://reviews.llvm.org/D26781

llvm-svn: 295884
2017-02-22 21:47:08 +00:00
Krzysztof Parzyszek 3596a81c69 [RDF] Support for partial structural aliases in RegisterAggr
llvm-svn: 295883
2017-02-22 21:42:15 +00:00
Greg Clayton 69b75d4b19 Fix header documentation.
llvm-svn: 295882
2017-02-22 21:32:48 +00:00
Greg Clayton e85e9a2f01 Fix header documentation.
llvm-svn: 295881
2017-02-22 21:32:16 +00:00
Zachary Turner 842972b740 [Support] Re-add the special OSX flags on mmap.
The problem appears to be that these flags can only be used
when mapping a file for read-only, not for readwrite.  So
we do that here.

llvm-svn: 295880
2017-02-22 21:24:06 +00:00
Krzysztof Parzyszek 65971d97b0 [Hexagon] Add intrinsics for masked vector stores
Patch by Harsha Jagasia.

llvm-svn: 295879
2017-02-22 21:23:09 +00:00
Matt Arsenault 93e65ea733 AMDGPU: Don't look at chain users when adjusting writemask
Fixes not adjusting using new intrinsics with chains.

llvm-svn: 295878
2017-02-22 21:16:41 +00:00
Matt Arsenault 707780b420 AMDGPU: Always allocate emergency stack slot at offset 0
This allows us to ensure that 0 is never a valid pointer
to a user object, and ensures that the offset is always legal
without needing a register to access it. This comes at the cost
of usable offsets and wasted stack space.

llvm-svn: 295877
2017-02-22 21:05:25 +00:00
Rui Ueyama e9bc0b5a3c Add a comment about thread safety.
llvm-svn: 295876
2017-02-22 21:05:06 +00:00
Derek Schuff 8afd6565e7 [WebAssembly] Update llvm-readobj tests for switch to version 0x1
llvm-svn: 295875
2017-02-22 21:01:17 +00:00
Matt Arsenault a0c6dca15b AMDGPU: Add fmed3 half builtin
llvm-svn: 295874
2017-02-22 20:55:59 +00:00
Matt Arsenault 61ec6a03ca AMDGPU: Change exp with compr bit printing
llvm-svn: 295873
2017-02-22 20:37:12 +00:00
Bob Haarman 4f5a98570f stop using associative comdats for SEH filter functions
Summary: We implement structured exception handling (SEH) by generating filter functions for functions that use exceptions. Currently, we use associative comdats to ensure that the filter functions are preserved if and only if the functions we generated them for are preserved. This can lead to problems when generating COFF objects - LLVM may decide to inline a function that uses SEH and remove its body, at which point we will end up with a comdat that COFF cannot represent. To avoid running into that situation, this change makes us not use associative comdats for SEH filter functions. We can still get the benefits we used the associative comdats for: we will always preserve filter functions we use, and dead stripping can eliminate the ones we don't use.

Reviewers: rnk, pcc, ruiu

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D30117

llvm-svn: 295872
2017-02-22 20:29:39 +00:00
Wei Ding 6ade56e0a0 Revert "AMDGPU : Update TrapCode based on Trap Handler ABI."
This reverts commit r295867.

llvm-svn: 295871
2017-02-22 20:29:22 +00:00
George Burgess IV f203dbfba9 [CodeGen] Note where we add ABI-specific args in ctors. NFC.
Meta: The ultimate goal is to teach ExtParameterInfo about
pass_object_size attributes. This is necessary for that, since our
ExtParameterInfo is a bit buggy in C++. I plan to actually make use of
this Prefix/Suffix info in the near future, but I like small
single-purpose changes. Especially when those changes are hard to
actually test...

At the moment, some of our C++-specific CodeGen pretends that ABIs can
only add arguments to the beginning of a function call. This isn't quite
correct: args can be appended to the end, as well. It hasn't mattered
much until now, since we seem to only use this "number of arguments
added" data when calculating the ExtParameterInfo to use when making a
CGFunctionInfo. Said ExtParameterInfo is currently only used for
ParameterABIs (Swift) and ns_consumed (ObjC).

So, this patch allows ABIs to indicate whether args they added were at
the beginning or end of an argument list. We can use this information to
emit ExtParameterInfos more correctly, though like said, that bit is
coming soon.

No tests since this is theoretically a nop.

llvm-svn: 295870
2017-02-22 20:28:02 +00:00
Dan Gohman 8e6ee2070a [WebAssembly] Update llvm-objdump tests for the new wasm version number.
llvm-svn: 295869
2017-02-22 20:24:16 +00:00
Alexey Bataev b551a81c28 [SLP] Fix for PR32036: Vectorized horizontal reduction returning wrong result
Summary:
If the same value is used several times as an extra value, SLP
vectorizer takes it into account only once instead of actual number of
using.
For example:
```
int val = 1;
for (int y = 0; y < 8; y++) {
  for (int x = 0; x < 8; x++) {
    val = val + input[y * 8 + x] + 3;
  }
}
```
We have 2 extra rguments: `1` - initial value of horizontal reduction
and `3`, which is added 8*8 times to the reduction. Before the patch we
added `1` to the reduction value and added once `3`, though it must be
added 64 times.

Reviewers: mkuper, mzolotukhin

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D30262

llvm-svn: 295868
2017-02-22 20:06:40 +00:00