Commit Graph

210015 Commits

Author SHA1 Message Date
Rafael Espindola d511726ce9 [Solaris] Use the GCC Installation detector to add the C++ include paths.
Patch by Xan López!

llvm-svn: 247144
2015-09-09 13:36:00 +00:00
Ed Maste d7b073e0aa Update expectedFailureFreeBSD to expectedFlakeyFreeBSD for intermittent tests
Due to LLDB or test race conditions these tests do not pass
consistently.

llvm.org/pr15037
llvm.org/pr19310
llvm.org/pr22611

llvm-svn: 247143
2015-09-09 13:15:14 +00:00
Michael Kruse da943ce613 Generate gitversion.h in autoconf builds
Add a custom makefile rule to generate lib/External/isl/gitversion.h
from GIT_HEAD_ID and trigger it using BULIT_SOURCES to ensure the file
exists before compilation starts.

The latest ISL creates gitversion.h from Makefile.am only, instead also
from configure.ac in previous version. While the Polly build invokes
configure, it does not invoke ISL's make such that the file was missing.

Invoking ISL's make would come with additional problems such as
triggering automake because of not preserved file time stamps.
Re-running automake might not be successful on other system
configurations for instance because it was preconfigured without
--with-clang option.

llvm-svn: 247142
2015-09-09 13:15:11 +00:00
Ed Maste bfd03da5ba XFAIL TestFormatters on FreeBSD
The test is hitting an assertion in Clang.  This is an extension of
r246766.

llvm.org/pr24691

llvm-svn: 247141
2015-09-09 13:10:33 +00:00
James Molloy 520838977b Rename ExitCount to BackedgeTakenCount, because that's what it is.
We called a variable ExitCount, stored the backedge count in it, then redefined it to be the exit count again.

llvm-svn: 247140
2015-09-09 12:51:10 +00:00
James Molloy 89eccee4db Delay predication of stores until near the end of vector code generation
Predicating stores requires creating extra blocks. It's much cleaner if we do this in one pass instead of mutating the CFG while writing vector instructions.

Besides which we can make use of helper functions to update domtree for us, reducing the work we need to do.

llvm-svn: 247139
2015-09-09 12:51:06 +00:00
Alexandros Lamprineas 3834d2ca08 [ARM] "cortex-r5f" and "cortex-m4f" are unknown names for clang.
The tests in test/CodeGen/arm-target-features.c are currently
passing but warning messages are suppressed. These tests are now
synchronized with the corresponding changes in Target Parser.

This patch will fix the regressions in clang caused by r247136

Differential Revision: http://reviews.llvm.org/D12722

llvm-svn: 247138
2015-09-09 11:29:06 +00:00
Tamas Berghammer 3366f0b42f Fix type in include header name
llvm-svn: 247137
2015-09-09 11:28:52 +00:00
Alexandros Lamprineas 712099ccfd LLVM does not distinguish Cortex-M4 from Cortex-M4F neither Cortex-R5 from R5F.
Removed "cortex-r5f" and "cortex-m4f" from Target Parser, sinced they are
unknown cpu names for llvm and clang. Also updated default FPUs for R5 and M4
accordingly.

Differential Revision: http://reviews.llvm.org/D12692

Change-Id: Ib81c7216521a361d8ee1296e4b6a2aa00bd479c5
llvm-svn: 247136
2015-09-09 11:20:48 +00:00
Tamas Berghammer bc99ce88f5 Add missing include after rL247131
llvm-svn: 247135
2015-09-09 11:16:32 +00:00
Mohit K. Bhakkad 9514a383c8 [LLDB][MIPS] Added support for the debugging of N32/O32 applications on MIPS64 target.
Patch by Nitesh Jain

Reviewers: clayborg, ovyalov.
Subscribers: jaydeep, bhushan, mohit.bhakkad, sagar, nitesh.jain, lldb-commits.
Differential Revision: http://reviews.llvm.org/D12671

llvm-svn: 247134
2015-09-09 10:32:20 +00:00
Tamas Berghammer 025103cc61 Change the looping stack detection code
In some special case (e.g. signal handlers, hand written assembly) it is
valid to have 2 stack frame with the same CFA value. This CL change the
looping stack detection code to report a loop only if at least 3
consecutive frames have the same CFA.

Differential revision: http://reviews.llvm.org/D12699

llvm-svn: 247133
2015-09-09 10:26:50 +00:00
Tamas Berghammer eb882fc1f8 Add basic fission support to SymbolFileDWARF
* Create new dwo symbol file class
* Add handling for .dwo sections
* Change indexes in SymbolFileDWARF to store compile unit offset next to
  DIE offset
* Propagate queries from dwarf compile unit to the dwo compile unit
  where applicable

Differential revision: http://reviews.llvm.org/D12291

llvm-svn: 247132
2015-09-09 10:20:48 +00:00
Tamas Berghammer 715cbe8939 Code cleanup in preparation of adding split dwarf support
* Remove some unused code
* Remove usage of DWARFDebugInfoEntry::Attributes where usage isn't
  reasonable
* Cleanup DWARFMappedHash with separating it to header and implementation
  file and fixing the visibility of the functions

Differential revision: http://reviews.llvm.org/D12374

llvm-svn: 247131
2015-09-09 10:20:36 +00:00
Tamas Berghammer 1535bebac6 Remove the dwo files in the cleanup stage of the tests
The dwo files are generated when the tests run with split dwarf info.

llvm-svn: 247130
2015-09-09 10:20:30 +00:00
Mohit K. Bhakkad a73239f860 [LLDB][MIPS] MIPS load/store instruction emulation for hardware watchpoints
Reviewers: clayborg.
Subscribers: jaydeep, bhushan, sagar, nitesh.jain, lldb-commits.
Differential Revision: http://reviews.llvm.org/D12670

llvm-svn: 247129
2015-09-09 10:17:58 +00:00
Daniel Sanders 2038747fce Fix vector splitting for extract_vector_elt and vector elements of <8-bits.
Summary:
One of the vector splitting paths for extract_vector_elt tries to lower:
    define i1 @via_stack_bug(i8 signext %idx) {
      %1 = extractelement <2 x i1> <i1 false, i1 true>, i8 %idx
      ret i1 %1
    }
to:
    define i1 @via_stack_bug(i8 signext %idx) {
      %base = alloca <2 x i1>
      store <2 x i1> <i1 false, i1 true>, <2 x i1>* %base
      %2 = getelementptr <2 x i1>, <2 x i1>* %base, i32 %idx
      %3 = load i1, i1* %2
      ret i1 %3
    }
However, the elements of <2 x i1> are not byte-addressible. The result of this
is that the getelementptr expands to '%base + %idx * (1 / 8)' which simplifies
to '%base + %idx * 0', and then simply '%base' causing all values of %idx to
extract element zero.

This commit fixes this by promoting the vector elements of <8-bits to i8 before
splitting the vector.

This fixes a number of test failures in pocl.

Reviewers: pekka.jaaskelainen

Subscribers: pekka.jaaskelainen, llvm-commits

Differential Revision: http://reviews.llvm.org/D12591

llvm-svn: 247128
2015-09-09 09:53:20 +00:00
Chandler Carruth 1688a772fc Fix a typo I spotted when hacking on SROA. Somewhat alarming that
nothing broke.

llvm-svn: 247127
2015-09-09 09:46:16 +00:00
Tobias Grosser f1ac57c6cd IslNodeBuilder: Add virtual function to obtain the schedule of an ast node
Not all users of our IslNodeBuilder will attach scheduling information to the
AST in the same way IslAstInfo is doing it today. By going through a virtual
function when extracting the schedule of an AST node other users can provide
their own functions for extract scheduling information in case they attach
scheduling information in a different way to the AST nodes.

No functional change for Polly itself intended.

llvm-svn: 247126
2015-09-09 09:24:38 +00:00
Zoran Jovanovic d9790793d6 [mips][microMIPS] Implement CACHEE and PREFE instructions
Differential Revision: http://reviews.llvm.org/D11628

llvm-svn: 247125
2015-09-09 09:10:46 +00:00
Hafiz Abid Qadeer 87f4f413ba Remove an invalid check in DW_OP_piece processing.
Summary:
When lldb is processing a location containing DW_OP_piece, the result is being
stored in the 'pieces' variable. The location is popped from the 'stack' variable.
So this check to see that 'stack' is not empty was invalid and caused the pieces
after the first to not get processed.

I am working on an architecture which has 16-bit and 8-bit registers. So this
problem was quite easy to see. But I was able to re-produce this issue on x86
too with long long variable and compiling woth -m32. It resulted in following
location list.
00000014 08048496 080484b5 (DW_OP_reg6 (esi); DW_OP_piece: 4; DW_OP_reg7 (edi); DW_OP_piece: 4)

and lldb was only showing the contents of first register when I evaluated the
variable as it does not process the 2nd piece due to this check.

Reviewers: clayborg, aprantl

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D12674

llvm-svn: 247124
2015-09-09 09:06:05 +00:00
Matt Arsenault d768737454 AMDGPU: Fix not encoding src2 of VOP3b instructions
Broken by r247074. Should include an assembler test,
but the assembler is currently broken for VOP3b apparently.

llvm-svn: 247123
2015-09-09 08:39:49 +00:00
Sanjoy Das da0d79e0a0 [IRCE] Add INITIALIZE_PASS_DEPENDENCY invocations.
IRCE was just using INITIALIZE_PASS(), which is incorrect.

llvm-svn: 247122
2015-09-09 03:47:18 +00:00
Jason Molenda 21586c8385 When lldb gets the register definitions from the response of a
qXfer:features:read:target.xml packet, or via the
plugin.process.gdb-remote.target-definition-file setting, if the
register definition doesn't give us eh_frame or DWARF register
numbers for that register, try to get that information from the ABI
plugin.

The DWARF/eh_frame register numbers are defined in the ABI
standardization documents - so getting this from the ABI plugin is
reasonable.  There's little value in having the remote stub inform
us of this generic information, as long as we can all agree on the
names of the registers.

There's some additional information we could get from the ABI.  For
instance, on ABIs where function arguments are passed in registers,
lldb defines alternate names like "arg1", "arg2", "arg3" for these
registers so they can be referred to that way by the user.  We could
get this from the ABI if the remote stub doesn't provide that.  That
may be something worth doing in the future - but for now, I'm keeping
this a little more minimal.

Thinking about this, what we want/need from the remote stub at a
minimum are:

 1. The names of the register
 2. The number that the stub will use to refer to the register with
    the p/P packets and in the ? response packets (T/S) where 
    expedited register values are provided
 3. The size of the register in bytes
   
(nice to have, to remove any doubt)
 4. The offset of the register in the g/G packet if we're going to
    use that for reading/writing registers.

debugserver traditionally provides a lot more information in
addition to this via the qRegisterInfo packet, and debugserver 
augments its response to the qXfer:features:read:target.xml
query to include this information.  Including:

DWARF regnum, eh_frame regnum, stabs regnum, encoding (ieee754,
Uint, Vector, Sint), format (hex, unsigned, pointer, vectorof*,
float), registers that should be marked as invalid if this 
register is modified, and registers that contain this register.

We might want to get all of this from the ABI - I'm not convinced
that it makes sense for the remote stub to provide any of these 
details, as long as the ABI and remote stub can agree on register
names.

Anyway, start with eh_frame and DWARF coming from the ABI if 
they're not provided by the remote stub.  We can look at doing
more in the future.

<rdar://problem/22566585> 

llvm-svn: 247121
2015-09-09 03:36:24 +00:00
Jason Molenda 0ace3f5c73 A change I'm open to reverting if there is disagreement:
When lldb receives a gdb-remote protocol packet that has
nonprintable characters, it will print the packet in
gdb-remote logging with binary-hex encoding so we don't 
dump random 8-bit characters into the packet log.

I'm changing this check to allow whitespace characters
(newlines, linefeeds, tabs) to be printed if those are
the only non-printable characters in the packet. 

This is primarily to get the response to the 
qXfer:features:read:target.xml packet to show up in the
packet logs in human readable form.  Right now we just
get a dozen kilobytes of hex-ascii and it's hard to 
figure out what register number scheme is being used.

llvm-svn: 247120
2015-09-09 03:24:52 +00:00
Lang Hames 856e4767ff [RuntimeDyld] Add support for MachO x86_64 SUBTRACTOR relocation.
llvm-svn: 247119
2015-09-09 03:14:29 +00:00
Dan Gohman e590b33bf8 [WebAssembly] Fix lowering of calls with more than one argument.
llvm-svn: 247118
2015-09-09 01:52:45 +00:00
Steven Wu 0d22f2d57e Fix vld1_lane intrinsic generation
Fix a bug introduced in r246985 which causes assertion when generating
vld1_lane.

llvm-svn: 247117
2015-09-09 01:37:18 +00:00
Stephane Sezer 9c99115367 Teach utilsOsType about NetBSD
Summary: NetBSD is a free, fast, secure, and highly portable Unix-like Open Source operating system.

Reviewers: joerg, sas

Subscribers: sas, emaste, lldb-commits

Differential Revision: http://reviews.llvm.org/D12615

Change by Kamil Rytarowski <n54@gmx.com>

llvm-svn: 247116
2015-09-09 01:22:05 +00:00
Stephane Sezer 851f23db94 NetBSD doesn't provide struct statfs, make use of struct statvfs
Reviewers: joerg, sas

Subscribers: labath, lldb-commits

Differential Revision: http://reviews.llvm.org/D12661

Change by Kamil Rytarowski <n54@gmx.com>

llvm-svn: 247115
2015-09-09 01:19:05 +00:00
Stephane Sezer 4d640f2e3b Prevent from a redefinition of _GLIBCXX_USE_NANOSLEEP
Summary: Build warning caught on NetBSD.

Reviewers: joerg, sas

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D12662

Change by Kamil Rytarowski <n54@gmx.com>

llvm-svn: 247114
2015-09-09 01:17:24 +00:00
Matt Arsenault acd68b58ae SelectionDAG: Support Expand of f16 extloads
Currently this hits an assert that extload should
always be supported, which assumes integer extloads.

This moves a hack out of SI's argument lowering and
is covered by existing tests.

llvm-svn: 247113
2015-09-09 01:12:27 +00:00
Enrico Granata d3233c1ed7 Data formatter candidate matches can be generated in a number of ways; language-based dynamic type discovery being one of them (for instance, this is what takes an 'id' and discovers that it truly is an __NSArrayI, so it should probably use the NSArray formatter)
This used to be hardcoded in the FormatManager, but in a pluginized world that is not the right way to go

So, move this step to the Language plugin such that appropriate language plugins for a type get a say about adding candidates to the formatters lookup tables

llvm-svn: 247112
2015-09-09 01:10:46 +00:00
Bruce Mitchener 1ef6e4c870 Fix log message warning in SBThread.
Summary:
The format string was not set up correctly as it was missing the %.
This resulted in a warning (correctly) that the data arguments were
not all used.

Reviewers: clayborg, jingham

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D12714

llvm-svn: 247111
2015-09-09 00:56:25 +00:00
Dan Gohman 4f52e00ecb [WebAssembly] Implement WebAssemblyInstrInfo::copyPhysReg
llvm-svn: 247110
2015-09-09 00:52:47 +00:00
Matt Arsenault 3099156261 Fix typos / grammar
llvm-svn: 247109
2015-09-09 00:38:33 +00:00
Duncan P. N. Exon Smith 78b66ecd70 Revert "Bitcode: ArrayRef-ize EmitRecordWithAbbrev(), NFC"
This reverts commit r247107.  Turns out clang calls these functions
directly, and `ArrayRef<T>` doesn't have a working implicit conversion
from `SmallVector<T>`.

http://lab.llvm.org:8080/green/job/clang-stage1-cmake-RA-incremental_build/14247

llvm-svn: 247108
2015-09-09 00:37:52 +00:00
Duncan P. N. Exon Smith 98b3cd9280 Bitcode: ArrayRef-ize EmitRecordWithAbbrev(), NFC
Change `EmitRecordWithAbbrev()` and friends to take an `ArrayRef<T>`
instead of requiring a `SmallVectorImpl<T>`.  No functionality change
intended.

llvm-svn: 247107
2015-09-09 00:34:25 +00:00
Davide Italiano 9a429b766f [llvm-readobj] MachO -- dump LinkerOptions load command.
Example output:

Linker Options {
  Size: 32
  Count: 2
  Strings [
    Value: -framework
    Value: Cocoa
  ]
}

There were only two tests using this -- so I converted them as part of
this commit rather than separately.

Differential Revision:	 http://reviews.llvm.org/D12702

llvm-svn: 247106
2015-09-09 00:21:18 +00:00
Peter Collingbourne ee381ffba4 CodeGen: Add CFI unrelated cast checks to the new pointer code path.
llvm-svn: 247105
2015-09-09 00:01:31 +00:00
Michael Zolotukhin 84df12375c Introduce __builtin_nontemporal_store and __builtin_nontemporal_load.
Summary:
Currently clang provides no general way to generate nontemporal loads/stores.
There are some architecture specific builtins for doing so (e.g. in x86), but
there is no way to generate non-temporal store on, e.g. AArch64. This patch adds
generic builtins which are expanded to a simple store with '!nontemporal'
attribute in IR.

Differential Revision: http://reviews.llvm.org/D12313

llvm-svn: 247104
2015-09-08 23:52:33 +00:00
Devin Coughlin 00691e3169 Revert "[Static Analyzer] BugReporter.cpp:2869: Assertion failed: !RemainingNodes.empty() && "No error node found in the trimmed graph""
This is making our internal build bot fail because it results in extra warnings being
emitted past what should be sink nodes. (There is actually an example of this in the
updated malloc.c test in the reverted commit.)

I'm working on a patch to fix the original issue by adding a new checker API to explicitly
create error nodes. This API will ensure that error nodes are always tagged in order to
prevent them from being reclaimed.

This reverts commit r246188.

llvm-svn: 247103
2015-09-08 23:50:22 +00:00
Reid Kleckner 51189f0a1d [WinEH] Avoid creating MBBs for LLVM BBs that cannot contain code
Typically these are catchpads, which hold data used to decide whether to
catch the exception or continue unwinding. We also shouldn't create MBBs
for catchendpads, cleanupendpads, or terminatepads, since no real code
can live in them.

This fixes a problem where MI passes (like the register allocator) would
try to put code into catchpad blocks, which are not executed by the
runtime. In the new world, blocks ending in invokes now have many
possible successors.

llvm-svn: 247102
2015-09-08 23:28:38 +00:00
Todd Fiala a195adde00 Fix regressions in dotest.py when passing filters or directories.
See https://llvm.org/bugs/show_bug.cgi?id=24708 for details.
Using '-f FILTER' or unnamed arguments (directories) to dotest.py
will now force no-multiprocessing mode.  This stops a bombardment
of test output spam when following the instructions we provide
in a test session trace for rerunning the test.

llvm-svn: 247101
2015-09-08 23:22:19 +00:00
Evgeniy Stepanov 4c2dd111f2 [msan] Unpoison dlpi_phdr in dl_iterate_phdr.
In some cases, PHDR table is allocated with malloc() by the linker
instead of being mapped from file. It needs to be unpoisoned in the
dl_iterate_phdr callback then.

This happens when program headers are not part of any loadable ELF
segment.

llvm-svn: 247100
2015-09-08 23:14:44 +00:00
Alexey Samsonov 63eaeca7d0 [CMake] Remove all uses of LLVM_NATIVE_ARCH.
Instead, assume we're going to target triple specified by
COMPILER_RT_DEFAULT_TARGET_TRIPLE and build runtimes for this triple
(and hope that the host compiler can target them).

This will help users that use cross-compiler on their host to build
Clang that would work on a different architecture. This will also come in
handy if one would want to configure several compiler-rt build trees on
the same host, using just-built Clang that can target many
architectures.

This doesn't change the behavior in the default build configuration.

llvm-svn: 247099
2015-09-08 23:13:47 +00:00
Peter Collingbourne 25a80bf9b6 CodeGen: Introduce CodeGenModule::CreateMetadataIdentifierForType.
This function can be used to create a metadata identifier for a specific
type. No functionality change, but this will be used by D11857 and D12026.

Differential Revision: http://reviews.llvm.org/D12038

llvm-svn: 247098
2015-09-08 23:01:30 +00:00
Rafael Espindola e438e07856 Create a dynamic segment.
It is still empty. I will add content next.

llvm-svn: 247097
2015-09-08 22:55:28 +00:00
Michael J. Spencer ac5f048e09 [lld][elf2] Address review comments.
llvm-svn: 247096
2015-09-08 22:51:46 +00:00
Peter Collingbourne 8d24ae9441 Re-apply r247080 with order of evaluation fix.
llvm-svn: 247095
2015-09-08 22:49:35 +00:00