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15 Commits

Author SHA1 Message Date
Richard Osborne 1b5562ad8e Add instruction encodings and disassembly for 1r instructions. 
llvm-svn: 170293
 2012-12-16 17:37:34 +00:00
Richard Osborne e31735a52b Add XCore disassembler. 
Currently there is no instruction encoding info and
XCoreDisassembler::getInstruction() always returns Fail. I intend to add
instruction encodings and tests in follow on commits.

llvm-svn: 170292
 2012-12-16 17:29:14 +00:00
Richard Osborne 3c31e21837 Change XCoreAsmPrinter to lower MachineInstrs to MCInsts before emission. 
This change adds XCoreMCInstLower to do the lowering to MCInst and
XCoreInstPrinter to print the MCInsts.

llvm-svn: 170288
 2012-12-16 16:20:48 +00:00
Evan Cheng bc153d49b7 Next round of MC refactoring. This patch factor MC table instantiations, MC 
registeration and creation code into XXXMCDesc libraries.

llvm-svn: 135184
 2011-07-14 20:59:42 +00:00
Evan Cheng c9c090d7a5 Rename XXXGenSubtarget.inc to XXXGenSubtargetInfo.inc for consistency. 
llvm-svn: 134281
 2011-07-01 22:36:09 +00:00
Evan Cheng 1e210d08d8 Merge XXXGenRegisterNames.inc into XXXGenRegisterInfo.inc 
llvm-svn: 134024
 2011-06-28 20:07:07 +00:00
Evan Cheng d9997acd14 Merge XXXGenRegisterDesc.inc XXXGenRegisterNames.inc XXXGenRegisterInfo.h.inc 
into XXXGenRegisterInfo.inc.

llvm-svn: 133922
 2011-06-27 18:32:37 +00:00
Evan Cheng 247533179a Starting to refactor Target to separate out code that's needed to fully describe 
target machine from those that are only needed by codegen. The goal is to
sink the essential target description into MC layer so we can start building
MC based tools without needing to link in the entire codegen.

First step is to refactor TargetRegisterInfo. This patch added a base class
MCRegisterInfo which TargetRegisterInfo is derived from. Changed TableGen to
separate register description from the rest of the stuff.

llvm-svn: 133782
 2011-06-24 01:44:41 +00:00
Chris Lattner 66031ed839 move all the target's asmprinters into the main target. The piece 
that should be split out is the InstPrinter (if a target is mc'ized).
This change makes all the targets be consistent.

llvm-svn: 119056
 2010-11-14 18:43:56 +00:00
Chris Lattner 823aed16f9 make -fno-rtti the default unless a directory builds with REQUIRES_RTTI. 
llvm-svn: 94378
 2010-01-24 20:43:08 +00:00
Chris Lattner 7ba0661f27 Stop building RTTI information for *most* llvm libraries. Notable 
missing ones are libsupport, libsystem and libvmcore.  libvmcore is
currently blocked on bugpoint, which uses EH.  Once it stops using
EH, we can switch it off.

This #if 0's out 3 unit tests, because gtest requires RTTI information.
Suggestions welcome on how to fix this.

llvm-svn: 94164
 2010-01-22 06:49:46 +00:00
Richard Osborne ddd1d4e0f2 Move XCore AsmPrinter to XCore/AsmPrinter directory. 
llvm-svn: 79094
 2009-08-15 12:53:15 +00:00
Daniel Dunbar 56e2947a33 Add TargetInfo libraries for all targets. 
- Intended to match current TargetMachine implementations.

 - No facilities for linking these in yet.

llvm-svn: 75751
 2009-07-15 06:35:19 +00:00
Misha Brukman 5cbf223916 Removed trailing whitespace from Makefiles. 
llvm-svn: 61991
 2009-01-09 16:44:42 +00:00
Richard Osborne bfd58d87f3 Test commit, add Makefile for XCore target, more to follow. 
llvm-svn: 58755
 2008-11-05 09:53:58 +00:00