228c31f045
Re-apply 97040 with fix. This survives a ppc self-host llvm-gcc bootstrap.
...
llvm-svn: 97310
2010-02-27 07:36:59 +00:00
dd33104203
Move dbg_value generation to target-independent FastISel,
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as X86 is currently the only FastISel target. Per review.
llvm-svn: 97255
2010-02-26 20:01:55 +00:00
952f6f98bb
movl is a cheaper way to materialize 0 without clobbering EFLAGS than movabsq.
...
llvm-svn: 97227
2010-02-26 16:49:27 +00:00
9300486d68
Delete a bunch of redundant predicates.
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llvm-svn: 97201
2010-02-26 01:14:30 +00:00
68e22cb5a0
Fix TextAlignFillValue in a few places
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llvm-svn: 97151
2010-02-25 18:07:10 +00:00
ec4e1b67bf
Truncate from i64 to i32 is "free" on x86-32, because it involves
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just discarding one of the registers.
llvm-svn: 97100
2010-02-25 03:04:36 +00:00
4811d004be
Speculatively revert r97011, "Re-apply 96540 and 96556 with fixes.", again in
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the hopes of fixing PPC bootstrap.
llvm-svn: 97040
2010-02-24 17:05:47 +00:00
3860521406
When forming SSE min and max nodes for UGE and ULE comparisons, it's
...
necessary to swap the operands to handle NaN and negative zero properly.
Also, reintroduce logic for checking for NaN conditions when forming
SSE min and max instructions, fixed to take into consideration NaNs and
negative zeros. This allows forming min and max instructions in more
cases.
llvm-svn: 97025
2010-02-24 06:52:40 +00:00
328a607490
Re-apply 96540 and 96556 with fixes.
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llvm-svn: 97011
2010-02-24 01:42:31 +00:00
a2d8c97b65
DIV8r must define %AX since X86DAGToDAGISel::Select() sometimes uses it
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instead of %AL/%AH.
llvm-svn: 97006
2010-02-24 00:39:35 +00:00
da52f449a0
Fix rev 96389 by restricting the xform to mask that's either signbit or max signed value.
...
llvm-svn: 96990
2010-02-23 21:51:54 +00:00
8d7b4393d2
no need to override IsLegalToFold, the base implementation
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disables load folding at -O0.
llvm-svn: 96973
2010-02-23 19:33:11 +00:00
7489838a89
remove a confused pattern that is trying to match an address
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then use it as an MMX register (!?).
llvm-svn: 96901
2010-02-23 07:16:12 +00:00
d17089231a
remove a bunch of dead named arguments in input patterns,
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though some look dubious afaict, these are all ok.
llvm-svn: 96899
2010-02-23 06:54:29 +00:00
48370e14e7
fix a type mismatch in this pattern, where we were using an i64 imm in a
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place where an i32 imm was required, the old isel just got lucky.
This fixes CodeGen/X86/x86-64-and-mask.ll
llvm-svn: 96894
2010-02-23 06:09:57 +00:00
a828850b4d
X86InstrInfoSSE.td declares PINSRW as having type v8i16,
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don't alis it in the MMX .td file with a different width,
split into two X86ISD opcodes. This fixes an x86 testcase.
llvm-svn: 96859
2010-02-23 02:07:48 +00:00
30ece5b807
Mark the return address stack slot as mutable when moving the return address
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during a tail call. A parameter might overwrite this stack slot during the tail
call.
The sequence during a tail call is:
1.) load return address to temp reg
2.) move parameters (might involve storing to return address stack slot)
3.) store return address to new location from temp reg
If the stack location is marked immutable CodeGen can colocate load (1) with the
store (3).
This fixes bug 6225.
llvm-svn: 96783
2010-02-22 16:18:09 +00:00
c1a545c307
Fix a typo in a comment.
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llvm-svn: 96778
2010-02-22 04:09:26 +00:00
b87de8d30d
Remove the logic for reasoning about NaNs from the code that forms
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SSE min and max instructions. The real thing this code needs to be
concerned about is negative zero.
Update the sse-minmax.ll test accordingly, and add tests for
-enable-unsafe-fp-math mode as well.
llvm-svn: 96775
2010-02-22 04:03:39 +00:00
db8d6678e9
fix an incorrect VT: eflags is always i32. The bug was causing us to
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create an X86ISD::Cmp node with result type i64 on the
CodeGen/X86/shift-i256.ll testcase and the new isel was assert on it
downstream.
llvm-svn: 96768
2010-02-22 00:28:59 +00:00
40eb7f0991
MC/X86: Add stub AsmBackend.
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llvm-svn: 96763
2010-02-21 21:54:14 +00:00
31a9212b0b
It turned out that we failed to emit proper symbol stubs on non-x86/darwin for ages (we emitted a reference to a stub, but no stub was emitted). The code inside x86-32/macho target objfile lowering should actually be the generic one - move it there.
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This (I really, really hope) should fix EH issues on ppc/darwin
and arm/darwin.
llvm-svn: 96755
2010-02-21 20:28:15 +00:00
3c29aff9ff
fix and un-xfail X86/vec_ss_load_fold.ll
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llvm-svn: 96720
2010-02-21 04:53:34 +00:00
18a32ce0f3
rename SelectScalarSSELoad -> SelectScalarSSELoadXXX and rewrite
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it to follow the mode needed by the new isel. Instead of returning
the input and output chains, it just returns the (currently only one,
which is a silly limitation) node that has input and output chains.
Since we want the old thing to still work, add a new
SelectScalarSSELoad to emulate the old interface. The XXX suffix
and the wrapper will eventually go away.
llvm-svn: 96715
2010-02-21 03:17:59 +00:00
7e47767763
Add support for the 'alignstack' attribute to the x86 backend. Fixes PR5254.
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Also, FileCheck'ize a test.
llvm-svn: 96686
2010-02-19 18:17:13 +00:00
336c0a1c87
Revert Anton's most recent EH patch (r96637), since it breaks a lot of
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ARM and Thumb tests.
llvm-svn: 96680
2010-02-19 17:10:59 +00:00
d0bf6f640f
Revert commits 96556 and 96640, because commit 96556 breaks the
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dragonegg self-host build. I reverted 96640 in order to revert
96556 (96640 goes on top of 96556), but it also looks like with
both of them applied the breakage happens even earlier. The
symptom of the 96556 miscompile is the following crash:
llvm[3]: Compiling AlphaISelLowering.cpp for Release build
cc1plus: /home/duncan/tmp/tmp/llvm/lib/CodeGen/SelectionDAG/SelectionDAG.cpp:4982: void llvm::SelectionDAG::ReplaceAllUsesWith(llvm::SDNode*, llvm::SDNode*, llvm::SelectionDAG::DAGUpdateListener*): Assertion `(!From->hasAnyUseOfValue(i) || From->getValueType(i) == To->getValueType(i)) && "Cannot use this version of ReplaceAllUsesWith!"' failed.
Stack dump:
0. Running pass 'X86 DAG->DAG Instruction Selection' on function '@_ZN4llvm19AlphaTargetLowering14LowerOperationENS_7SDValueERNS_12SelectionDAGE'
g++: Internal error: Aborted (program cc1plus)
This occurs when building LLVM using LLVM built by LLVM (via
dragonegg). Probably LLVM has miscompiled itself, though it
may have miscompiled GCC and/or dragonegg itself: at this point
of the self-host build, all of GCC, LLVM and dragonegg were built
using LLVM. Unfortunately this kind of thing is extremely hard
to debug, and while I did rummage around a bit I didn't find any
smoking guns, aka obviously miscompiled code.
Found by bisection.
r96556 | evancheng | 2010-02-18 03:13:50 +0100 (Thu, 18 Feb 2010) | 5 lines
Some dag combiner goodness:
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"
r96640 | evancheng | 2010-02-19 01:34:39 +0100 (Fri, 19 Feb 2010) | 16 lines
Transform (xor (setcc), (setcc)) == / != 1 to
(xor (setcc), (setcc)) != / == 1.
e.g. On x86_64
%0 = icmp eq i32 %x, 0
%1 = icmp eq i32 %y, 0
%2 = xor i1 %1, %0
br i1 %2, label %bb, label %return
=>
testl %edi, %edi
sete %al
testl %esi, %esi
sete %cl
cmpb %al, %cl
je LBB1_2
llvm-svn: 96672
2010-02-19 11:30:41 +00:00
9baeb02000
Use the same encoding for EH stuff uniformly on all MachO targets.
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This hopefulyl should unbreak EH on PPC/Darwin.
llvm-svn: 96637
2010-02-19 00:29:36 +00:00
654528e8a7
Generate DBG_VALUE from dbg.value intrinsics. These currently
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comes out as comments but will eventually generate DWARF.
llvm-svn: 96601
2010-02-18 18:51:15 +00:00
fd47c79774
add a missing type cast.
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llvm-svn: 96574
2010-02-18 06:33:42 +00:00
0ceb68a552
Some dag combiner goodness:
...
Transform br (xor (x, y)) -> br (x != y)
Transform br (xor (xor (x,y), 1)) -> br (x == y)
Also normalize (and (X, 1) == / != 1 -> (and (X, 1)) != / == 0 to match to "test on x86" and "tst on arm"
llvm-svn: 96556
2010-02-18 02:13:50 +00:00
3f48215480
rename and document some arguments so I don't have to keep
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reverse engineering what they are.
llvm-svn: 96456
2010-02-17 06:07:47 +00:00
cf1f5b0286
Use pointer-wide encoding for LSDA and FDE on Darwin.
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Hopefully, this will fix the remaining issues seen there.
llvm-svn: 96454
2010-02-17 05:53:11 +00:00
b67807e7ef
daniel remembered why this was needed.
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llvm-svn: 96440
2010-02-17 01:55:54 +00:00
d8716676ea
add a comment explaining why darwin/i386 uses ## as a comment.
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It's not clear why this is really required, but it was explicitly
added in r48808 with no real explanation or rdar #.
llvm-svn: 96438
2010-02-17 01:38:01 +00:00
12995ba3c0
Make the operand and format specifier match, and print all
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64 bits, fixing a variety of problems.
llvm-svn: 96421
2010-02-17 00:37:20 +00:00
afac7dad21
fix rdar://7653908, a crash on a case where we would fold a load
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into a roundss intrinsic, producing a cyclic dag. The root cause
of this is badness handling ComplexPattern nodes in the old dagisel
that I noticed through inspection. Eliminate a copy of the of the
code that handled ComplexPatterns by making EmitChildMatchCode call
into EmitMatchCode.
llvm-svn: 96408
2010-02-16 22:35:06 +00:00
82b04130cb
Look for SSE and instructions of this form: (and x, (build_vector c1,c2,c3,c4)).
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If there exists a use of a build_vector that's the bitwise complement of the mask,
then transform the node to
(and (xor x, (build_vector -1,-1,-1,-1)), (build_vector ~c1,~c2,~c3,~c4)).
Since this transformation is only useful when 1) the given build_vector will
become a load from constpool, and 2) (and (xor x -1), y) matches to a single
instruction, I decided this is appropriate as a x86 specific transformation.
rdar://7323335
llvm-svn: 96389
2010-02-16 21:09:44 +00:00
9641d06809
Add support for emitting non-temporal stores for DAGs marked
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non-temporal. Fix from r96241 for botched encoding of MOVNTDQ.
Add documentation for !nontemporal metadata.
Add a simpler movnt testcase.
llvm-svn: 96386
2010-02-16 20:50:18 +00:00
d7d8afabd0
Minor warning fixes (semicolons, newline at EOF).
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llvm-svn: 96343
2010-02-16 10:25:04 +00:00
4964ef88c2
make pcrel immediate values relative to the start of the field,
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not the end of the field, fixing rdar://7651978
llvm-svn: 96330
2010-02-16 05:03:17 +00:00
c9adb6a463
Fix a silly darwin-only typo introduced during merge.
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llvm-svn: 96289
2010-02-15 22:38:10 +00:00
ab663a0bfe
Move TLOF implementations to libCodegen to resolve layering violation.
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llvm-svn: 96288
2010-02-15 22:37:53 +00:00
ae4ccc10da
Preliminary patch to improve dwarf EH generation - Hooks to return Personality / FDE / LSDA / TType encoding depending on target / options (e.g. code model / relocation model) - MCIzation of Dwarf EH printer to use encoding information - Stub generation for ELF target (needed for indirect references) - Some other small changes here and there
...
llvm-svn: 96285
2010-02-15 22:35:59 +00:00
bcbaaba532
revert r96241. It breaks two regression tests, isn't documented,
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and the testcase needs improvement.
llvm-svn: 96265
2010-02-15 20:53:01 +00:00
5e73ff2e3a
Split SelectionDAGISel::IsLegalAndProfitableToFold to
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IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.
This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.
llvm-svn: 96255
2010-02-15 19:41:07 +00:00
63cedef74b
Add support for emitting non-temporal stores for DAGs marked
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non-temporal.
llvm-svn: 96241
2010-02-15 17:02:56 +00:00
cbd39c5def
Remove an assumption of default arguments. This is in anticipation of a
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change to SelectionDAG build APIs.
llvm-svn: 96239
2010-02-15 16:57:43 +00:00
ff34702b04
Remove an assumption of default arguments. This is in anticipation of a
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change to SelectionDAG build APIs.
llvm-svn: 96228
2010-02-15 16:53:33 +00:00
9dff9bec31
Uniformize the names of type predicates: rather than having isFloatTy and
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isInteger, we now have isFloatTy and isIntegerTy. Requested by Chris!
llvm-svn: 96223
2010-02-15 16:12:20 +00:00
0a5e0371b0
Forgot to commit the header
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llvm-svn: 96174
2010-02-14 18:25:41 +00:00
ce77ce3072
Drop winmcasminfo and use normal AT&T COFF for all windows targets.
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Otherwise AT&T asm printer is used with non-compatible MCAsmInfo and
there is no way to override this behaviour.
llvm-svn: 96165
2010-02-14 15:19:54 +00:00
406cd61828
teach the encoder to handle pseudo instructions like FP_REG_KILL,
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encoding them into nothing.
llvm-svn: 96110
2010-02-13 19:16:53 +00:00
2610a34b15
X86: Move extended MCFixupKinds into X86FixupKinds.h
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llvm-svn: 96088
2010-02-13 09:27:52 +00:00
f83726f6ba
add encoder support and tests for rdtscp
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llvm-svn: 96076
2010-02-13 03:42:24 +00:00
4d804d794f
Added the rdtscp instruction to the x86 instruction
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tables.
llvm-svn: 96073
2010-02-13 02:06:11 +00:00
3b065cdb64
Teach MachineFrameInfo to track maximum alignment while stack objects are being
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created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.
llvm-svn: 96069
2010-02-13 01:56:41 +00:00
44232af55a
Fixed encodings for invlpg, invept, and invvpid.
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llvm-svn: 96065
2010-02-13 01:48:34 +00:00
509154e0f9
rip out the 'heinous' x86 MCCodeEmitter implementation.
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We still have the templated X86 JIT emitter, *and* the
almost-copy in X86InstrInfo for getting instruction sizes.
llvm-svn: 96059
2010-02-13 00:49:29 +00:00
140caa7240
remove special cases for vmlaunch, vmresume, vmxoff, and swapgs
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fix swapgs to be spelled right.
llvm-svn: 96058
2010-02-13 00:41:14 +00:00
224340cabe
MC/X86: Push immediate operands as immediates not expressions when possible.
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llvm-svn: 96055
2010-02-13 00:17:21 +00:00
064e926362
Remove special cases for [LM]FENCE, MONITOR and MWAIT from
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encoder and decoder by using new MRM_ forms.
llvm-svn: 96048
2010-02-12 23:54:57 +00:00
1e827fd8ca
implement the rest of correct x86-64 encoder support for
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rip-relative addresses, and add a testcase.
llvm-svn: 96040
2010-02-12 23:24:09 +00:00
741580a5bd
give MCCodeEmitters access to the current MCContext.
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llvm-svn: 96038
2010-02-12 23:12:47 +00:00
4ad96055fb
implement infrastructure to support fixups for rip-rel
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addressing. This isn't complete because I need an MCContext
to generate new MCExprs.
llvm-svn: 96036
2010-02-12 23:00:36 +00:00
d18320361f
pull the rip-relative addressing mode case up early.
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llvm-svn: 96031
2010-02-12 22:47:55 +00:00
6c1c0141be
fixme resolved!
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llvm-svn: 96029
2010-02-12 22:39:06 +00:00
0055e75249
start producing reloc_pcrel_4byte/reloc_pcrel_1byte for calls.
...
llvm-svn: 96028
2010-02-12 22:36:47 +00:00
12455ca03d
enhance the immediate field encoding to know whether the immediate
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is pc relative or not, mark call and branches as pcrel.
llvm-svn: 96026
2010-02-12 22:27:07 +00:00
392be58cad
Add support for a union type in LLVM IR. Patch by Talin!
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llvm-svn: 96011
2010-02-12 20:49:41 +00:00
c3c357006e
Setup correct data layout to match gcc's expectations on mingw32.
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llvm-svn: 95981
2010-02-12 15:28:56 +00:00
c9276dfe04
Cleanup stdcall / fastcall name mangling.
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This should fix alot of problems we saw so far, e.g. PRs 5851 & 2936
llvm-svn: 95980
2010-02-12 15:28:40 +00:00
f7477e599f
add a bunch of mod/rm encoding types for fixed mod/rm bytes.
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This will work better for the disassembler for modeling things
like lfence/monitor/vmcall etc.
llvm-svn: 95960
2010-02-12 02:06:33 +00:00
44ac89f517
revert r95949, it turns out that adding new prefixes is not a
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great solution for the disassembler, we'll go with "plan b".
llvm-svn: 95957
2010-02-12 01:55:31 +00:00
d7e9212e2d
X86: Fix definition for RCL/RCR.*m? operations -- they were getting represented
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with "tied memory operands", which is wrong.
llvm-svn: 95950
2010-02-12 01:22:03 +00:00
336f9abb45
add another bit of space for new kinds of instruction prefixes.
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llvm-svn: 95949
2010-02-12 01:15:16 +00:00
c780af6471
Add a missing pattern for movhps so that we get:
...
movq (%ecx,%edx,2), %xmm2
movhps (%ecx,%eax,2), %xmm2
rather than:
movq (%eax, %edx, 2), %xmm2
movq (%eax, %ebx, 2), %xmm3
movlhps %xmm3, %xmm2
Testcase forthcoming.
llvm-svn: 95948
2010-02-12 01:10:45 +00:00
1572e760bc
fix the encodings of monitor and mwait, which were completely
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busted in both encoders. I'm not bothering to fix it in the
old one at this point.
llvm-svn: 95947
2010-02-12 01:06:22 +00:00
b1913c4df9
enhance llvm-mc -show-inst to print the enum of an instruction, like so:
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testb %al, %al ## <MCInst #2412 TEST8rr
## <MCOperand Reg:2>
## <MCOperand Reg:2>>
jne LBB1_7 ## <MCInst #938 JNE_1
## <MCOperand Expr:(LBB1_7)>>
llvm-svn: 95935
2010-02-11 22:57:32 +00:00
524138176d
add a new MCInstPrinter::getOpcodeName interface, when it is
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implemented, llvm-mc --show-inst now uses it to print the
instruction opcode as well as the number.
llvm-svn: 95929
2010-02-11 22:39:10 +00:00
b8af65ed0b
improve encoding information for branches. We now know they have
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8 or 32-bit immediates, which allows the new encoder to handle
them.
llvm-svn: 95927
2010-02-11 21:45:31 +00:00
ddeceae839
make getFixupKindInfo return a const reference, allowing
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the tables to be const. Teach MCCodeEmitter to handle
the target-indep kinds so that we don't crash on them.
llvm-svn: 95924
2010-02-11 21:27:18 +00:00
2a34015abc
switch to target-indep fixups for 1/2/4/8 byte data.
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llvm-svn: 95920
2010-02-11 21:17:54 +00:00
1f298326b0
unbreak the build.
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llvm-svn: 95915
2010-02-11 19:52:11 +00:00
2b0a7a2592
refactor the conditional jump instructions in the .td file to
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use a multipattern that generates both the 1-byte and 4-byte
versions from the same defm
llvm-svn: 95901
2010-02-11 19:25:55 +00:00
fbf1f02fee
dont' call getX86RegNum on X86::RIP, it doesn't like that. This
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fixes the remaining x86-64 jit failures afaik.
llvm-svn: 95867
2010-02-11 08:45:56 +00:00
5a4ec879bf
fix a really nasty bug I introduced in r95693: r12 (and r12d,
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r12b, etc) also encodes to a R/M value of 4, which is just
as illegal as ESP/RSP for the non-sib version an address.
This fixes x86-64 jit miscompilations of a bunch of programs.
llvm-svn: 95866
2010-02-11 08:41:21 +00:00
6bb2463f85
Add and commonize encoder support for all immediates.
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Stub out some dummy fixups to make things work.
We can now emit fixups like this:
subl $20, %esp ## encoding: [0x83,0xec,A]
## fixup A - offset: 2, value: 20, kind: fixup_1byte_imm
Emitting $20 as a single-byte fixup to be later resolved
by the assembler is ridiculous of course (vs just emitting
the byte) but this is a failure of the matcher, which
should be producing an imm of 20, not an MCExpr of 20.
llvm-svn: 95860
2010-02-11 07:06:31 +00:00
167842f90b
generalize EmitDisplacementField to work with any size
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and rename it to EmitImmediate.
llvm-svn: 95859
2010-02-11 06:54:23 +00:00
3555993312
eliminate the dead IsPCRel argument.
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llvm-svn: 95858
2010-02-11 06:51:36 +00:00
5a40e6c95c
eliminate the dead "PCAdj" logic.
...
llvm-svn: 95857
2010-02-11 06:49:52 +00:00
5b77f0dac1
The previous fix of widening divides that trap was too fragile as it depends on custom
...
lowering and requires that certain types exist in ValueTypes.h. Modified widening to
check if an op can trap and if so, the widening algorithm will apply only the op on
the defined elements. It is safer to do this in widening because the optimizer can't
guarantee removing unused ops in some cases.
llvm-svn: 95823
2010-02-10 23:37:45 +00:00
4d4c6944e9
A few missed optimizations; the last one could have a significant impact on
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code with lots of bitfields.
llvm-svn: 95809
2010-02-10 21:26:04 +00:00
3e0c9790f2
MC/X86 AsmMatcher: Fix a use after free spotted by d0k, and de-XFAIL
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x86_32-encoding.s in on expectation of it passing.
llvm-svn: 95806
2010-02-10 21:19:28 +00:00
4a618827de
Fix "the the" and similar typos.
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llvm-svn: 95781
2010-02-10 16:03:48 +00:00
de03bd0ab4
emit some simple (and probably incorrect) fixups for symbolic
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displacement values.
llvm-svn: 95773
2010-02-10 06:52:12 +00:00
f58d0074d7
keep track of what the current byte being emitted is
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throughout the X86 encoder.
llvm-svn: 95771
2010-02-10 06:41:02 +00:00
a725d785a9
simplify displacement handling, emit displacements by-operand
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even for the immediate case. No functionality change.
llvm-svn: 95770
2010-02-10 06:30:00 +00:00
605474463f
MC: Switch MCFixup to just hold an MCExpr pointer instead of index into the
...
MCInst it came from.
llvm-svn: 95767
2010-02-10 04:47:08 +00:00
ff68a42121
print all the newlines at the end of instructions with
...
OutStreamer.AddBlankLine instead of textually.
llvm-svn: 95734
2010-02-10 00:36:00 +00:00
a7c1d6cfd1
Fix the encoding of the movntdqa X86 instruction. It was missing the 0x66
...
prefix which is part of the opcode encoding.
llvm-svn: 95729
2010-02-10 00:10:31 +00:00
482bf69bfe
Add ability for MCInstPrinters to add comments for instructions.
...
Enhance the x86 backend to show the hex values of immediates in
comments when they are large. For example:
movl $1072693248, 4(%esp) ## imm = 0x3FF00000
llvm-svn: 95728
2010-02-10 00:10:18 +00:00
509be1fe5e
TableGen fragment refactoring.
...
Move some utility TableGen defs, classes, etc. into a common file so
they may be used my multiple pattern files. We will use this for
the AVX specification to help with the transition from the current
SSE specification.
llvm-svn: 95727
2010-02-09 23:52:19 +00:00
0e42dc0dac
MC/X86: Add a dummy implementation of MCFixup generation for hacky X86 MCCodeEmitter.
...
llvm-svn: 95709
2010-02-09 23:00:03 +00:00
b311a6b3ae
MC: First cut at MCFixup, for getting fixup/relocation information out of an MCCodeEmitter.
...
llvm-svn: 95708
2010-02-09 22:59:55 +00:00
8aef06f8eb
port encoder enhancements over to the new encoder.
...
llvm-svn: 95699
2010-02-09 21:57:34 +00:00
0c3b66cd87
fix X86 encoder to output [disp] only addresses with no SIB byte
...
in X86-32 mode. This is still required in x86-64 mode to avoid
forming [disp+rip] encoding. Rewrite the SIB byte decision logic
to be actually understandable.
llvm-svn: 95693
2010-02-09 21:47:19 +00:00
45d89644ae
revert r95689: getX86RegNum(BaseReg) != N86::ESP is
...
a confusing idiom to check for ESP or RSP.
llvm-svn: 95690
2010-02-09 21:21:26 +00:00
e464a4d815
simplify.
...
llvm-svn: 95689
2010-02-09 21:00:12 +00:00
b06015aa69
move target-independent opcodes out of TargetInstrInfo
...
into TargetOpcodes.h. #include the new TargetOpcodes.h
into MachineInstr. Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the
codebase.
llvm-svn: 95687
2010-02-09 19:54:29 +00:00
f5f335da37
move PR3462 to here.
...
llvm-svn: 95650
2010-02-09 05:55:14 +00:00
cf11e602a2
add a note from PR6194
...
llvm-svn: 95649
2010-02-09 05:45:29 +00:00
d00faaa9c7
Implement x86 asm parsing support for %st and %st(4)
...
llvm-svn: 95634
2010-02-09 00:49:22 +00:00
60db0a6ba5
pass stringref by value instead of by const&
...
llvm-svn: 95627
2010-02-09 00:34:28 +00:00
d9d7186dc0
unify the paths for external symbols and global variables:
...
2 files changed, 48 insertions(+), 83 deletions(-)
llvm-svn: 95599
2010-02-08 23:03:41 +00:00
99777dd78f
switch the rest of the "@ concatentation" logic in the X86
...
backend to use X86MCTargetExpr, simplifying a bunch of code.
llvm-svn: 95595
2010-02-08 22:52:47 +00:00
4d16049c61
Fixed the AT&T AsmLexer to report the proper strings
...
for register tokens. Before, if it encountered
'%al,' it would report 'al,' as the token. Now it
correctly reports '%al'.
llvm-svn: 95594
2010-02-08 22:50:23 +00:00
b8479fb309
switch ELF @GOTOFF references to use X86MCTargetExpr.
...
llvm-svn: 95593
2010-02-08 22:33:55 +00:00
b6b2164e28
add an x86 implementation of MCTargetExpr for
...
representing @GOT and friends. Use it for
personality references as a first use.
llvm-svn: 95588
2010-02-08 22:09:08 +00:00
3464a5b609
Rename the PerformTailCallOpt variable to GuaranteedTailCallOpt to reflect
...
its current purpose.
llvm-svn: 95564
2010-02-08 20:27:50 +00:00
6e29e9d262
Fix x86 JIT stub on MSVC.
...
Thanks to Kristaps Straupe for noticing the bug.
llvm-svn: 95537
2010-02-08 08:37:27 +00:00
ea5c6be766
Run codegen dce pass for all targets at all optimization levels. Previously it's
...
only run for x86 with fastisel. I've found it being very effective in
eliminating some obvious dead code as result of formal parameter lowering
especially when tail call optimization eliminated the need for some of the loads
from fixed frame objects. It also shrinks a number of the tests. A couple of
tests no longer make sense and are now eliminated.
llvm-svn: 95493
2010-02-06 09:07:11 +00:00
d064aefefc
Do not emit callseq instructions around sibcalls. This eliminated some unnecessary stack adjustments.
...
llvm-svn: 95475
2010-02-06 03:28:46 +00:00
9d624778a3
fix incorrect encoding of SBB8mi that Kevin noticed.
...
llvm-svn: 95448
2010-02-05 22:56:11 +00:00
d91f302a05
fix a case where we'd mis-encode fisttp because of an incorrect (and
...
redundant with a correct one) pattern that was added for the disassembler.
llvm-svn: 95446
2010-02-05 22:49:06 +00:00
a60af09414
add note.
...
llvm-svn: 95445
2010-02-05 22:48:33 +00:00
58827ff98e
port X86InstrInfo::determineREX over to the new encoder.
...
llvm-svn: 95440
2010-02-05 22:10:22 +00:00
9c9453e582
wire up 64-bit MCCodeEmitter.
...
llvm-svn: 95438
2010-02-05 21:51:35 +00:00
86bd194234
really kill off the last MRMInitReg inst, remove logic from encoder.
...
llvm-svn: 95437
2010-02-05 21:34:18 +00:00
e96d534ce0
lower the last of the MRMInitReg instructions in MCInstLower.
...
llvm-svn: 95435
2010-02-05 21:30:49 +00:00
90916287ed
teach X86MCInstLower to lower the MOV32r0 and MOV8r0
...
pseudo instructions.
llvm-svn: 95433
2010-02-05 21:21:06 +00:00
fd7976a432
genericize helpers, use them for MOV16r0/MOV64r0
...
llvm-svn: 95432
2010-02-05 21:15:57 +00:00
340b542f8b
factor code better in X86MCInstLower::Lower, teach it to
...
lower the SETB* instructions.
llvm-svn: 95431
2010-02-05 21:13:48 +00:00
89f7dfff21
implement the rest of the encoding types.
...
llvm-svn: 95414
2010-02-05 19:37:31 +00:00
503243559a
move functions for decoding X86II values into the X86II namespace.
...
llvm-svn: 95410
2010-02-05 19:24:13 +00:00
342762fdba
constant propagate a method away.
...
llvm-svn: 95408
2010-02-05 19:20:30 +00:00
b8d375fd21
change getSizeOfImm and getBaseOpcodeFor to just take
...
TSFlags directly instead of a TargetInstrDesc.
llvm-svn: 95405
2010-02-05 19:16:26 +00:00
37166eb419
add some more encodings.
...
llvm-svn: 95403
2010-02-05 19:04:37 +00:00
df84b1aa50
implement the non-relocation forms of memory operands
...
llvm-svn: 95368
2010-02-05 06:16:07 +00:00
a366c61f77
Handle tail call with byval arguments.
...
llvm-svn: 95351
2010-02-05 02:21:12 +00:00
610c84a7c2
start adding MRMDestMem, which requires memory form mod/rm encoding
...
to start limping.
llvm-svn: 95350
2010-02-05 02:18:40 +00:00
4f627ba89f
Add a few more encodings, we can now encode all of:
...
pushl %ebp
movl %esp, %ebp
movl $42, %eax
popl %ebp
ret
llvm-svn: 95344
2010-02-05 01:53:19 +00:00
ee9d33b4e7
Disable external stubs for X86-32 and X86-64
...
Instruction selection for X86 now can choose an instruction
sequence that will fit any address of any symbol, no matter
the pointer width. X86-64 uses a mov+call-via-reg sequence
for this.
llvm-svn: 95323
2010-02-04 19:56:59 +00:00
fb5670fc16
move the PR6214 microoptzn to this file.
...
llvm-svn: 95299
2010-02-04 07:32:01 +00:00
aeba2250a5
Re-enable x86 tail call optimization.
...
llvm-svn: 95295
2010-02-04 06:47:24 +00:00
9976832a05
Indirect tail call has to go through a call preserved register since it's after callee register pops. X86 isel lowering is using EAX / R11 and it was somehow adding that to function live out. That prevented the real function return register from being added to the function live out list and bad things happen.
...
This fixes 483.xalancbmk (with tail call opt).
llvm-svn: 95280
2010-02-04 02:40:39 +00:00
c337d6538a
Rewrite FP constant handling in DEBUG_VALUE yet
...
again, so it more or less handles long double.
Restore \n removed in latest MC frenzy.
llvm-svn: 95271
2010-02-04 01:33:43 +00:00
223084d3ac
enhance new encoder to support prefixes + RawFrm
...
instructions with no operands. It can now handle
define void @test2() nounwind { ret void }
llvm-svn: 95261
2010-02-03 21:57:59 +00:00
6794f9b9f6
set up some infrastructure, some minor cleanups.
...
llvm-svn: 95260
2010-02-03 21:43:43 +00:00
f4139067ee
Speculatively disable x86 automatic tail call optimization while we track down a self-hosting issue.
...
llvm-svn: 95259
2010-02-03 21:40:40 +00:00
f914be06d2
stub out a new X86 encoder, which can be tried with
...
-enable-new-x86-encoder until its stable.
llvm-svn: 95256
2010-02-03 21:24:49 +00:00
2f750f3b5a
rename createX86MCCodeEmitter to more accurately reflect what it creates.
...
llvm-svn: 95254
2010-02-03 21:14:33 +00:00
00f1e6c030
Added support for X86 instruction prefixes so llvm-mc can assemble them. The
...
Lock prefix, Repeat string operation prefixes and the Segment override prefixes.
Also added versions of the move string and store string instructions without the
repeat prefixes to X86InstrInfo.td. And finally marked the rep versions of
move/store string records in X86InstrInfo.td as isCodeGenOnly = 1 so tblgen is
happy building the disassembler files.
llvm-svn: 95252
2010-02-03 21:04:42 +00:00
3bcbdb8a28
reapply r95206, this time actually delete the code I'm replacing in the third stub case.
...
llvm-svn: 95209
2010-02-03 06:42:38 +00:00
37fad99a05
revert r95206, it is apparently causing bootstrap failure on i386-darwin9
...
llvm-svn: 95208
2010-02-03 06:41:18 +00:00
3eef965b06
make the x86 backend emit darwin stubs through mcstreamer
...
instead of textually.
llvm-svn: 95206
2010-02-03 06:21:16 +00:00
082f484074
make MachineModuleInfoMachO hold non-const MCSymbol*'s instead
...
of const ones. non-const ones aren't very useful, because you can't
even, say, emit them.
llvm-svn: 95205
2010-02-03 06:18:30 +00:00
40905b4302
Allow all types of callee's to be tail called. But avoid automatic tailcall if the callee is a result of bitcast to avoid losing necessary zext / sext etc.
...
llvm-svn: 95195
2010-02-03 03:28:02 +00:00
0b78cc2af5
don't emit \n's at the start of X86AsmPrinter::runOnMachineFunction,
...
.o files don't like that.
llvm-svn: 95187
2010-02-03 01:49:49 +00:00
183ef68ef7
Finally eliminate printMCInst and send instructions through
...
the streamer. Demo:
$ cat t.ll
define i32 @test() nounwind {
ret i32 42
}
$ llc t.ll -o -
...
_test:
movl $42, %eax
ret
$ llc t.ll -o t.o -filetype=obj
$ otool -tv t.o
t.o:
(__TEXT,__text) section
_test:
00000000 movl $0x0000002a,%eax
00000005 ret
llvm-svn: 95179
2010-02-03 01:13:25 +00:00
996ec840d0
rejigger the world so that EmitInstruction prints the \n at
...
the end of the instruction instead of expecting the caller to
do it. This currently causes the asm-verbose instruction
comments to be on the next line.
llvm-svn: 95178
2010-02-03 01:09:55 +00:00
41ad1905c9
sink handling of target-independent machine instrs (other
...
than DEBUG_VALUE :( ) into the target indep AsmPrinter.cpp
file. This allows elimination of the
NO_ASM_WRITER_BOILERPLATE hack among other things.
llvm-svn: 95177
2010-02-03 01:00:52 +00:00
55e768c99a
Print FPImm a less kludgy way; APFloat.toString seems
...
to have some problems anyway.
llvm-svn: 95171
2010-02-03 00:36:40 +00:00
5f238a9650
ByVal frame object size should be that of the byval argument, not the size of the type which is just a pointer. This is not known to break stuff but is wrong nevertheless.
...
llvm-svn: 95163
2010-02-02 23:58:13 +00:00
6f36a083ef
Revert 95130.
...
llvm-svn: 95160
2010-02-02 23:55:14 +00:00
b3cfc2b77c
Accept floating point immediates in DEBUG_VALUE.
...
llvm-svn: 95159
2010-02-02 23:54:23 +00:00
bdbffbedf0
AsmParser/X86: Add temporary hack to allow parsing "sal". Eventually we need
...
some mechanism for specifying alternative syntaxes, but I'm not sure what form
that should take yet.
llvm-svn: 95158
2010-02-02 23:46:47 +00:00
b0d44c3807
refactor code so that LLVMTargetMachine creates the asmstreamer and
...
mccontext instead of having AsmPrinter do it. This allows other
types of MCStreamer's to be passed in.
llvm-svn: 95155
2010-02-02 23:37:42 +00:00
6a6137832d
remove dead code.
...
llvm-svn: 95144
2010-02-02 22:03:00 +00:00
3184f22447
MCAsmParser/X86: Represent absolute memory operands as CodeGen does, with scale
...
== 1.
llvm-svn: 95137
2010-02-02 21:44:16 +00:00
d28d6db735
MCCodeEmitter/X86: Handle tied registers better when converting MCInst ->
...
MCMachineInstr. This also fixes handling of tied registers for MRMSrcMem
instructions.
llvm-svn: 95136
2010-02-02 21:44:10 +00:00
0cd6c2a047
eliminate all the dead addSimpleCodeEmitter implementations.
...
eliminate random "code emitter" stuff in Alpha, except for
the JIT path. Next up, remove the template cruft.
llvm-svn: 95131
2010-02-02 21:31:47 +00:00
c1b0116ff1
Pass callsite return type to TargetLowering::LowerCall and use that to check sibcall eligibility.
...
llvm-svn: 95130
2010-02-02 21:29:10 +00:00
55afd2564c
Perform sibcall in some cases when arguments are passes memory. Look for cases
...
where callee's arguments are already in the caller's own caller's stack and
they line up perfectly. e.g.
extern int foo(int a, int b, int c);
int bar(int a, int b, int c) {
return foo(a, b, c);
}
llvm-svn: 95053
2010-02-02 02:22:50 +00:00
a49d8e6d38
Fix PR6196. GV callee may not be a function.
...
llvm-svn: 95017
2010-02-01 22:40:09 +00:00
ed8ca56eeb
Undo r94946 now all the tests are passing again.
...
llvm-svn: 94970
2010-02-01 02:13:39 +00:00
b33dbc5019
Change TAILJMP's to be varargs and transfer implicit uses over from TCRETURN's. Otherwise the missing uses can make post-regalloc scheduling do bad things. This fixes 403.gcc.
...
llvm-svn: 94950
2010-01-31 07:28:44 +00:00
9adc6f46cf
Fix a missing check from my last commit.
...
llvm-svn: 94949
2010-01-31 07:27:31 +00:00
7f62def0f9
Avoid recursive sibcall's.
...
llvm-svn: 94946
2010-01-31 06:44:49 +00:00
9aeccadce4
Moved InstallLexer() from the X86-specific AsmLexer
...
to the TargetAsmLexer class so that clients can
actually use the TargetAsmLexer they get from a
Target.
llvm-svn: 94940
2010-01-31 02:28:18 +00:00
70f714fdbe
Allow more tailcall optimization: calls with inputs that are all passed in registers.
...
llvm-svn: 94873
2010-01-30 01:22:00 +00:00
2d5a75b42a
Don't forget to transfer target flag when inserting a tailcall instruction.
...
llvm-svn: 94872
2010-01-30 01:16:15 +00:00
76e5d70c57
MC/X86 AsmParser: Handle absolute memory operands correctly. We were doing
...
something totally broken and parsing them as immediates, but the .td file also
had the wrong match class so things sortof worked. Except, that is, that we
would parse
movl $0, %eax
as
movl 0, %eax
Feel free to guess how well that worked.
llvm-svn: 94869
2010-01-30 01:02:48 +00:00
f05d00787a
X86.td: Refactor to bring operands that use print_pcrel_imm together.
...
llvm-svn: 94861
2010-01-30 00:24:12 +00:00
a97adee959
AsmMatcher/X86: Separate out sublass for memory operands that have no segment
...
register, and use to cleanup a FIXME in X86AsmParser.cpp.
llvm-svn: 94859
2010-01-30 00:24:00 +00:00
ad00f03e86
Add assertion to humor the paranoid.
...
llvm-svn: 94843
2010-01-29 21:21:28 +00:00
297a494f55
Catch more trivial tail call opportunities: no inputs and output types match.
...
llvm-svn: 94804
2010-01-29 06:45:59 +00:00
82436d1666
Added a custom TableGen backend to support the
...
enhanced disassembler, and the necessary makefile
rules to build the table for X86.
llvm-svn: 94764
2010-01-29 00:21:04 +00:00
346af88396
Fix a bug introduced by r94490 where it created a X86ISD::CMP whose output type is different from its inputs.
...
This fixes PR6146.
llvm-svn: 94731
2010-01-28 01:57:22 +00:00
94a946cac4
Remove the argument from EmitJumpTableInfo, because it doesn't need it.
...
Move the X86 implementation of function body emission up to
AsmPrinter::EmitFunctionBody, which works by calling the virtual
EmitInstruction method.
llvm-svn: 94716
2010-01-28 01:02:27 +00:00
77b108e17b
Treat MO_REG 0 location as undefined in DEBUG_VALUE,
...
per document.
llvm-svn: 94693
2010-01-27 22:11:16 +00:00
091217be6f
Kill ModuleProvider and ghost linkage by inverting the relationship between
...
Modules and ModuleProviders. Because the "ModuleProvider" simply materializes
GlobalValues now, and doesn't provide modules, it's renamed to
"GVMaterializer". Code that used to need a ModuleProvider to materialize
Functions can now materialize the Functions directly. Functions no longer use a
magic linkage to record that they're materializable; they simply ask the
GVMaterializer.
Because the C ABI must never change, we can't remove LLVMModuleProviderRef or
the functions that refer to it. Instead, because Module now exposes the same
functionality ModuleProvider used to, we store a Module* in any
LLVMModuleProviderRef and translate in the wrapper methods. The bindings to
other languages still use the ModuleProvider concept. It would probably be
worth some time to update them to follow the C++ more closely, but I don't
intend to do it.
Fixes http://llvm.org/PR5737 and http://llvm.org/PR5735 .
llvm-svn: 94686
2010-01-27 20:34:15 +00:00
85476f304c
Perform trivial tail call optimization for callees with "C" ABI. These are done
...
even when -tailcallopt is not specified and it does not require changing ABI.
First case is the most trivial one. Perform tail call optimization when both
the caller and callee do not return values and when the callee does not take
any input arguments.
llvm-svn: 94664
2010-01-27 06:25:16 +00:00
67a69dd2ed
Eliminate target hook IsEligibleForTailCallOptimization.
...
Target independent isel should always pass along the "tail call" property. Change
target hook LowerCall's parameter "isTailCall" into a refernce. If the target
decides it's impossible to honor the tail call request, it should set isTailCall
to false to make target independent isel happy.
llvm-svn: 94626
2010-01-27 00:07:07 +00:00
d10089a5b4
Restore to pre-94570 state.
...
llvm-svn: 94625
2010-01-27 00:00:57 +00:00
75766332f9
Ignore 'forced' tailcall opt in fastisel mode.
...
llvm-svn: 94617
2010-01-26 23:28:40 +00:00
c7b91156e4
now that enough stuff is constified, move function header printing
...
logic up from X86 into the common code. The other targets will
hopefully start using this soon.
llvm-svn: 94614
2010-01-26 23:18:44 +00:00
f13e5f7323
constify a method argument.
...
llvm-svn: 94612
2010-01-26 23:15:09 +00:00
1b7b9e852c
Delete blank lines that bug me.
...
llvm-svn: 94610
2010-01-26 23:07:57 +00:00
ff234e09b9
Eliminate SetDirective, and replace it with HasSetDirective.
...
Default HasSetDirective to true, since most targets have it.
The targets that claim to not have it probably do, or it is
spelled differently. These include Blackfin, Mips, Alpha, and
PIC16. All of these except pic16 are normal ELF targets, so
they almost certainly have it.
llvm-svn: 94585
2010-01-26 20:40:54 +00:00
Evan Cheng