Commit Graph

298690 Commits

Author SHA1 Message Date
David Green e27e87cdcb [CGP] Ensure splitgep gives deterministic output
The output of splitLargeGEPOffsets does not appear to be deterministic because
of the way that we iterate over a DenseMap. I've changed it to a MapVector for
consistent output.

The test here isn't particularly great, only showing a consmetic difference in
output. The original reproducer is much larger but show a diffierence in
instruction ordering, leading to different codegen.

Differential Revision: https://reviews.llvm.org/D51851

llvm-svn: 342043
2018-09-12 10:19:10 +00:00
Raphael Isemann 10fb677285 Add a basic test for 'memory region'
Summary:
The 'memory region' command is at the moment not tested at all by our test suite.
This patch just adds a basic test that at least provides some basic testing.

Reviewers: #lldb, davide

Reviewed By: #lldb, davide

Subscribers: vsk, davide, lldb-commits

Differential Revision: https://reviews.llvm.org/D51930

llvm-svn: 342042
2018-09-12 10:04:25 +00:00
Benjamin Kramer 5265d56c72 [clang-tidy] Abseil: Add more directories that are slated for future absl expansion.
llvm-svn: 342041
2018-09-12 10:04:16 +00:00
Sam Parker 1187911b0b [ARM] Follow-up to rL342033
Fixed typo which can cause segfault.

llvm-svn: 342040
2018-09-12 09:58:56 +00:00
David Green 2352b30c96 [SimplifyCFG] Put an alignment on generated switch tables
Previously the alignment on the newly created switch table data was not set,
meaning that DataLayout::getPreferredAlignment was free to overalign it to 16
bytes. This causes unnecessary code bloat.

Differential Revision: https://reviews.llvm.org/D51800

llvm-svn: 342039
2018-09-12 09:54:17 +00:00
Sander de Smalen 7140363cd0 [AArch64] NFC: Refactoring to prepare for vector PCS.
This patch refactors several parts of AArch64FrameLowering
so that it can be easily extended to support saving/restoring
of FPR128 (Q) registers.

Reviewers: t.p.northover, gberry, thegameg, rengolin, javed.absar

Reviewed By: thegameg

Differential Revision: https://reviews.llvm.org/D51478

llvm-svn: 342038
2018-09-12 09:44:46 +00:00
Heejin Ahn 386d272387 [clangd] Add missing clangBasic target_link_libraries
Without this, builds with `-DSHARED_LIB=ON` fail.

llvm-svn: 342037
2018-09-12 09:40:13 +00:00
Kirill Bobyrev 03a9aa8f67 Fix buildbots after r342027
llvm-svn: 342036
2018-09-12 09:27:55 +00:00
Clement Courbet 903667e956 [llvm-exegesis][NFC]Remove dead function parameter
llvm-svn: 342035
2018-09-12 09:26:32 +00:00
Mikhail Maltsev e04ab4fe97 [CodeGen][ARM] Coerce FP16 vectors to integer vectors when needed
Summary:
On targets that do not support FP16 natively LLVM currently legalizes
vectors of FP16 values by scalarizing them and promoting to FP32. This
causes problems for the following code:

  void foo(int, ...);

  typedef __attribute__((neon_vector_type(4))) __fp16 float16x4_t;
  void bar(float16x4_t x) {
    foo(42, x);
  }

According to the AAPCS (appendix A.2) float16x4_t is a containerized
vector fundamental type, so 'foo' expects that the 4 16-bit FP values
are packed into 2 32-bit registers, but instead bar promotes them to
4 single precision values.

Since we already handle scalar FP16 values in the frontend by
bitcasting them to/from integers, this patch adds similar handling for
vector types and homogeneous FP16 vector aggregates.

One existing test required some adjustments because we now generate
more bitcasts (so the patch changes the test to target a machine with
native FP16 support).

Reviewers: eli.friedman, olista01, SjoerdMeijer, javed.absar, efriedma

Reviewed By: javed.absar, efriedma

Subscribers: efriedma, kristof.beyls, cfe-commits, chrib

Differential Revision: https://reviews.llvm.org/D50507

llvm-svn: 342034
2018-09-12 09:19:19 +00:00
Sam Parker a023c7a9cb [ARM] Exchange MAC operands in ARMParallelDSP
SMLAD and SMLALD instructions also come in the form of SMLADX and
SMLALDX which perform an exchange on their second operand. To support
this, more of the loads in the MAC candidates are compared for
sequential access and a boolean value has been added to BinOpChain.

AddMACCandiate has been refactored into a small pattern matching
state machine to reduce the amount of duplicated code, but also to
enable the matching to be more flexible. CreateParallelMACPairs now
iterates through all the candidates to find parallel ones.

Differential Revision: https://reviews.llvm.org/D51424

llvm-svn: 342033
2018-09-12 09:17:44 +00:00
Sam Parker 569b24549e [ARM] Allow bitcasts in ARMCodeGenPrepare
Allow bitcasts in the use-def chains, treating them as sources.

Differential Revision: https://reviews.llvm.org/D50758

llvm-svn: 342032
2018-09-12 09:11:48 +00:00
Christian Bruel eaf4fd749b Fix Check test to avoid output string mismatch
Differential Revision: http://reviews.llvm.org/D51354

llvm-svn: 342031
2018-09-12 08:59:17 +00:00
Sander de Smalen 4dbc512676 [AArch64] Add parsing of aarch64_vector_pcs attribute.
This patch adds parsing support for the 'aarch64_vector_pcs'
calling convention attribute to calls and function declarations.

More information describing the vector ABI and procedure call standard
can be found here:

  https://developer.arm.com/products/software-development-tools/\
                            hpc/arm-compiler-for-hpc/vector-function-abi

Reviewers: t.p.northover, rnk, rengolin, javed.absar, thegameg, SjoerdMeijer

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D51477

llvm-svn: 342030
2018-09-12 08:54:06 +00:00
Pavel Labath c9463097d9 Reduce alignment on struct XSAVE, fixing a gcc warning
The warning is about heap-allocating a struct with bigger alignment
requirements than the standard heap allocator provides.

AFAICT, all uses of the XSAVE struct are already heap-allocated, so this
high alignment does not actually have any effect and removing it should
be NFC.

I have also done some digging in the commit history. This alignment
requirement was since the XSAVE struct was introduced in r180572 when
adding AVX register support for linux. It does not mention the alignment
specifically, so I am guessing this was just put there because the
corresponging XSAVE cpu instruction requires its buffer to be 64-byte
aligned. However, LLDB will not be normally reading this struct via the
XSAVE instruction directly. Instead we will ask the kernel to copy the
buffer saved when suspeding the inferior. This should not require such
strict alignment (in fact, linux kernel will happily do this for any
alignment).

llvm-svn: 342029
2018-09-12 08:50:08 +00:00
Eric Liu 6857692687 [Tooling] Wait for all threads to finish before resetting CWD.
llvm-svn: 342028
2018-09-12 08:29:47 +00:00
Florian Hahn 1086ce2397 [LV] Move InterleaveGroup and InterleavedAccessInfo to VectorUtils.h (NFC)
Move the 2 classes out of LoopVectorize.cpp to make it easier to re-use
them for VPlan outside LoopVectorize.cpp

Reviewers: Ayal, mssimpso, rengolin, dcaballe, mkuper, hsaito, hfinkel, xbolva00

Reviewed By: rengolin, xbolva00

Differential Revision: https://reviews.llvm.org/D49488

llvm-svn: 342027
2018-09-12 08:01:57 +00:00
Kirill Bobyrev 73c201da51 [clangd] Add index benchmarks
This patch introduces index benchmarks on top of the proposed LLVM
benchmark pull.

Reviewed By: sammccall, lebedev.ri

Differential Revision: https://reviews.llvm.org/D51090

llvm-svn: 342026
2018-09-12 07:49:44 +00:00
Kirill Bobyrev e1e19c7b75 [clangd] Implement a Proof-of-Concept tool for symbol index exploration
Reviewed By: sammccall, ilya-biryukov

Differential Revision: https://reviews.llvm.org/D51628

llvm-svn: 342025
2018-09-12 07:32:54 +00:00
Ilya Biryukov 1ea75783fa Remove unused include from IVDescriptors.cpp.
This fixes a layering violation:

Analysis/IVDescrtors.cpp can't include Transforms/Utils/BasicBlockUtils.h,
since TransformUtils depends on Analysis.

llvm-svn: 342024
2018-09-12 07:22:46 +00:00
Ilya Biryukov 95066496d0 Revert "AMDGPU: Move isa version and EF_AMDGPU_MACH_* determination into TargetParser."
This reverts commit r341982.

The change introduced a layering violation. Reverting to unbreak
our integrate.

llvm-svn: 342023
2018-09-12 07:05:30 +00:00
Craig Topper 26a3799858 [SelectionDAG] Remove some code from PromoteIntOp_MGATHER that handles UpdateNodeOperands returning an existing node instead of updating.
I suspect this became unecessary when the CSE of mgather was fixed in r338080. It may still be possible to hit this if we widen the element type of a gather outside of type legalization and the promote the mask of a separate gather node so they become the same. But that seems pretty unlikely.

llvm-svn: 342022
2018-09-12 05:25:41 +00:00
Petr Hosek 8f2499f804 [Driver] Search LibraryPaths when handling -print-file-name
This is necessary to handle the multiarch runtime directories.

Differential Revision: https://reviews.llvm.org/D51573

llvm-svn: 342021
2018-09-12 03:26:10 +00:00
Richard Smith 4034461abd Revert r342019, "Track definition merging on the canonical declaration
even when [...]"

Further testing has revealed that this causes build breaks during
explicit module compilations.

llvm-svn: 342020
2018-09-12 02:28:14 +00:00
Richard Smith e731d9acff Track definition merging on the canonical declaration even when local
submodule visibility is disabled.

Attempting to pick a specific declaration to make visible when the
module containing the merged declaration becomes visible is error-prone,
as we don't yet know which declaration we'll choose to be the definition
when we are informed of the merging.

llvm-svn: 342019
2018-09-12 02:13:48 +00:00
Richard Smith c457766c6d Consistently create a new declaration when merging a pre-existing but
hidden definition with a would-be-parsed redefinition.

This permits a bunch of cleanups. In particular, we no longer need to
take merged definitions into account when checking declaration
visibility, only when checking definition visibility, which makes
certain visibility checks take linear instead of quadratic time.

We could also now remove the UPD_DECL_EXPORTED update record and track
on each declaration whether it was demoted from a definition (as we
already do for variables), but I'm not doing that in this patch to keep
the changes here simpler.

llvm-svn: 342018
2018-09-12 02:13:47 +00:00
Richard Smith 20fbdb347c Fix tracking of merged definitions when the merge target is also merged
into something else.

llvm-svn: 342017
2018-09-12 02:13:46 +00:00
Vikram TV 7e98d69847 Break LoopUtils into an Analysis file.
Summary:
The InductionDescriptor and RecurrenceDescriptor classes basically analyze the IR to identify the respective IVs. So, it is better to have them in the "Analysis" directory instead of the "Transforms" directory.

The rationale for this is to make the Induction and Recurrence descriptor classes available for analysis passes. Currently including them in an analysis pass produces link error (http://lists.llvm.org/pipermail/llvm-dev/2018-July/124456.html).

Induction and Recurrence descriptors are moved from Transforms/Utils/LoopUtils.h|cpp to Analysis/IVDescriptors.h|cpp.

Reviewers: dmgreen, llvm-commits, hfinkel

Reviewed By: dmgreen

Subscribers: mgorny

Differential Revision: https://reviews.llvm.org/D51153

llvm-svn: 342016
2018-09-12 01:59:43 +00:00
Craig Topper dc32e91bc6 [X86] Teach X86SelectionDAGInfo::EmitTargetCodeForMemcpy about GNUX32
Summary:
In GNUX23, is64BitMode returns true, but pointers are 32-bits. So we shouldn't copy pointer values into RSI/RDI since the widths don't match.

Fixes PR38865 despite what the title says. I think the llvm_unreachable in the copyPhysReg code tricked the optimizer and made the fatal error trigger.

Reviewers: rnk, efriedma, MatzeB, echristo

Reviewed By: efriedma

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D51893

llvm-svn: 342015
2018-09-12 01:57:22 +00:00
Kostya Serebryany ee9bb8761c [hwasan] On every use-after-free print a developer note: the index of this heap object in the thread's deallocation ring buffer. Mostly useful to hwasan developers, will hopefully let us know the good size of the deallocation ring buffer
llvm-svn: 342014
2018-09-12 00:58:15 +00:00
Lang Hames ca007b7bc9 [ORC] Remove some unused typedefs.
llvm-svn: 342013
2018-09-12 00:35:03 +00:00
Shuai Wang 79b7ce40af [NFC] Fix build breakage due to missing dep caused by D51950
llvm-svn: 342012
2018-09-12 00:32:13 +00:00
Kostya Serebryany 2362bf7d10 [hwasan] tests for a buffer overflow with a large allocation
llvm-svn: 342011
2018-09-12 00:27:34 +00:00
Eli Friedman efe18d3977 [ScopDetection] Use addUnknown for calls in the AliasSetTracker.
The general-purpose add() now sometimes adds unexpected loop-variant
pointers to the AliasSetTracker, so certain loops would be rejected with
-polly-allow-modref-calls.  Use addUnknown() instead, which has the old
behavior.

I'm not completely convinced the resulting behavior is actually
correct: ScopDetection::isValidAccess seems to mostly ignore
"unknown" instructions in the AliasSetTracker.  But it's not any worse
than what was happening before.

Committing without pre-commit review to unbreak the buildbots; the
following tests were failing:

test/ScopInfo/mod_ref_access_pointee_arguments.ll
test/ScopInfo/mod_ref_read_pointee_arguments.ll
test/ScopInfo/multidim_2d_with_modref_call_2.ll

llvm-svn: 342010
2018-09-11 23:48:14 +00:00
Jessica Paquette 2386eab360 [MachineOutliner] Add codegen size remarks to the MachineOutliner
Since the outliner is a module pass, it doesn't get codegen size remarks like
the other codegen passes do. This adds size remarks *to* the outliner.

This is kind of a workaround, so it's peppered with FIXMEs; size remarks
really ought to not ever be handled by the pass itself. However, since the
outliner is the only "MachineModulePass", this works for now. Since the
entire purpose of the MachineOutliner is to produce code size savings, it
really ought to be included in codgen size remarks.

If we ever go ahead and make a MachineModulePass (say, something similar to
MachineFunctionPass), then all of this ought to be moved there.

llvm-svn: 342009
2018-09-11 23:05:34 +00:00
Vedant Kumar a4529b00e4 [MIPS] Fix signed overflow in DADDIU emulation
This fixes a signed integer overflow diagnostic reported by ubsan.

rdar://44353380

llvm-svn: 342008
2018-09-11 23:04:05 +00:00
Chih-Hung Hsieh 73e04847bf [ELF] Revert "Also demote lazy symbols."
This reverts commit https://reviews.llvm.org/rL330869
for a regression to link Android dex2oatds.

Differential Revision: https://reviews.llvm.org/D51892

llvm-svn: 342007
2018-09-11 23:00:36 +00:00
Shuai Wang f21e8ebb91 [clangtidy] Remove old copy of ExprMutationAnalyzer
Summary:
This is 2/2 of moving ExprMutationAnalyzer from clangtidy to clang/Analysis.
ExprMutationAnalyzer is moved to clang/Analysis in D51948.
This diff migrates existing usages within clangtidy to point to the new
location and remove the old copy of ExprMutationAnalyzer.

Reviewers: george.karpenkov, JonasToth

Reviewed By: george.karpenkov

Subscribers: mgorny, a.sidorin, Szelethus, cfe-commits

Differential Revision: https://reviews.llvm.org/D51950

llvm-svn: 342006
2018-09-11 22:59:46 +00:00
Shuai Wang 96bd44b3d7 [NFC] Fix build breakage caused by D51948
llvm-svn: 342005
2018-09-11 22:41:14 +00:00
Sanjay Patel 1cf0734b2f [InstCombine] add folds for unsigned-overflow compares
Name: op_ugt_sum
  %a = add i8 %x, %y
  %r = icmp ugt i8 %x, %a
  =>
  %notx = xor i8 %x, -1
  %r = icmp ugt i8 %y, %notx

Name: sum_ult_op
  %a = add i8 %x, %y
  %r = icmp ult i8 %a, %x
  =>
  %notx = xor i8 %x, -1
  %r = icmp ugt i8 %y, %notx

https://rise4fun.com/Alive/ZRxI

AFAICT, this doesn't interfere with any add-saturation patterns
because those have >1 use for the 'add'. But this should be
better for IR analysis and codegen in the basic cases.

This is another fold inspired by PR14613:
https://bugs.llvm.org/show_bug.cgi?id=14613

llvm-svn: 342004
2018-09-11 22:40:20 +00:00
Zachary Turner 42e7cc1b0f [PDB] Write FPO Data to the PDB.
llvm-svn: 342003
2018-09-11 22:35:01 +00:00
Reid Kleckner 697d6cb8ee [cmake] Speed up check-llvm 5x by delay loading shell32 and ole32
Summary:
Previously, check-llvm on my Windows 10 workstation took about 300s to
run, and it would lock up my mouse. Now, it takes just under 60s.
Previously running the tests only used about 15% of the available CPU
time, now it uses up to 60%.

Shell32.dll and ole32.dll have direct dependencies on user32.dll and
gdi32.dll. These DLLs are mostly used to for Windows GUI functionality,
which most LLVM tools don't need. It seems that these DLLs acquire and
release some system resources on startup and exit, and that requires
acquiring the same highly contended lock discussed in this post:
https://randomascii.wordpress.com/2017/07/09/24-core-cpu-and-i-cant-move-my-mouse/

Most LLVM tools still have a transitive dependency on
SHGetKnownFolderPathW, which is used to look up the user home directory
and local AppData directory. We also use SHFileOperationW to recursively
delete a directory, but only LLDB and clang-doc use this today. At some
point, we might consider removing these last shell32.dll deps, but for
now, I would like to take this free performance.

Many thanks to Bruce Dawson for suggesting this fix. He looked at an ETW
trace of an LLVM test run, noticed these DLLs, and suggested avoiding
them.

Reviewers: zturner, pcc, thakis

Subscribers: mgorny, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D51952

llvm-svn: 342002
2018-09-11 22:25:13 +00:00
Alexandros Lamprineas fe0512d575 Revert "[GVNHoist] Re-enable GVNHoist by default"
This reverts rL341954.

The builder `sanitizer-x86_64-linux-bootstrap-ubsan` has been
failing with timeouts at stage2 clang/ubsan:

[3065/3073] Linking CXX executable bin/lld
command timed out: 1200 seconds without output running python
../sanitizer_buildbot/sanitizers/buildbot_selector.py,
attempting to kill

llvm-svn: 342001
2018-09-11 22:10:57 +00:00
Reid Kleckner 4a17780291 Apply local fixes intended to be part of r341999.'
llvm-svn: 342000
2018-09-11 22:02:31 +00:00
Reid Kleckner a6f64265ea [codeview] Decode and dump FP regs from S_FRAMEPROC records
Summary:
There are two registers encoded in the S_FRAMEPROC flags: one for locals
and one for parameters. The encoding is described by the
ExpandEncodedBasePointerReg function in cvinfo.h. Two bits are used to
indicate one of four possible values:

  0: no register - Used when there are no variables.
  1: SP / standard - Variables are stored relative to the standard SP
     for the ISA.
  2: FP - Variables are addressed relative to the ISA frame
     pointer, i.e. EBP on x86. If realignment is required, parameters
     use this. If a dynamic alloca is used, locals will be EBP relative.
  3: Alternative - Variables are stored relative to some alternative
     third callee-saved register. This is required to address highly
     aligned locals when there are dynamic stack adjustments. In this
     case, both the incoming SP saved in the standard FP and the current
     SP are at some dynamic offset from the locals. LLVM uses ESI in
     this case, MSVC uses EBX.

Most of the changes in this patch are to pass around the CPU so that we
can decode these into real, named architectural registers.

Subscribers: hiraditya

Differential Revision: https://reviews.llvm.org/D51894

llvm-svn: 341999
2018-09-11 22:00:50 +00:00
Alexander Shaposhnikov 72b27a6a39 [object] Improve the performance of getSymbols used by ArchiveWriter
In this diff we adjust the code of getSymbols to avoid creating LLVMContext when it's not necessary.
Without this patch when the function getSymbols was called on a MachO object with a __bitcode section
it was parsing the embedded bitcode and then ignoring the result.

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D51759

llvm-svn: 341998
2018-09-11 22:00:47 +00:00
Sanjay Patel 26725bdc50 [InstCombine] add folds for icmp with xor mask constant
These are the folds in Alive;
Name: xor_ult
Pre: isPowerOf2(-C1)
%xor = xor i8 %x, C1
%r = icmp ult i8 %xor, C1
=>
%r = icmp ugt i8 %x, ~C1

Name: xor_ugt
Pre: isPowerOf2(C1+1)
%xor = xor i8 %x, C1
%r = icmp ugt i8 %xor, C1
=>
%r = icmp ugt i8 %x, C1

https://rise4fun.com/Alive/Vty

The ugt case in its simplest form was already handled by DemandedBits,
but that's not ideal as shown in the multi-use test.

I'm not sure if these are all of the symmetrical folds, but I adjusted 
the existing code for one of the folds to try to show the similarities.

There's no obvious connection, but this is another preliminary step 
for PR14613...
https://bugs.llvm.org/show_bug.cgi?id=14613

llvm-svn: 341997
2018-09-11 22:00:15 +00:00
Michael Berg c72a7259be add IR flags to MI
Summary: Initial support for nsw, nuw and exact flags in MI

Reviewers: spatel, hfinkel, wristow

Reviewed By: spatel

Subscribers: nlopes

Differential Revision: https://reviews.llvm.org/D51738

llvm-svn: 341996
2018-09-11 21:35:32 +00:00
Matt Morehouse f0d7daa972 Revert "[SanitizerCoverage] Create comdat for global arrays."
This reverts r341987 since it will cause trouble when there's a module
ID collision.

llvm-svn: 341995
2018-09-11 21:15:41 +00:00
Shuai Wang e9192f8389 [analyzer] Add ExprMutationAnalyzer
Summary:
This is 1/2 of moving ExprMutationAnalyzer from clangtidy to
clang/Analysis.
This diff along simply copies the ExprMutationAnalyzer over with trivial
modifications (e.g. include path, namespace)
2/2 will migrate existing usage of ExprMutationAnalyzer and remove the
original copy inside clangtidy.

Reviewers: george.karpenkov

Subscribers: mgorny, xazax.hun, szepet, a.sidorin, mikhail.ramalho, Szelethus, cfe-commits, JonasToth

Differential Revision: https://reviews.llvm.org/D51948

llvm-svn: 341994
2018-09-11 21:13:20 +00:00