Commit Graph

16 Commits

Author SHA1 Message Date
Ahmed Bougacha 082c5c707a Add a bunch of CHECK missing colons in tests. NFC.
Some wouldn't pass;  fixed most, the rest will be fixed separately.

llvm-svn: 232239
2015-03-14 01:43:57 +00:00
Amaury de la Vieuville 064546cbfe ARM: Enforce decoding rules for VLDn instructions
llvm-svn: 183731
2013-06-11 08:14:14 +00:00
Kristof Beyls 0ba797e8f7 Make ARMAsmPrinter generate the correct alignment specifier syntax in instructions.
The Printer will now print instructions with the correct alignment specifier syntax, like
    vld1.8  {d16}, [r0:64]

llvm-svn: 175884
2013-02-22 10:01:33 +00:00
Jim Grosbach b4e1ba7191 ARM: Move Thumb2 tests to Thumb2 test file and fix CHECK lines.
These tests weren't actually being run before (missing ':' after CHECK).

llvm-svn: 161800
2012-08-13 22:25:44 +00:00
Evan Cheng 8a8e9d1b63 Specify cpu to unbreak tests.
llvm-svn: 155604
2012-04-26 01:38:10 +00:00
Kevin Enderby 70be447e5c Add missing test cases for ARM VLD3 (single 3-element structure to all lanes)
instructions.

llvm-svn: 155453
2012-04-24 17:45:56 +00:00
Kevin Enderby c8d223e41e Add missing test cases for ARM VLD4 (single 4-element structure to all lanes)
instructions.

llvm-svn: 155444
2012-04-24 15:55:00 +00:00
Kevin Enderby 29ae538647 Fix ARM disassembly of VLD2 (single 2-element structure to all lanes)
instructions with writebacks. And add test a case for all opcodes handed by
DecodeVLD2DupInstruction() in ARMDisassembler.cpp .

llvm-svn: 154884
2012-04-17 00:49:27 +00:00
Kevin Enderby d2980cd041 Fix ARM disassembly of VLD instructions with writebacks.  And add test a case
for all opcodes handed by DecodeVLDInstruction() in ARMDisassembler.cpp .

llvm-svn: 154459
2012-04-11 00:25:40 +00:00
Kevin Enderby 7e7d5eefb2 Fix ARM disassembly of VST1 and VST2 instructions with writeback. And add test
case for all opcodes handed by DecodeVSTInstruction() in ARMDisassembler.cpp .

llvm-svn: 153218
2012-03-21 20:54:32 +00:00
Kevin Enderby 520eb3ba8a Fix a bug in the ARM disassembly of the neon VLD2 all lanes instruction.
llvm-svn: 152127
2012-03-06 18:33:12 +00:00
Jim Grosbach 8d24618975 ARM NEON VST2 assembly parsing and encoding.
Work in progress. Parsing for non-writeback, single spaced register lists
works now. The rest have the representations better factored, but still
need more to be able to parse properly.

llvm-svn: 146579
2011-12-14 19:35:22 +00:00
Benjamin Kramer 69d57cf9c4 Simplify some uses of utohexstr.
As a side effect hex is printed lowercase instead of uppercase now.

llvm-svn: 144013
2011-11-07 21:00:59 +00:00
Owen Anderson 295b1e84ce Fix a NEON disassembly case that was broken in the recent refactorings. As more of this code gets refactored, a lot of these manual decoding hooks should get smaller and/or go away entirely.
llvm-svn: 142817
2011-10-24 18:04:29 +00:00
James Molloy 8067df9503 Second of a three-patch series aiming to fix MSR/MRS on Cortex-M. This adds predicate checking to the Disassembler.
llvm-svn: 139250
2011-09-07 19:42:28 +00:00
Owen Anderson 53440984b3 Add a test file for Thumb2 NEON.
llvm-svn: 137687
2011-08-15 23:42:20 +00:00