Commit Graph

20637 Commits

Author SHA1 Message Date
Evgeniy Stepanov 45fa0fd758 [safestack] Sink unsafe address computation to each use.
This is a fix for PR27844.
When replacing uses of unsafe allocas, emit the new location
immediately after each use. Without this, the pointer stays live from
the function entry to the last use, while it's usually cheaper to
recalculate.

llvm-svn: 272969
2016-06-16 22:34:04 +00:00
Evgeniy Stepanov 72d961a1da [safestack] Fixup llvm.dbg.value when rewriting unsafe allocas.
When moving unsafe allocas to the unsafe stack, dbg.declare intrinsics are
updated to refer to the new location.

This change does the same to dbg.value intrinsics.

llvm-svn: 272968
2016-06-16 22:34:00 +00:00
David Majnemer 979cb88870 [CodeView] Implement support for enums
MSVC handles enums differently from structs and classes: a forward
declaration is not emitted unconditionally.  MSVC does not emit an S_UDT
record for the enum.

Differential Revision: http://reviews.llvm.org/D21442

llvm-svn: 272960
2016-06-16 21:32:16 +00:00
Sanjoy Das 0ebc9616b4 NFC; refactor getFrameIndexReferenceFromSP
Summary:
... into getFrameIndexReferencePreferSP.  This change folds the
fail-then-retry logic into getFrameIndexReferencePreferSP.

There is a non-functional but behaviorial change in WinException --
earlier if `getFrameIndexReferenceFromSP` failed we'd trip an assert,
but now we'll silently use the (wrong) offset from the base pointer.  I
could not write the assert I'd like to write ("FrameReg ==
StackRegister", like I've done in X86FrameLowering) since there is no
easy way to get to the stack register from WinException (happy to be
proven wrong here).  One solution to this is to add a `bool
OnlyStackPointer` parameter to `getFrameIndexReferenceFromSP` that
asserts if it could not satisfy its promise of returning an offset from
a stack pointer, but that seems overkill.

Reviewers: rnk

Subscribers: sanjoy, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D21427

llvm-svn: 272938
2016-06-16 18:54:06 +00:00
Zachary Turner 01ee3dae04 Resubmit "[pdb] Change type visitor pattern to be dynamic."
There was a regression introduced during type stream merging when
visiting a field list record.  This has been fixed in this patch.

llvm-svn: 272929
2016-06-16 18:22:27 +00:00
Zachary Turner 73b0b2f555 Revert "[pdb] Change type visitor pattern to be dynamic."
This reverts commit fb0dd311e1ad945827b8ffd5354f4810e2be1579.

This breaks some llvm-readobj tests.

llvm-svn: 272927
2016-06-16 18:09:04 +00:00
Zachary Turner 1f6372c429 [pdb] Change type visitor pattern to be dynamic.
This allows better catching of compiler errors since we can use
the override keyword to verify that methods are actually
overridden.

Also in this patch I've changed from storing a boolean Error
code everywhere to returning an llvm::Error, to propagate richer
error information up the call stack.

Reviewed By: ruiu, rnk
Differential Revision: http://reviews.llvm.org/D21410

llvm-svn: 272926
2016-06-16 18:00:28 +00:00
Sanjay Patel f664f3a578 [DAG] Remove redundant FMUL in Newton-Raphson SQRT code
When calculating a square root using Newton-Raphson with two constants,
a naive implementation is to use five multiplications (four muls to calculate
reciprocal square root and another one to calculate the square root itself).
However, after some reassociation and CSE the same result can be obtained
with only four multiplications. Unfortunately, there's no reliable way to do
such a reassociation in the back-end. So, the patch modifies NR code itself
so that it directly builds optimal code for SQRT and doesn't rely on any
further reassociation.

Patch by Nikolai Bozhenov!

Differential Revision: http://reviews.llvm.org/D21127

llvm-svn: 272920
2016-06-16 16:58:54 +00:00
Chad Rosier 20e4d9e21d Address a few coding style issues. NFC.
llvm-svn: 272838
2016-06-15 21:14:02 +00:00
David Majnemer 3128b10cdc [CodeView] Add support for emitting S_UDT for typedefs
Emit a S_UDT record for typedefs.  We still need to do something for
class types.

Differential Revision: http://reviews.llvm.org/D21149

llvm-svn: 272813
2016-06-15 18:00:01 +00:00
Nirav Dave 194cb55f37 Revert "Preserve DebugInfo when replacing values in DAGCombiner"
Reverting due to assertion failure in
lib/CodeGen/SelectionDAG/InstrEmitter.cpp

This reverts commit r272792.

llvm-svn: 272799
2016-06-15 16:08:50 +00:00
Nirav Dave a72e308403 Preserve DebugInfo when replacing values in DAGCombiner
[DAG] Previously debug values would transfer debuginfo for the selected
start node for a replacement which allows for debug to be dropped.

Push debug value transfer to occur with node/value replacement in
SelectionDAG, remove now extraneous transfers of debug values.

This refixes PR9817 which was being incompletely checked in the
testsuite.

Reviewers: jyknight

Subscribers: dblaikie, llvm-commits

Differential Revision: http://reviews.llvm.org/D21037

llvm-svn: 272792
2016-06-15 14:50:08 +00:00
Sanjoy Das 0272be206a Don't force SP-relative addressing for statepoints
Summary:
...  when the offset is not statically known.

Prioritize addresses relative to the stack pointer in the stackmap, but
fallback gracefully to other modes of addressing if the offset to the
stack pointer is not a known constant.

Patch by Oscar Blumberg!

Reviewers: sanjoy

Subscribers: llvm-commits, majnemer, rnk, sanjoy, thanm

Differential Revision: http://reviews.llvm.org/D21259

llvm-svn: 272756
2016-06-15 05:35:14 +00:00
Xinliang David Li e34ed833e5 [MBP] add comments and bug fix
Document the new parameter and threshod computation
model.  Also fix a bug when the threshold parameter
is set to be different from the default.

 

llvm-svn: 272749
2016-06-15 03:03:30 +00:00
Matt Arsenault 3698ca231f Make DetectDeadLanes preserve CFG
llvm-svn: 272740
2016-06-15 00:25:09 +00:00
David Majnemer 577be0fed3 [CodeView] Don't emit debuginfo for imported symbols
Emitting symbol information requires us to have a definition for the
symbol.  A symbol reference is insufficient.

This fixes PR28123.

llvm-svn: 272738
2016-06-15 00:19:52 +00:00
Dehao Chen 9f2bdfb40f Set machine block placement hot prob threshold for both static and runtime profile.
Summary: With runtime profile, we have more confidence in branch probability, thus during basic block layout, we set a lower hot prob threshold so that blocks can be layouted optimally.

Reviewers: djasper, davidxl

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20991

llvm-svn: 272729
2016-06-14 22:27:17 +00:00
Peter Collingbourne 96efdd6107 IR: Introduce local_unnamed_addr attribute.
If a local_unnamed_addr attribute is attached to a global, the address
is known to be insignificant within the module. It is distinct from the
existing unnamed_addr attribute in that it only describes a local property
of the module rather than a global property of the symbol.

This attribute is intended to be used by the code generator and LTO to allow
the linker to decide whether the global needs to be in the symbol table. It is
possible to exclude a global from the symbol table if three things are true:
- This attribute is present on every instance of the global (which means that
  the normal rule that the global must have a unique address can be broken without
  being observable by the program by performing comparisons against the global's
  address)
- The global has linkonce_odr linkage (which means that each linkage unit must have
  its own copy of the global if it requires one, and the copy in each linkage unit
  must be the same)
- It is a constant or a function (which means that the program cannot observe that
  the unique-address rule has been broken by writing to the global)

Although this attribute could in principle be computed from the module
contents, LTO clients (i.e. linkers) will normally need to be able to compute
this property as part of symbol resolution, and it would be inefficient to
materialize every module just to compute it.

See:
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160509/356401.html
http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20160516/356738.html
for earlier discussion.

Part of the fix for PR27553.

Differential Revision: http://reviews.llvm.org/D20348

llvm-svn: 272709
2016-06-14 21:01:22 +00:00
Geoff Berry f8c29d6cab [TailDuplication] Split up NumInstrDups statistic.
Summary:
Split NumInstrDups statistic into separate added/removed counts to avoid
negative stat being printed as unsigned.

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D21335

llvm-svn: 272700
2016-06-14 19:40:10 +00:00
Wei Mi b799a625f9 [X86] Reduce the width of multiplification when its operands are extended from i8 or i16
For <N x i32> type mul, pmuludq will be used for targets without SSE41, which
often introduces many extra pack and unpack instructions in vectorized loop
body because pmuludq generates <N/2 x i64> type value. However when the operands
of <N x i32> mul are extended from smaller size values like i8 and i16, the type
of mul may be shrunk to use pmullw + pmulhw/pmulhuw instead of pmuludq, which
generates better code. For targets with SSE41, pmulld is supported so no
shrinking is needed.

Differential Revision: http://reviews.llvm.org/D20931

llvm-svn: 272694
2016-06-14 18:53:20 +00:00
Nirav Dave f8d00d5cac Fix BSS global handling in AsmPrinter
Change EmitGlobalVariable to check final assembler section is in BSS
before using .lcomm/.comm directive. This prevents globals from being
put into .bss erroneously when -data-sections is used.

This fixes PR26570.

Reviewers: echristo, rafael

Subscribers: llvm-commits, mehdi_amini

Differential Revision: http://reviews.llvm.org/D21146

llvm-svn: 272674
2016-06-14 15:09:30 +00:00
Diana Picus bae1d89e45 [SelectionDAG] Remove exit-on-error flag from test (PR27765)
The exit-on-error flag in the ARM test is necessary in order to avoid an
unreachable in the DAGTypeLegalizer, when trying to expand a physical register.
We can also avoid this situation by introducing a bitcast early on, where the
invalid scalar-to-vector conversion is detected.

We also add a test for PowerPC, which goes through a similar code path in the
SelectionDAGBuilder.

Fixes PR27765.

Differential Revision: http://reviews.llvm.org/D21061

llvm-svn: 272644
2016-06-14 07:30:20 +00:00
Xinliang David Li 52530a72c9 [MBP] Interface cleanups /NFC
Save machine function pointer so that
the reference does not need to be passed around.

This also gives other methods access to machine
function for information such as entry count etc.

 

llvm-svn: 272594
2016-06-13 22:23:44 +00:00
Xinliang David Li cbf1214f76 [MBP] Code cleanup #3 /NFC
This is third patch to clean up the code.

Included in this patch:
1. Further unclutter trace/chain formation main routine;
2. Isolate the logic to compute global cost/conflict detection
   into its own method;
3. Heavily document the selection algorithm;
4. Added helper hook to allow PGO specific logic to be
   added in the future.
 

llvm-svn: 272582
2016-06-13 20:24:19 +00:00
Strahinja Petrovic f0980e4dc0 This patch fixes handling long double type when it is
constant in soft float mode on PowerPC 32 architecture.

llvm-svn: 272543
2016-06-13 10:29:29 +00:00
Benjamin Kramer 4ca41fd09e Run clang-tidy's performance-unnecessary-copy-initialization over LLVM.
No functionality change intended.

llvm-svn: 272516
2016-06-12 17:30:47 +00:00
Xinliang David Li 071d0f1807 [MBP] Code cleanup /NFC
This is second patch to clean up the code.

In this patch, the logic to determine block outlinining
is refactored and more comments are added.
 

llvm-svn: 272514
2016-06-12 16:54:03 +00:00
Benjamin Kramer d3f4c05aea Move instances of std::function.
Or replace with llvm::function_ref if it's never stored. NFC intended.

llvm-svn: 272513
2016-06-12 16:13:55 +00:00
Benjamin Kramer bdc4956bac Pass DebugLoc and SDLoc by const ref.
This used to be free, copying and moving DebugLocs became expensive
after the metadata rewrite. Passing by reference eliminates a ton of
track/untrack operations. No functionality change intended.

llvm-svn: 272512
2016-06-12 15:39:02 +00:00
Benjamin Kramer bc2f4fb691 [RegUsageInfoCollector] Drop unneccesary const_cast. NFC.
llvm-svn: 272509
2016-06-12 13:32:23 +00:00
Xinliang David Li 594ffa3d36 [MBP] Code cleanup /NFC
This is one of the patches to clean up the code so that
it is in a better form to make future enhancements easier.

In htis patch, the logic to collect viable successors are
extrated as a helper to unclutter the caller which gets very
large recenty. Also cleaned up BP adjustment code.
 

llvm-svn: 272482
2016-06-11 18:35:40 +00:00
Chandler Carruth 3ecbd9d287 Use const_cast to cast away constness. This silences a warning.
llvm-svn: 272458
2016-06-11 08:01:57 +00:00
Matthias Braun 959a8c974d LiveIntervalAnalysis: findLastUseBefore() must ignore undef uses.
undef uses are no real uses of a register and must be ignored by
findLastUseBefore() so that handleMove() does not produce invalid live
intervals in some cases.

This fixed http://llvm.org/PR28083

llvm-svn: 272446
2016-06-11 00:31:28 +00:00
Quentin Colombet f2a1909bb5 [IRTranslator] Support the translation of or.
Now or instructions get translated into G_OR.

llvm-svn: 272433
2016-06-10 20:50:35 +00:00
Quentin Colombet 13c55e07ed [IRTranslator] Refactor to expose a translateBinaryOp method.
This method will be used for every binary operation.

NFC.

llvm-svn: 272431
2016-06-10 20:50:18 +00:00
Etienne Bergeron 2e50fedb2c [CodeGen] Fix PrologEpilogInserter to avoid duplicate allocation of SEH structs
Summary:
When stack-protection is activated and WinEH exceptions is used, 
the EHRegNode (exception handling registration) is allocated twice on the stack.

This was not breaking anything except loosing space on the stack.

```
D:\src\llvm\examples>llc exc2.ll  -debug-only=pei
alloc FI(0) at SP[-24]
alloc FI(1) at SP[-48]   <<-- Allocated
alloc FI(1) at SP[-72]   <<-- Allocated twice!?
alloc FI(2) at SP[-76]
alloc FI(4) at SP[-80]
alloc FI(3) at SP[-84]
```

Reviewers: rnk, majnemer

Subscribers: chrisha, llvm-commits

Differential Revision: http://reviews.llvm.org/D21188

llvm-svn: 272426
2016-06-10 20:24:38 +00:00
Mehdi Amini 1d396832d3 Interprocedural Register Allocation (IPRA): add a Transformation Pass
Adds a MachineFunctionPass that scans the body to find calls, and
update the register mask with the one saved by the
RegUsageInfoCollector analysis in PhysicalRegisterUsageInfo.

Patch by Vivek Pandya <vivekvpandya@gmail.com>

Differential Revision: http://reviews.llvm.org/D21180

llvm-svn: 272414
2016-06-10 18:37:21 +00:00
Mehdi Amini bbacddfe92 Interprocedural Register Allocation (IPRA) Analysis
Add an option to enable the analysis of MachineFunction register
usage to extract the list of clobbered registers.

When enabled, the CodeGen order is changed to be bottom up on the Call
Graph.

The analysis is split in two parts, RegUsageInfoCollector is the
MachineFunction Pass that runs post-RA and collect the list of
clobbered registers to produce a register mask.

An immutable pass, RegisterUsageInfo, stores the RegMask produced by
RegUsageInfoCollector, and keep them available. A future tranformation
pass will use this information to update every call-sites after
instruction selection.

Patch by Vivek Pandya <vivekvpandya@gmail.com>

Differential Revision: http://reviews.llvm.org/D20769

llvm-svn: 272403
2016-06-10 16:19:46 +00:00
Matt Arsenault 8023233afd CodeGen: Allow verifier to run after MachineBlockPlacement
No tests break with this enabled.

llvm-svn: 272340
2016-06-09 23:31:55 +00:00
Quentin Colombet d307909a50 [LiveRangeEdit] Fix a crash in eliminateDeadDef.
When we delete a live-range, we check if that live-range is the origin of others
to keep it around for rematerialization. For that we check that the instruction
we are about to remove is the same as the definition of the VNI of the original
live-range.
If this is the case, we just shrink the live-range to an empty one.

Now, when we try to delete one of the children of such live-range (product of
splitting), we do the same check.
However, now the original live-range is empty and there is no way we can
access the VNI to check its definition, and we crash.

When we cannot get the VNI for the original live-range, that means we are not in
the presence of the original definition. Thus, this check does not need to happen
in that case and the crash is sloved!

This bug was introduced in r266162 | wmi | 2016-04-12 20:08:27. It affects every
target that uses the greedy register allocator.
To happen, we need to delete both a the original instruction and its split
products, in that order. This is likely to happen when rematerialization comes
into play.

Trying to produce a more robust test case. Will follow in a coming commit.

This fixes llvm.org/PR27983.

rdar://problem/26651519 

llvm-svn: 272314
2016-06-09 21:34:31 +00:00
Jan Vesely 2da0cba5fb SelectionDAG: Implement expansion of {S,U}MIN/MAX in integer legalization
Fixes {u,}long_{min,max,clamp} opencl piglit regressions on EG.

Reviewers: arsenm
Differential Revision: http://reviews.llvm.org/D17898

llvm-svn: 272272
2016-06-09 16:04:00 +00:00
Haicheng Wu 5b458cc1f6 Reapply "[MBP] Reduce code size by running tail merging in MBP.""
This reapplies commit r271930, r271915, r271923.  They hit a bug in
Thumb which is fixed in r272258 now.

The original message:

The code layout that TailMerging (inside BranchFolding) works on is not the
final layout optimized based on the branch probability. Generally, after
BlockPlacement, many new merging opportunities emerge.

This patch calls Tail Merging after MBP and calls MBP again if Tail Merging
merges anything.

llvm-svn: 272267
2016-06-09 15:24:29 +00:00
Davide Italiano bd4243c519 [CodeGen] Change getSDagStackGuard to get an internal sym.
Fixes a crash in the backend during an LTO build of rtld(1) in
FreeBSD.

llvm-svn: 272262
2016-06-09 14:23:38 +00:00
Reid Kleckner 6d1d27542f [codeview] Skip DIGlobalVariables with no variable
They have probably been discarded during optimization.

llvm-svn: 272231
2016-06-09 00:29:00 +00:00
Quentin Colombet 2c6469687d [MIR] Check that generic virtual registers get a size.
Without that check it was possible to write test cases where the size
was not specified and we ended up with weird asserts down the road,
because the default value (1) would not make sense.

llvm-svn: 272226
2016-06-08 23:27:46 +00:00
Quentin Colombet 3340645771 [RegBankSelect] Print out the actual mapping of the operands.
This improves the debuggability of the pass.

llvm-svn: 272210
2016-06-08 21:55:30 +00:00
Quentin Colombet 9400bfbf42 [RegBankSelect] Remove a debug print of a potentially dead instruction.
For complex rewrittings, which do not occur currently, the related
machine instruction may have been deleted in the process. Therefore, do
not try to print it after the mapping is applied.

llvm-svn: 272209
2016-06-08 21:55:29 +00:00
Quentin Colombet 9f8e209c60 [RegisterBankInfo] Avoid code duplication in OperandsMapper for the computation of the end of range.
Refactor the code so that we do not compute in two different places the
end iterator for the range of new virtual registers for a given operand.
Although this refactoring was intended as NFC, this is not the case
because it actually fixes a bug where we were returning a range off by 1
(too long). Right now, this could not result in an actual bug because we
were accessing this range via the BreakDown size of the related operand.

llvm-svn: 272208
2016-06-08 21:55:26 +00:00
Quentin Colombet 9d26805f42 [RegisterBankInfo] Add dump/print methods for OperandsMapper.
Improve debuggability of the OperandsMapper helper class.

llvm-svn: 272207
2016-06-08 21:55:23 +00:00
Dehao Chen 769219b11a Revive http://reviews.llvm.org/D12778 to handle forward-hot-prob and backward-hot-prob consistently.
Summary:
Consider the following diamond CFG:

 A
/ \
B C
 \/
 D

Suppose A->B and A->C have probabilities 81% and 19%. In block-placement, A->B is called a hot edge and the final placement should be ABDC. However, the current implementation outputs ABCD. This is because when choosing the next block of B, it checks if Freq(C->D) > Freq(B->D) * 20%, which is true (if Freq(A) = 100, then Freq(B->D) = 81, Freq(C->D) = 19, and 19 > 81*20%=16.2). Actually, we should use 25% instead of 20% as the probability here, so that we have 19 < 81*25%=20.25, and the desired ABDC layout will be generated.

Reviewers: djasper, davidxl

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20989

llvm-svn: 272203
2016-06-08 21:30:12 +00:00