5434756585
Revert r77654, it appears to be causing llvm-gcc bootstrap failures, and many
...
failures when building assorted projects with clang.
--- Reverse-merging r77654 into '.':
U include/llvm/CodeGen/Passes.h
U include/llvm/CodeGen/MachineFunctionPass.h
U include/llvm/CodeGen/MachineFunction.h
U include/llvm/CodeGen/LazyLiveness.h
U include/llvm/CodeGen/SelectionDAGISel.h
D include/llvm/CodeGen/MachineFunctionAnalysis.h
U include/llvm/Function.h
U lib/Target/CellSPU/SPUISelDAGToDAG.cpp
U lib/Target/PowerPC/PPCISelDAGToDAG.cpp
U lib/CodeGen/LLVMTargetMachine.cpp
U lib/CodeGen/MachineVerifier.cpp
U lib/CodeGen/MachineFunction.cpp
U lib/CodeGen/PrologEpilogInserter.cpp
U lib/CodeGen/MachineLoopInfo.cpp
U lib/CodeGen/SelectionDAG/SelectionDAGISel.cpp
D lib/CodeGen/MachineFunctionAnalysis.cpp
D lib/CodeGen/MachineFunctionPass.cpp
U lib/CodeGen/LiveVariables.cpp
llvm-svn: 77661
2009-07-31 03:02:41 +00:00
b6d6aa2d22
llvm-mc: Match a few X86 instructions.
...
- This is "experimental" code, I am feeling my way around and working out the
best way to do things (and learning tblgen in the process). Comments welcome,
but keep in mind this stuff will change radically.
- This is enough to match "subb" and friends, but not much else. The next step is to
automatically generate the matchers for individual operands.
llvm-svn: 77657
2009-07-31 02:32:59 +00:00
bcb44baa57
Manage MachineFunctions with an analysis Pass instead of the Annotable
...
mechanism. To support this, make MachineFunctionPass a little more
complete.
llvm-svn: 77654
2009-07-31 01:52:50 +00:00
5811ab5cf3
When fp is not eliminated, instructions with T2_i12 modes will be changed to T2_i8 ones. Take that into consideration when determining stack size limit for reserving register scavenging slot.
...
llvm-svn: 77642
2009-07-30 23:29:25 +00:00
5aae45fb6f
Remove redundant match for frame index from imm8 addrmode, it is handled by the imm12 addrmode.
...
llvm-svn: 77632
2009-07-30 22:45:52 +00:00
0bfc8312c2
Darwin assembler now recognizes "orn", so remove workaround.
...
llvm-svn: 77627
2009-07-30 21:51:41 +00:00
ce774e2383
Darwin assembler now supports "rrx", so remove workaround.
...
llvm-svn: 77625
2009-07-30 21:38:40 +00:00
79c079b478
Cleanup and include code selection for some frame index cases.
...
llvm-svn: 77622
2009-07-30 18:56:48 +00:00
cab137d294
Add missing D* register clobbers for Thumb-2 call.
...
llvm-svn: 77611
2009-07-30 18:01:09 +00:00
703edcc553
Minor whitespace tidiness.
...
llvm-svn: 77602
2009-07-30 17:04:07 +00:00
013f007762
Rename GRAD to GR32_AD, to follow the naming convention of other
...
classes. And define its SubRegClassList.
llvm-svn: 77601
2009-07-30 17:02:08 +00:00
c667b60b93
add a random codegen deficiency.
...
llvm-svn: 77598
2009-07-30 16:08:58 +00:00
92df9c3323
Add a note.
...
llvm-svn: 77584
2009-07-30 08:56:19 +00:00
e62288fdd4
Optimize some common usage patterns of atomic built-ins __sync_add_and_fetch() and __sync_sub_and_fetch.
...
When the return value is not used (i.e. only care about the value in the memory), x86 does not have to use add to implement these. Instead, it can use add, sub, inc, dec instructions with the "lock" prefix.
This is currently implemented using a bit of instruction selection trick. The issue is the target independent pattern produces one output and a chain and we want to map it into one that just output a chain. The current trick is to select it into a merge_values with the first definition being an implicit_def. The proper solution is to add new ISD opcodes for the no-output variant. DAG combiner can then transform the node before it gets to target node selection.
Problem #2 is we are adding a whole bunch of x86 atomic instructions when in fact these instructions are identical to the non-lock versions. We need a way to add target specific information to target nodes and have this information carried over to machine instructions. Asm printer (or JIT) can use this information to add the "lock" prefix.
llvm-svn: 77582
2009-07-30 08:33:02 +00:00
6afdc5e694
Switch obvious clients to Twine instead of utostr (when they were already using
...
a Twine, e.g., for names).
- I am a little ambivalent about this; we don't want the string conversion of
utostr, but using overload '+' mixed with string and integer arguments is
sketchy. On the other hand, this particular usage is something of an idiom.
llvm-svn: 77579
2009-07-30 04:20:37 +00:00
8787861004
Keep track of references to mem(cpy,move,set) and then print only one extern
...
declaration for them.
llvm-svn: 77578
2009-07-30 04:15:15 +00:00
49a6f16b7c
Add a new register class to describe operands that can't be SP,
...
due to x86 encoding restrictions. This is currently off by default
because it may cause code quality regressions. This is for PR4572.
llvm-svn: 77565
2009-07-30 01:56:29 +00:00
652529ec9c
Eliminate a bunch of redundant tables.
...
llvm-svn: 77558
2009-07-30 00:40:42 +00:00
0dbdec8042
Lower a 128-bit BUILD_VECTOR with 2 elements to a pair of INSERT_VECTOR_ELTs.
...
llvm-svn: 77557
2009-07-30 00:31:25 +00:00
da9ba9ec2c
Use array_endof instead of doing it manually.
...
llvm-svn: 77553
2009-07-30 00:10:18 +00:00
e3493a91cc
tbb / tbh instructions only branch forward, not backwards.
...
llvm-svn: 77522
2009-07-29 23:20:20 +00:00
1f58eed638
Add VFP3 D registers to the DPR register class.
...
llvm-svn: 77521
2009-07-29 23:03:41 +00:00
4056ca9568
Move types back to the 2.5 API.
...
llvm-svn: 77516
2009-07-29 22:17:13 +00:00
7667332899
inline the global 'getInstrOperandRegClass' function into its callers
...
now that TargetOperandInfo does the heavy lifting.
llvm-svn: 77508
2009-07-29 21:36:49 +00:00
175bd14967
Make sure Thumb2 uses the right call instructions.
...
llvm-svn: 77507
2009-07-29 21:26:42 +00:00
f3239532cc
1. Introduce a new TargetOperandInfo::getRegClass() helper method
...
and convert code to using it, instead of having lots of things
poke the isLookupPtrRegClass() method directly.
2. Make PointerLikeRegClass contain a 'kind' int, and store it in
the existing regclass field of TargetOperandInfo when the
isLookupPtrRegClass() predicate is set. Make getRegClass pass
this into TargetRegisterInfo::getPointerRegClass(), allowing
targets to have multiple ptr_rc things.
llvm-svn: 77504
2009-07-29 21:10:12 +00:00
ee68a483ec
Give getPointerRegClass() a "kind" value so that targets can
...
support multiple different pointer register classes.
llvm-svn: 77501
2009-07-29 20:31:52 +00:00
0d98d8b8b3
- Fix an obvious copy and paste error.
...
- Darwin Thumb2 call clobbers r9.
llvm-svn: 77500
2009-07-29 20:10:36 +00:00
77268a56ff
Add llvm_unreachable for ... unreachable code!
...
llvm-svn: 77480
2009-07-29 18:14:04 +00:00
cf19885a32
Change Neon VLDn intrinsics to return multiple values instead of really
...
wide vectors. Likewise, change VSTn intrinsics to take separate arguments
for each vector in a multi-vector struct. Adjust tests accordingly.
llvm-svn: 77468
2009-07-29 16:39:22 +00:00
4eb9df073d
more syntactic cleanups.
...
llvm-svn: 77442
2009-07-29 06:33:53 +00:00
5e6e022770
minor smallvector cleanups
...
llvm-svn: 77441
2009-07-29 06:29:53 +00:00
6b6dbb3bd8
whitespace cleanup.
...
llvm-svn: 77438
2009-07-29 05:48:09 +00:00
e033e6da08
mingw uses .data and .text, not _data and _text.
...
llvm-svn: 77435
2009-07-29 05:25:42 +00:00
c5397abb52
fix PR4584 with a trivial patch now that the pieces are in place.
...
llvm-svn: 77434
2009-07-29 05:20:33 +00:00
5034329f8d
pass the mangler down into the various SectionForGlobal methods.
...
No functionality change.
llvm-svn: 77432
2009-07-29 05:09:30 +00:00
8f35574c06
constant prop a utostr.
...
llvm-svn: 77430
2009-07-29 04:55:08 +00:00
7610c57d4b
remove some completely wrong code. 1 is never < 16. It turns out that GCC appears to put strings of any length into the ELF cstring equivalent, so just rip out the code.
...
llvm-svn: 77429
2009-07-29 04:54:38 +00:00
c6d70ae063
Optimize Thumb2 jumptable to use tbb / tbh when all the offsets fit in byte / halfword.
...
llvm-svn: 77422
2009-07-29 02:18:14 +00:00
99f5534296
Fix comment.
...
llvm-svn: 77415
2009-07-29 01:01:19 +00:00
bef0437d61
Change the "PreferredEHDataFormat" from "absptr" if we're on a Darwin system >
...
Leopard.
llvm-svn: 77414
2009-07-29 00:59:34 +00:00
f7802a33ce
Add support for gcc __builtin_ia32_ptest{z,c,nzc} intrinsics. Lower
...
to ptest instruction plus setcc. Revamp ptest instruction. Add test.
llvm-svn: 77407
2009-07-29 00:28:05 +00:00
0033199c50
Match X86 register names to number.
...
llvm-svn: 77404
2009-07-29 00:02:19 +00:00
0830980141
Thumb-2: fix typo that caused incorrect stack elimination for VFP operations and very large stack frames.
...
llvm-svn: 77401
2009-07-28 23:52:33 +00:00
e1fdb0e8ce
Move X86 instruction parsing into X86/AsmParser.
...
llvm-svn: 77384
2009-07-28 22:40:46 +00:00
26cf1e3baf
Output the correct format for Darwin.
...
llvm-svn: 77376
2009-07-28 22:03:50 +00:00
403990ad58
Darwin outputs (DW_EH_PE_pcrel | DW_EH_PE_indirect | DW_EH_PE_sdata4) when we're
...
dealing with Data.
llvm-svn: 77372
2009-07-28 21:53:17 +00:00
a4f43fb5dd
Rename MDNode.h header. It defines MDnode and other metadata classes.
...
New name is Metadata.h.
llvm-svn: 77370
2009-07-28 21:49:47 +00:00
4aa3295a65
Return ConstantVector to 2.5 API.
...
llvm-svn: 77366
2009-07-28 21:19:26 +00:00
c8bed03349
In thumb2 mode, add pc is unpredictable. Use add + mov pc instead (that is until more optimization goes in).
...
llvm-svn: 77364
2009-07-28 20:53:24 +00:00
68bb69d6e3
Remove support for ORN to workaround <rdar://problem/7096522>.
...
llvm-svn: 77363
2009-07-28 20:51:25 +00:00
f59ee96a16
Provide generic MCAsmParser when constructing target specific parsers.
...
llvm-svn: 77362
2009-07-28 20:47:52 +00:00
d6b4b29706
more simplifications and cleanup. :)
...
llvm-svn: 77350
2009-07-28 18:48:43 +00:00
c2c7932c64
Change ConstantArray to 2.5 API.
...
llvm-svn: 77347
2009-07-28 18:32:17 +00:00
865c6298d7
Add workaround for <rdar://problem/7098328>.
...
llvm-svn: 77340
2009-07-28 18:15:38 +00:00
513a36b63d
Fix PR4639, a ELF-TLS regression from some of my refactoring.
...
llvm-svn: 77336
2009-07-28 17:57:51 +00:00
a3242e93b7
the apple "ld_classic" linker doesn't support .literal16 in 32-bit
...
mode, and "ld64" (the default linker) falls back to it in -static
mode.
llvm-svn: 77334
2009-07-28 17:50:28 +00:00
e82862e24e
Add Thumb-2 patterns for ARMsrl_flag and ARMsra_flag.
...
llvm-svn: 77329
2009-07-28 17:06:49 +00:00
795b63fb65
fix unused variable warning
...
llvm-svn: 77326
2009-07-28 16:49:19 +00:00
12da273f90
tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.
...
llvm-svn: 77305
2009-07-28 07:38:35 +00:00
73a5119675
Code clean up. No functionality changes.
...
llvm-svn: 77301
2009-07-28 06:24:12 +00:00
780748d565
- More refactoring. This gets rid of all of the getOpcode calls.
...
- This change also makes it possible to switch between ARM / Thumb on a
per-function basis.
- Fixed thumb2 routine which expand reg + arbitrary immediate. It was using
using ARM so_imm logic.
- Use movw and movt to do reg + imm when profitable.
- Other code clean ups and minor optimizations.
llvm-svn: 77300
2009-07-28 05:48:47 +00:00
e1a70c964f
fix a casting problem on the llvm-x86_64-linux tester
...
llvm-svn: 77295
2009-07-28 03:20:34 +00:00
5e693ed07b
Rip all of the global variable lowering logic out of TargetAsmInfo. Since
...
it is highly specific to the object file that will be generated in the end,
this introduces a new TargetLoweringObjectFile interface that is implemented
for each of ELF/MachO/COFF/Alpha/PIC16 and XCore.
Though still is still a brutal and ugly refactoring, this is a major step
towards goodness.
This patch also:
1. fixes a bunch of dangling pointer problems in the PIC16 backend.
2. disables the TargetLowering copy ctor which PIC16 was accidentally using.
3. gets us closer to xcore having its own crazy target section flags and
pic16 not having to shadow sections with its own objects.
4. fixes wierdness where ELF targets would set CStringSection but not
CStringSection_. Factor the code better.
5. fixes some bugs in string lowering on ELF targets.
llvm-svn: 77294
2009-07-28 03:13:23 +00:00
697150ec0c
don't copy TargetLowering.
...
llvm-svn: 77293
2009-07-28 03:05:40 +00:00
57b51d9f82
ORN does not require (and can not have) the ".w" suffix. "Orthogonality" is a dirty word at ARM.
...
llvm-svn: 77275
2009-07-27 23:34:12 +00:00
52d03b252e
llvm-mc: Move AsmLexer::getCurStrVal to StringRef based API.
...
- My DFS traversal of LLVM is, at least for now, nearly complete! :)
llvm-svn: 77258
2009-07-27 21:49:56 +00:00
9d0e762c81
hoist MCContext/MCStreamer up to AsmPrinter since we're going to start creating
...
MCSections soon instead of Section for all targets, and we need something to
own them.
llvm-svn: 77252
2009-07-27 21:28:04 +00:00
69c464dec4
Move ConstantFP construction back to the 2.5-ish API.
...
llvm-svn: 77247
2009-07-27 20:59:43 +00:00
e5b969f6a6
Remove TPat. No patterns depend on just isThumb(). Must use either T1Pat (isThumb1Only()) or T2Pat (is Thumb2).
...
llvm-svn: 77242
2009-07-27 19:59:26 +00:00
e7cb8f7987
Sink getSectionPrefixForUniqueGlobal down into the TAI
...
implementations that need it, rearrange ELFTAI.
llvm-svn: 77236
2009-07-27 19:14:14 +00:00
375a01c34a
remove dead code.
...
llvm-svn: 77233
2009-07-27 19:00:33 +00:00
38b7eee164
More DCE.
...
llvm-svn: 77231
2009-07-27 18:48:45 +00:00
0e075e2429
convertToThreeAddress can't handle Thumb2 instructions (which don't have same address mode as ARM instructions).
...
llvm-svn: 77230
2009-07-27 18:44:00 +00:00
18688f431d
Get rid of more dead code.
...
llvm-svn: 77227
2009-07-27 18:38:54 +00:00
239ed4b343
Cosmetic change.
...
llvm-svn: 77222
2009-07-27 18:31:40 +00:00
8f2ed1bc5a
Clean up.
...
llvm-svn: 77221
2009-07-27 18:25:24 +00:00
056c669e93
Get rid of some more getOpcode calls.
...
This also fixes potential problems in ARMBaseInstrInfo routines not recognizing thumb1 instructions when 32-bit and 16-bit instructions mix.
llvm-svn: 77218
2009-07-27 18:20:05 +00:00
447a8f29ef
Fix build.
...
llvm-svn: 77217
2009-07-27 18:18:30 +00:00
96b3d4a2f9
Remove duplicate entries while printing decls for external symbols.
...
Some libcall names are same, so they were getting printed twice.
llvm-svn: 77215
2009-07-27 18:04:34 +00:00
e48c85fa8b
add an explanatory comment about why we drop these in readonly and
...
not in mergable
llvm-svn: 77210
2009-07-27 17:39:40 +00:00
1814e81e17
make COFF work like ELF and macho, by splitting out into its own
...
header even though there is only one COFF target.
llvm-svn: 77204
2009-07-27 16:45:59 +00:00
ff1f401f9b
don't create default text/data sections for all targets.
...
llvm-svn: 77203
2009-07-27 16:44:04 +00:00
e25817a138
Apparently alpha doesn't use ElfTargetAsmInfo (?)
...
llvm-svn: 77202
2009-07-27 16:42:14 +00:00
007031d1b4
Thumb-2 does not have RSC.
...
llvm-svn: 77201
2009-07-27 16:39:05 +00:00
782f242fd7
Add ".w" suffix for wide thumb-2 instructions.
...
llvm-svn: 77199
2009-07-27 16:31:55 +00:00
543c83e8f2
inline a method.
...
llvm-svn: 77198
2009-07-27 16:27:32 +00:00
3679ad5a77
apparently we have "windows" and "coff", which are different(?)
...
llvm-svn: 77197
2009-07-27 16:22:39 +00:00
c51f3394f3
sink text/data section creation down into the target-specific places that
...
should know about them. PECoff doesn't share these, and I want all sections
to be created by object-file-specific code.
llvm-svn: 77196
2009-07-27 16:20:58 +00:00
469ae8ac54
32-bit darwin targets support .literal16 too.
...
llvm-svn: 77191
2009-07-27 15:44:04 +00:00
86b7255776
Eliminate getNamed/getUnnamedSection, adding a new and unified getOrCreateSection
...
instead.
llvm-svn: 77186
2009-07-27 06:17:14 +00:00
149465ea06
Eliminate SectionFlags, just embed a SectionKind into Section
...
instead and drive things based off of that.
llvm-svn: 77184
2009-07-27 05:32:16 +00:00
371ec9e810
If CPSR is modified but the def is dead, then it's ok to fold the load / store.
...
llvm-svn: 77182
2009-07-27 04:18:04 +00:00
c47e109335
Use t2LDRi12 and t2STRi12 to load / store to / from stack frames. Eliminate more getOpcode calls.
...
llvm-svn: 77181
2009-07-27 03:14:20 +00:00
c8885129d8
Generate a libcall for i8 multiply.
...
llvm-svn: 77179
2009-07-27 02:44:46 +00:00
e334b34bfd
fixed incorrect lowering of ISD::SUB node. SUB has only one result value.
...
It wasn't caught during tests because we never got a sub generated, (i8 was always getting promoted to int, which in turn was broken into subc/sube). Though the optimizer leaves an i8 sub now.
llvm-svn: 77178
2009-07-27 02:26:06 +00:00
186332f898
Use the right instructions to copy between GPR and the more strictive tGPR classes. t2MOV does not match the RC requirements.
...
llvm-svn: 77175
2009-07-27 00:33:08 +00:00
0e5b149930
Merge isLoadFromStackSlot into one since it behaves the same regardless of sub-target.
...
llvm-svn: 77174
2009-07-27 00:24:36 +00:00
26b51b15ed
Just use a single isMoveInstr to catch all the cases.
...
llvm-svn: 77173
2009-07-27 00:05:15 +00:00
faede73a32
Rename tMOVhi2lor to tMOVgpr2tgpr. It's not moving from a high register to a low register. It's moving from a GPR register class to a more restrictive tGPR class. Also change tMOVlor2hir, and tMOVhir2hir.
...
llvm-svn: 77172
2009-07-26 23:59:01 +00:00
602d44fa70
untangle a TargetAsmInfo hack where ELFTargetAsmInfo would create a
...
'unnamed' bss section, but some impls would want a named one. Since
they don't have consistent behavior, just make each target do their
own thing, instead of doing something "sortof common" then having
targets change immutable objects later.
llvm-svn: 77165
2009-07-26 19:23:28 +00:00
8953720f23
Refactor. Get rid of a few more getOpcode() calls.
...
llvm-svn: 77164
2009-07-26 18:55:14 +00:00
06ad4948f5
reduce indentation
...
llvm-svn: 77161
2009-07-26 18:08:15 +00:00
fc4d4994ee
Fix the breakage caused by 76950.
...
PIC16 has special naming conventions for variables having section names specified via section attribute.
llvm-svn: 77153
2009-07-26 10:25:01 +00:00
ec7ec7c1ac
Move MSILModule and MSILWriter into the 'llvm' namespace, instead of the 'MSIL'
...
namespace which could very well conflict with non-LLVM code.
Also clean up some spacing, remove an extra header.
llvm-svn: 77146
2009-07-26 08:16:51 +00:00
9813b0b025
Eliminate some uses of DOUT, cerr, and getNameStart().
...
llvm-svn: 77145
2009-07-26 07:49:05 +00:00
1db210322a
remove a densemap from TargetAsmInfo that was uniquing the targetflags strings,
...
just use a smallstring instead.
llvm-svn: 77144
2009-07-26 07:33:58 +00:00
d2e0220cb4
simplify SectionFlagsForGlobal, even though I want to kill it.
...
llvm-svn: 77143
2009-07-26 07:17:39 +00:00
9db3a9286d
make SectionKind keep track of whether a global had an explicit
...
section specified for it or not.
llvm-svn: 77142
2009-07-26 07:14:28 +00:00
d9951203f0
simplify this code now that SectionKind knows if a global is weak or not.
...
llvm-svn: 77141
2009-07-26 07:07:01 +00:00
e45ff5cc2b
make SectionKind know whether a symbol is weak or not in addition
...
to its classification.
llvm-svn: 77140
2009-07-26 07:00:12 +00:00
29151b0218
rename Mergable -> Mergeable and Writable -> Writeable
...
llvm-svn: 77138
2009-07-26 06:48:26 +00:00
2d7270d577
remove a bunch of helper functions, just use SectionKind::get instead.
...
llvm-svn: 77135
2009-07-26 06:34:33 +00:00
fb6867c7db
simplify getSectionForMergableConstant to take a SectionKind.
...
llvm-svn: 77134
2009-07-26 06:26:55 +00:00
aae21f4915
precreate 4/8/16 byte mergable sections to simplify code.
...
llvm-svn: 77133
2009-07-26 06:16:11 +00:00
911e2b8649
introduce specialized mergable const sectionkinds for elements of size 4/8/16 to
...
simplify targets.
llvm-svn: 77132
2009-07-26 06:11:33 +00:00
6194637d66
improve the default impl of getSectionForMergableConstant by
...
putting readonly constants in the readonly section if we have one.
llvm-svn: 77131
2009-07-26 05:57:07 +00:00
1e76db06b9
make elf targets correctly handle constant pool entries that require relocations.
...
llvm-svn: 77130
2009-07-26 05:55:20 +00:00
1d68bd7f97
Rearrange all the SectionKinds and structure them into a hierarchical
...
group instead of a bunch of random unrelated ideas. Provide predicates
to categorize a SectionKind into a group, and use them instead of
getKind() throughout the code.
This also renames a ton of SectionKinds to be more consistent and
evocative, and adds a huge number of comments on the enums so that
I will hopefully be able to remember how this stuff works long from
now.
llvm-svn: 77129
2009-07-26 05:44:20 +00:00
ee01b242e8
Factor commonality in triple match routines into helper template for registering
...
classes, and migrate existing targets over.
llvm-svn: 77126
2009-07-26 05:03:33 +00:00
8e58bc9ed4
put normal data into .data instead of .data.rel on elf systems.
...
llvm-svn: 77116
2009-07-26 03:06:11 +00:00
bc981d8efa
Kill Target specific ModuleMatchQuality stuff.
...
- This was overkill and inconsistently implemented.
llvm-svn: 77114
2009-07-26 02:22:58 +00:00
47d679151b
Add TargetRegistry::lookupTarget.
...
- This is a simplified mechanism which just looks up a target based on the
target triple, with a few additional flags.
- Remove getClosestStaticTargetForModule, the moral equivalent is now:
lookupTarget(Mod->getTargetTriple, true, false, ...);
- This no longer does the fuzzy matching with target data (based on endianness
and pointer width) that getClosestStaticTargetForModule was doing, but this
was deemed unnecessary.
llvm-svn: 77111
2009-07-26 02:12:58 +00:00
3092b82255
eliminate a pointless switch stmt.
...
llvm-svn: 77110
2009-07-26 01:44:55 +00:00
397792d981
finish simplifying DarwinTargetAsmInfo::SelectSectionForGlobal
...
for now. Make the section switching directives more consistent
by not including \n and including \t for them all.
llvm-svn: 77107
2009-07-26 01:24:18 +00:00
5b42b45fb9
simplify DarwinTargetAsmInfo::SelectSectionForGlobal a bit
...
and make it more aggressive, we now put:
const int G2 __attribute__((weak)) = 42;
into the text (readonly) segment like gcc, previously we put
it into the data (readwrite) segment.
llvm-svn: 77104
2009-07-26 00:51:36 +00:00
8a37bbebfd
Add support for ARM Neon VREV instructions.
...
Patch by Anton Korzh, with some modifications from me.
llvm-svn: 77101
2009-07-26 00:39:34 +00:00
e03eecb75f
Remove Value::{isName, getNameRef}.
...
Also, change MDString to use a StringRef.
llvm-svn: 77098
2009-07-25 23:55:21 +00:00
0af00396a7
make SectionKind be a first-class pod struct instead of just
...
an enum.
llvm-svn: 77096
2009-07-25 23:21:55 +00:00
60f3b73e11
this is (unfortunately) several changes mixed together:
...
1. Spell SectionFlags::Writeable as "Writable".
2. Add predicates for deriving SectionFlags from SectionKinds.
3. Sink ELF-specific getSectionPrefixForUniqueGlobal impl into
ELFTargetAsmInfo.
4. Fix SectionFlagsForGlobal to know that BSS/ThreadBSS has the
BSS bit set (the real fix for PR4619).
5. Fix isSuitableForBSS to not put globals with explicit sections
set in BSS (which was the reason #4 wasn't fixed earlier).
6. Remove my previous hack for PR4619.
llvm-svn: 77085
2009-07-25 18:57:34 +00:00
7b5e51091e
document some invariants.
...
llvm-svn: 77084
2009-07-25 18:11:58 +00:00
2de9510572
add the most expedient hack to fix PR4619, along with a testcase.
...
Thanks to Rafael for the great example.
llvm-svn: 77083
2009-07-25 17:57:37 +00:00
691a4784db
Simplify JIT target selection.
...
- Instead of requiring targets to define a JIT quality match function, we just
have them specify if they support a JIT.
- Target selection for the JIT just gets the host triple and looks for the best
target which matches the triple and has a JIT.
llvm-svn: 77060
2009-07-25 10:09:50 +00:00
b6ee0b1d9b
Mark attributes of return insn correctly. It was being assumed safe to delete in isSafeToDelete (a thing checked-in 76281).
...
llvm-svn: 77056
2009-07-25 07:48:53 +00:00
5680b4f285
Add new helpers for registering targets.
...
- Less boilerplate == good.
llvm-svn: 77052
2009-07-25 06:49:55 +00:00
ea23c3ba46
80 col violation.
...
llvm-svn: 77041
2009-07-25 01:55:25 +00:00
c1a5cfa9a0
Get rid of a couple of unnecessary getOpcode calls.
...
llvm-svn: 77035
2009-07-25 01:25:08 +00:00
b2c22f00de
Another TODO.
...
llvm-svn: 77026
2009-07-25 00:39:37 +00:00
f3a1fce8ae
Change Thumb2 jumptable codegen to one that uses two level jumps:
...
Before:
adr r12, #LJTI3_0_0
ldr pc, [r12, +r0, lsl #2 ]
LJTI3_0_0:
.long LBB3_24
.long LBB3_30
.long LBB3_31
.long LBB3_32
After:
adr r12, #LJTI3_0_0
add pc, r12, +r0, lsl #2
LJTI3_0_0:
b.w LBB3_24
b.w LBB3_30
b.w LBB3_31
b.w LBB3_32
This has several advantages.
1. This will make it easier to optimize this to a TBB / TBH instruction +
(smaller) table.
2. This eliminate the need for ugly asm printer hack to force the address
into thumb addresses (bit 0 is one).
3. Same codegen for pic and non-pic.
4. This eliminate the need to align the table so constantpool island pass
won't have to over-estimate the size.
Based on my calculation, the later is probably slightly faster as well since
ldr pc with shifter address is very slow. That is, it should be a win as long
as the HW implementation can do a reasonable job of branch predict the second
branch.
llvm-svn: 77024
2009-07-25 00:33:29 +00:00
0dd5e1ed39
More migration to raw_ostream, the water has dried up around the iostream hole.
...
- Some clients which used DOUT have moved to DEBUG. We are deprecating the
"magic" DOUT behavior which avoided calling printing functions when the
statement was disabled. In addition to being unnecessary magic, it had the
downside of leaving code in -Asserts builds, and of hiding potentially
unnecessary computations.
llvm-svn: 77019
2009-07-25 00:23:56 +00:00
f297256136
ARM code emitter can't handle Thumb2 instructions yet. So don't even try.
...
llvm-svn: 77018
2009-07-25 00:13:11 +00:00
15d3967f92
Fix build for GCC 4.0?
...
llvm-svn: 77016
2009-07-24 23:42:33 +00:00
b2dc296910
Fix compile with 4.4 (I hope?); PR4617.
...
llvm-svn: 77015
2009-07-24 23:23:46 +00:00
edb4a70325
Revert the ConstantInt constructors back to their 2.5 forms where possible, thanks to contexts-on-types. More to come.
...
llvm-svn: 77011
2009-07-24 23:12:02 +00:00
c64ce30c67
Uh. It would be useful to actually print the operand.
...
llvm-svn: 77004
2009-07-24 20:47:38 +00:00
70fa4661eb
fix some predicates
...
llvm-svn: 76999
2009-07-24 20:27:11 +00:00
a39aaa5fd5
change SectionKindForGlobal from being a public (and
...
previously virtual) function to being a static function
in the .cpp file.
llvm-svn: 76997
2009-07-24 20:14:10 +00:00
c26c76ec1d
Disable my constant island pass optimization (to make use soimm more effectively). It caused infinite looping on lencod.
...
llvm-svn: 76995
2009-07-24 19:31:03 +00:00
708e559247
make SectionKindForGlobal target independent, and therefore non-virtual.
...
It's classifications now include elf-specific discriminators. Targets
that don't have these features (like darwin and pecoff) simply treat
data.rel like data, etc.
llvm-svn: 76993
2009-07-24 19:15:47 +00:00
5a49c54061
Add a workaround for Darwin assembler bug where it's not setting the thumb bit in Thumb2 jumptable entries. We now pass Olden.
...
llvm-svn: 76991
2009-07-24 18:54:23 +00:00
73f6651439
we already know the sectionkind when invoking SelectSectionForGlobal,
...
pass it in instead of recomputing it.
llvm-svn: 76990
2009-07-24 18:42:53 +00:00
bf9ac228f7
make SectionForGlobal non-virtual, add a hook for pic16 to do its "address=" hack.
...
llvm-svn: 76989
2009-07-24 18:34:27 +00:00
666c912ce3
Make sure thumb2 jumptable entries are aligned.
...
llvm-svn: 76986
2009-07-24 18:20:44 +00:00
886f303480
Clean up.
...
llvm-svn: 76984
2009-07-24 18:20:16 +00:00
986fc8e74b
Replace use of std::set with SmallPtrSet.
...
llvm-svn: 76983
2009-07-24 18:19:46 +00:00
b68b506d84
start refactoring pic16 section selection logic.
...
llvm-svn: 76977
2009-07-24 17:13:27 +00:00
9b6370d230
move ELF-specific code into ELFTargetAsmInfo.
...
llvm-svn: 76976
2009-07-24 17:02:17 +00:00
b6974c86f5
tidy up
...
llvm-svn: 76975
2009-07-24 16:53:52 +00:00
26f704669c
split the ELF-specific section flag inference-from-name code out
...
into its own helper function.
llvm-svn: 76974
2009-07-24 16:50:24 +00:00
a5ca93cdd5
make SectionFlagsForGlobal a private static function instead of a public
...
virtual one.
llvm-svn: 76973
2009-07-24 16:46:50 +00:00
552b407f8f
move a method up in the file, GV is always non-null, so remove a check.
...
llvm-svn: 76972
2009-07-24 16:44:01 +00:00
b34d0a2fcb
There is no need to pass the name into lib/Target/TargetAsmInfo.cpp
...
when we have a global with no section explicitly specified.
llvm-svn: 76971
2009-07-24 16:40:45 +00:00
555d1001d5
Another getName -> getNameStr
...
llvm-svn: 76967
2009-07-24 12:21:08 +00:00
12368685d8
Switch to getNameStr().
...
llvm-svn: 76962
2009-07-24 08:24:36 +00:00
95fc6ee51a
Remove unused member functions.
...
llvm-svn: 76960
2009-07-24 07:43:59 +00:00
dd2096898b
hoist section name uniquing logic up to the top-level SectionForGlobal
...
implementation, eliminating a dupe.
llvm-svn: 76953
2009-07-24 05:10:25 +00:00
c21c02aacd
reduce indentation
...
llvm-svn: 76951
2009-07-24 05:01:55 +00:00
ddf377df1a
simplify code by making special case more obvious
...
llvm-svn: 76950
2009-07-24 04:59:43 +00:00
ab0c0ef515
the 'isWeakForLinker' code is common between functions and globals, hoist it
...
and simplify some other code.
llvm-svn: 76949
2009-07-24 04:52:38 +00:00
0f5ebf5509
Replace UniqueSectionForGlobal with getSectionPrefixForUniqueGlobal.
...
The later doesn't depend on any crazy LLVM IR stuff, and this
pulls the concatenation of prefix with GV name (the root problem behind
PR4584) out one level.
llvm-svn: 76948
2009-07-24 04:49:34 +00:00
37e311a570
fix indentation.
...
llvm-svn: 76945
2009-07-24 04:11:40 +00:00
1553fdee55
use section flags more correctly.
...
llvm-svn: 76944
2009-07-24 04:08:17 +00:00
53f92dc95b
fix a mysterious and scary failure on test/CodeGen/X86/cstring.ll
...
llvm-svn: 76942
2009-07-24 03:55:48 +00:00
07bd1cd8c5
reduce api exposure: clients shouldn't call SectionKindForGlobal directly.
...
llvm-svn: 76941
2009-07-24 03:49:17 +00:00
5cd4dd391f
make Constant::getRelocationInfo return an enum, as suggested by Duncan.
...
llvm-svn: 76938
2009-07-24 03:27:21 +00:00
74b8117134
remove more bits of small section support.
...
llvm-svn: 76937
2009-07-24 03:16:53 +00:00
bc63d8bfbf
remove more remnants of small section support.
...
llvm-svn: 76936
2009-07-24 03:14:35 +00:00
26aff56462
Remove SectionKind::Small*. This was only used on mips, and is apparently
...
a sad mistake that is regretted. :)
llvm-svn: 76935
2009-07-24 03:11:51 +00:00
c3259f3ffb
Thumb2 should use the register scavenger.
...
llvm-svn: 76930
2009-07-24 01:05:51 +00:00
6cfbe61361
FLDD, FLDS, FCPYD, FCPYS, FSTD, FSTS, VMOVD, VMOVQ maps to the same instructions on all sub-targets.
...
llvm-svn: 76925
2009-07-24 00:53:56 +00:00
f37ea3ad75
Update insertps handling based on feedback. Move to a v4f32 style
...
to support vector arguments and scalar arguments correctly. Update
lowering and fix comment to refer to pinsr* instead of insertps.
llvm-svn: 76921
2009-07-24 00:33:09 +00:00
17151155ed
Remove the IA-64 backend.
...
llvm-svn: 76920
2009-07-24 00:30:09 +00:00
cdd405d804
Correctly handle the Thumb-2 imm8 addrmode. Specialize frame index elimination more exactly for Thumb-2 to get better code gen.
...
llvm-svn: 76919
2009-07-24 00:16:18 +00:00
8ce4021a40
Added a 2+-byte NOP instruction to the Intel tables,
...
for the assembler/disassembler to use.
llvm-svn: 76914
2009-07-23 23:39:34 +00:00
dc99f07113
Thumb2 does not allow the use of "pc" register as part of the load / store address.
...
llvm-svn: 76909
2009-07-23 23:09:51 +00:00
f4981105ca
Revert r75581: it causes massive breakage in the Ada
...
testsuite, due to exception handling not working
correctly. Maybe because the libgcc unwinder is
miscompiled - not sure, and I won't have time to
look into it before leaving on holiday. Note that
miscompilations of libgcc are not picked up by the
nightly testers, because they dynamically link with
libgcc, so pick up the system version rather than
the version built as part of llvm-gcc. This is a
nasty flaw in the nightly testers. (On the other
hand the Ada testsuite links with the just built
libgcc).
llvm-svn: 76895
2009-07-23 19:00:02 +00:00
d2919a1773
Fix up ARM constant island pass for Thumb2.
...
Also fixed up code to fully use the SoImm field for ADR on ARM mode.
llvm-svn: 76890
2009-07-23 18:27:47 +00:00
95a73e2eab
Since we have moved unified assembly, switch to ADR instruction instead of a the difficult-to-read .set + add syntax to materialize pc-relative address.
...
Turns out this also fixed a poor code selection on Thumb1. I have no idea why we were using a mov + add to do the same thing as ADR before.
llvm-svn: 76889
2009-07-23 18:26:03 +00:00
6deba28c6f
Fix frame index elimination to correctly handle thumb-2 addressing modes that don't allow negative offsets. During frame elimination convert *i12 opcode to a *i8 when necessary due to a negative offset.
...
llvm-svn: 76883
2009-07-23 17:06:46 +00:00
edda8cbfad
80 col violation.
...
llvm-svn: 76872
2009-07-23 07:58:08 +00:00
b1b77ca862
Support insertps via the intrinsic and add a couple of simple
...
testcases to make sure it's being generated.
llvm-svn: 76843
2009-07-23 02:22:41 +00:00
56df1e7969
Do not call getMangledName on Intrinsics.
...
llvm-svn: 76842
2009-07-23 02:11:04 +00:00
d2aeef0703
remove SectionFlags::Small: it is only used on Xcore, and we'll find
...
a better solution for it in the future.
llvm-svn: 76818
2009-07-22 23:27:22 +00:00
824ab40381
x86 isel tweak: use lea (%reg,%reg) instead of lea (,%reg,2).
...
llvm-svn: 76817
2009-07-22 23:26:55 +00:00
a0b2dc93b5
Fix typo in addrmode definition.
...
llvm-svn: 76806
2009-07-22 22:24:31 +00:00
e270d4a4dd
Use getTargetConstant instead of getConstant since it's meant as an constant operand.
...
llvm-svn: 76803
2009-07-22 22:03:29 +00:00
5899dda08c
Switch some clients to Value::getName(), and other getName() user
...
simplification.
- NFC
llvm-svn: 76789
2009-07-22 21:33:09 +00:00
99abb47dd6
Simplify some uses of Value::getName()
...
llvm-svn: 76786
2009-07-22 21:10:12 +00:00
ed1c14ba65
Fix indentation.
...
llvm-svn: 76778
2009-07-22 20:26:37 +00:00
1ec4396ee3
Eliminate a redudant check Eli pointed out.
...
llvm-svn: 76762
2009-07-22 18:08:05 +00:00
Daniel Dunbar