Commit Graph

45990 Commits

Author SHA1 Message Date
Anders Carlsson 336fd90f4d Don't try to eliminate invokes to __cxa_atexit.
llvm-svn: 127976
2011-03-20 20:21:33 +00:00
Anders Carlsson fcec2f519a Don't segfault on mutual recursion, as pointed out by Frits.
llvm-svn: 127975
2011-03-20 20:16:43 +00:00
Anders Carlsson 48a44911d3 Address comments from Frits van Bommel.
llvm-svn: 127974
2011-03-20 19:51:13 +00:00
Jakob Stoklund Olesen 35502423de Process all dead defs after rematerializing during splitting.
llvm-svn: 127973
2011-03-20 19:46:23 +00:00
Rafael Espindola 1557fd6d39 Write the section table and the section data in the same order that
gun as does. This makes it a lot easier to compare the output of both
as the addresses are now a lot closer.

llvm-svn: 127972
2011-03-20 18:44:20 +00:00
Anders Carlsson ee6bc70d2f Add an optimization to GlobalOpt that eliminates calls to __cxa_atexit, if the function passed is empty.
llvm-svn: 127970
2011-03-20 17:59:11 +00:00
Benjamin Kramer dce83c522c Avoid initializing posix_spawn_file_actions_t if not used.
- glibc falls back to fork+exec if a file actions object is present.
- On BSDs this saves a malloc.

llvm-svn: 127969
2011-03-20 15:52:24 +00:00
Jakob Stoklund Olesen e55003fb04 Also eliminate redundant spills downstream of inserted reloads.
This can happen when multiple sibling registers are spilled after live range
splitting.

llvm-svn: 127965
2011-03-20 05:44:58 +00:00
Jakob Stoklund Olesen 39488642d3 Change an argument to a LiveInterval instead of a register number to save some redundant lookups.
llvm-svn: 127964
2011-03-20 05:44:55 +00:00
Jakob Stoklund Olesen ccacd0df19 Replace a broken LiveInterval::MergeValueInAsValue() with something simpler.
llvm-svn: 127960
2011-03-19 23:02:49 +00:00
Jakob Stoklund Olesen 8698507fe1 Add debug output.
llvm-svn: 127959
2011-03-19 23:02:47 +00:00
Daniel Dunbar 327cd36f74 Revert r127953, "SimplifyCFG has stopped duplicating returns into predecessors
to canonicalize IR", it broke a lot of things.

llvm-svn: 127954
2011-03-19 21:47:14 +00:00
Evan Cheng 824a711305 SimplifyCFG has stopped duplicating returns into predecessors to canonicalize IR
to have single return block (at least getting there) for optimizations. This
is general goodness but it would prevent some tailcall optimizations.
One specific case is code like this:
int f1(void);
int f2(void);
int f3(void);
int f4(void);
int f5(void);
int f6(void);
int foo(int x) {
  switch(x) {
  case 1: return f1();
  case 2: return f2();
  case 3: return f3();
  case 4: return f4();
  case 5: return f5();
  case 6: return f6();
  }
}

=>
LBB0_2:                                 ## %sw.bb
  callq   _f1
  popq    %rbp
  ret
LBB0_3:                                 ## %sw.bb1
  callq   _f2
  popq    %rbp
  ret
LBB0_4:                                 ## %sw.bb3
  callq   _f3
  popq    %rbp
  ret

This patch teaches codegenprep to duplicate returns when the return value
is a phi and where the phi operands are produced by tail calls followed by
an unconditional branch:

sw.bb7:                                           ; preds = %entry
  %call8 = tail call i32 @f5() nounwind
  br label %return
sw.bb9:                                           ; preds = %entry
  %call10 = tail call i32 @f6() nounwind
  br label %return
return:
  %retval.0 = phi i32 [ %call10, %sw.bb9 ], [ %call8, %sw.bb7 ], ... [ 0, %entry ]
  ret i32 %retval.0

This allows codegen to generate better code like this:

LBB0_2:                                 ## %sw.bb
        jmp     _f1                     ## TAILCALL
LBB0_3:                                 ## %sw.bb1
        jmp     _f2                     ## TAILCALL
LBB0_4:                                 ## %sw.bb3
        jmp     _f3                     ## TAILCALL

rdar://9147433

llvm-svn: 127953
2011-03-19 17:17:39 +00:00
Evan Cheng b1f3b4989f Minor code re-structuring.
llvm-svn: 127952
2011-03-19 17:03:16 +00:00
Nadav Rotem e7a101ccab Add support for legalizing UINT_TO_FP of vectors on platforms which do
not have native support for this operation (such as X86).
The legalized code uses two vector INT_TO_FP operations and is faster
than scalarizing.

llvm-svn: 127951
2011-03-19 13:09:10 +00:00
Stuart Hastings 12d5312622 Reapply 127939 since Daniel fixed the breakage. <rdar://problem/9012638>
llvm-svn: 127944
2011-03-19 02:42:31 +00:00
Stuart Hastings 08b4daa191 Revert 127939. <rdar://problem/9012638>
llvm-svn: 127943
2011-03-19 02:33:56 +00:00
Stuart Hastings 83d4a28d1f Revise r126127 to address Daniel's comments. <rdar://problem/9012638>
llvm-svn: 127939
2011-03-19 01:32:01 +00:00
Johnny Chen 0c5f670fe7 Fixed an assert by the ARM disassembler for LDRD_PRE/POST.
The relevant instruction table entries were changed sometime ago to no longer take
<Rt2> as an operand.  Modify ARMDisassemblerCore.cpp to accomodate the change and
add a test case.

llvm-svn: 127935
2011-03-19 01:16:20 +00:00
Ted Kremenek 32aea2e401 Tweak CrashRecoveryContextCleanup to provide an easy method for clients to select between 'delete' and 'destructor' cleanups, and allow the destructor of CrashRecoveryContextCleanupRegister to be pseudo re-entrant.
llvm-svn: 127929
2011-03-19 00:59:37 +00:00
Ted Kremenek 794a0714ad Tweak CrashRecoveryContext::GetCurrent() to return quickly if 'gCrsahRecoveryEnabled' is false. This avoids us needing to go to thread local storage for
the performance sensitive case where we are compiling code.

llvm-svn: 127928
2011-03-19 00:59:33 +00:00
Devang Patel 2c7ee2700c If an AllocaInst referred by DbgDeclareInst is used by a LoadInst then the LoadInst should also get a corresponding llvm.dbg.value intrinsic.
llvm-svn: 127924
2011-03-18 23:45:43 +00:00
Devang Patel 3ac171d49a Remove dead code.
llvm-svn: 127923
2011-03-18 23:33:58 +00:00
Devang Patel c1431e6e84 Consider debug info intrinsics pointing to null value as dead instructions.
llvm-svn: 127922
2011-03-18 23:28:02 +00:00
Jim Grosbach 54140eb568 Silence a warning.
llvm-svn: 127918
2011-03-18 22:50:49 +00:00
Owen Anderson 1d2f5cebe4 Add support to the ARM asm parser for the register-shifted-register forms of basic instructions like ADD. More work left to be done to support other instances of shifter ops in the ISA.
llvm-svn: 127917
2011-03-18 22:50:18 +00:00
Jim Grosbach 7b162490fd Beginnings of MC-JIT code generation.
Proof-of-concept code that code-gens a module to an in-memory MachO object.
This will be hooked up to a run-time dynamic linker library (see: llvm-rtdyld
for similarly conceptual work for that part) which will take the compiled
object and link it together with the rest of the system, providing back to the
JIT a table of available symbols which will be used to respond to the
getPointerTo*() queries.

llvm-svn: 127916
2011-03-18 22:48:41 +00:00
Evan Cheng dc1d626a3d Match a few more obvious patterns to revsh. rdar://9147637.
llvm-svn: 127913
2011-03-18 21:52:42 +00:00
Jakob Stoklund Olesen 816f5f4c2a Extend live debug values down the dominator tree by following copies.
The llvm.dbg.value intrinsic refers to SSA values, not virtual registers, so we
should be able to extend the range of a value by tracking that value through
register copies. This greatly improves the debug value tracking for function
arguments that for some reason are copied to a second virtual register at the
end of the entry block.

We only extend the debug value range where its register is killed. All original
llvm.dbg.value locations are still respected.

Copies from physical registers are ignored. That should not be a problem since
the entry block already adds DBG_VALUE instructions for the virtual registers
holding the function arguments.

llvm-svn: 127912
2011-03-18 21:42:19 +00:00
Eli Friedman 59721e3238 Revert r127852; it's apparently causing an ICE on mingw.
llvm-svn: 127909
2011-03-18 21:12:29 +00:00
Owen Anderson 9c6456e82e Clean whitespace.
llvm-svn: 127900
2011-03-18 19:47:14 +00:00
Owen Anderson 6d55745d2f Reduce code duplication.
llvm-svn: 127899
2011-03-18 19:46:58 +00:00
Justin Holewinski 0984dcc077 PTX: Fix various codegen issues
- Emit mad instead of mad.rn for shader model 1.0
- Emit explicit mov.u32 instructions for reading global variables
- (most PTX instructions cannot take global variable immediates)

llvm-svn: 127895
2011-03-18 19:24:28 +00:00
Jim Grosbach 806d507b0f setExecutable() should default to success if there's nothing custom for it.
llvm-svn: 127891
2011-03-18 18:51:03 +00:00
Owen Anderson eb4b63d66e Thumb2 PC-relative loads require a fixup rather than just an immediate.
llvm-svn: 127888
2011-03-18 17:42:55 +00:00
Andrew Trick 1c4b42d00f Avoid creating canonical induction variables for non-native types.
For example, on 32-bit architecture, don't promote all uses of the IV
to 64-bits just because one use is a 64-bit cast.
Alternate implementation of the patch by Arnaud de Grandmaison.

llvm-svn: 127884
2011-03-18 16:50:32 +00:00
Joerg Sonnenberger 3fbfcc0e1e Support explicit argument forms for the X86 string instructions.
For now, only the default segments are supported.

llvm-svn: 127875
2011-03-18 11:59:40 +00:00
Che-Liang Chiou b1df0fe1cc ptx: fix parameter order that is reversed
llvm-svn: 127874
2011-03-18 11:23:56 +00:00
Che-Liang Chiou ff9d938e33 ptx: add unconditional and conditional branch
llvm-svn: 127873
2011-03-18 11:08:52 +00:00
NAKAMURA Takumi bac0d769cd raw_ostream: [PR6745] Tweak formatting (double)%e for Windows hosts.
On MSVCRT and compatible, output of %e is incompatible to Posix by default. Number of exponent digits should be at least 2. "%+03d"

FIXME: Implement our formatter in future!
llvm-svn: 127872
2011-03-18 09:30:10 +00:00
Bill Wendling a50db6544f Initialize the only-used-with-PPC-double-double parts of the APFloat class. This
makes valgrind stop complaining about uninitialized variables being read when it
accesses a bitfield (category) that shares its bits with these variables.

llvm-svn: 127871
2011-03-18 09:09:44 +00:00
Jakob Stoklund Olesen 27320cb864 Hoist spills when the same value is known to be in less loopy sibling registers.
Stack slot real estate is virtually free compared to registers, so it is
advantageous to spill earlier even though the same value is now kept in both a
register and a stack slot.

Also eliminate redundant spills by extending the stack slot live range
underneath reloaded registers.

This can trigger a dead code elimination, removing copies and even reloads that
were only feeding spills.

llvm-svn: 127868
2011-03-18 04:23:06 +00:00
Jakob Stoklund Olesen fdc09941f2 Accept instructions that read undefined values.
This is not supposed to happen, but I have seen the x86 rematter getting
confused when rematerializing partial redefs.

llvm-svn: 127857
2011-03-18 03:06:04 +00:00
Jakob Stoklund Olesen c099dde918 Be more accurate about the slot index reading a register when dealing with defs
and early clobbers.

Assert when trying to find an undefined value.

llvm-svn: 127856
2011-03-18 03:06:02 +00:00
Rafael Espindola 7c9cc46165 Check RequiresNullTerminator first, or we might read from an invalid address.
llvm-svn: 127853
2011-03-18 02:55:51 +00:00
Eli Friedman 1a916a3c0c Add a target-specific branchless method for double-width relational
comparisons on x86.  Essentially, the way this works is that SUB+SBB sets
the relevant flags the same way a double-width CMP would.

This is a substantial improvement over the generic lowering in LLVM. The output
is also shorter than the gcc-generated output; I haven't done any detailed
benchmarking, though.

llvm-svn: 127852
2011-03-18 02:34:11 +00:00
Ted Kremenek c44d3cf581 Augment CrashRecoveryContext to have registered "cleanup" objects that can be used to release resources during a crash.
llvm-svn: 127849
2011-03-18 02:05:11 +00:00
Johnny Chen e387f8a5e9 The disassembler for Thumb was wrongly adding 4 to the computed imm32 offset.
Remove the offending logic and update the test cases.

llvm-svn: 127843
2011-03-18 00:38:03 +00:00
Andrew Trick f8f67f0188 Remove TargetData and ValueTracking includes. I didn't mean for them to sneak in my last checkin.
llvm-svn: 127842
2011-03-18 00:36:39 +00:00
Owen Anderson 38aa83fa24 There are two pseudos in this case that are Thumb mode, not one.
llvm-svn: 127840
2011-03-17 23:52:05 +00:00