3aaaa0b2bd
For PR411:
...
This patch replaces the SymbolTable class with ValueSymbolTable which does
not support types planes. This means that all symbol names in LLVM must now
be unique. The patch addresses the necessary changes to deal with this and
removes code no longer needed as a result. This completes the bulk of the
changes for this PR. Some cleanup patches will follow.
llvm-svn: 33918
2007-02-05 20:47:22 +00:00
fe8c530d79
Fix a miscompilation in the addr mode code trying to implement X | C and
...
X + C to promote LEA formation. We would incorrectly apply it in some cases
(test) and miss it in others.
This fixes CodeGen/X86/2007-02-04-OrAddrMode.ll
llvm-svn: 33884
2007-02-04 20:18:17 +00:00
456db39ea9
ARM callseq_end should have a input flag operand so it would be scheduled right after the call.
...
llvm-svn: 33832
2007-02-03 09:11:58 +00:00
4b6c8f7f5e
Fix comments.
...
llvm-svn: 33831
2007-02-03 08:53:01 +00:00
a883f55eca
Moved the GetTargetRelocation method from PPCMachOWriter to here. It uses
...
non-Mach-O-specific information.
llvm-svn: 33819
2007-02-03 02:41:58 +00:00
2c350921e2
Moved the GetTargetRelocation method to the PPCMachOWriterInfo object. The
...
PPCMachOWriter is now trivial.
llvm-svn: 33818
2007-02-03 02:40:57 +00:00
c85e32c730
Put destructor out-of-line.
...
llvm-svn: 33817
2007-02-03 02:40:10 +00:00
36d559d369
- Branch max. displacement calculation bug.
...
- Add debugging info.
llvm-svn: 33811
2007-02-03 02:08:34 +00:00
b739f7d337
bugfix: SP isn't resetted when function has FP and there is no spills.
...
llvm-svn: 33800
2007-02-02 23:08:40 +00:00
f089c99f1d
Another thumb large stack offset codegen bug.
...
llvm-svn: 33795
2007-02-02 21:08:39 +00:00
d9d94700a4
Use MBB.empty() instead of MBB.size() for speed.
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llvm-svn: 33789
2007-02-02 19:09:19 +00:00
3ad22567b3
Watch out for empty BB.
...
llvm-svn: 33788
2007-02-02 18:49:02 +00:00
fda6550545
Ugh. Only meant to do this in thumb mode.
...
llvm-svn: 33780
2007-02-02 08:58:48 +00:00
2d5b4ac38f
add a note
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llvm-svn: 33778
2007-02-02 04:36:46 +00:00
2341c22ec7
Changes to support making the shift instructions be true BinaryOperators.
...
This feature is needed in order to support shifts of more than 255 bits
on large integer types. This changes the syntax for llvm assembly to
make shl, ashr and lshr instructions look like a binary operator:
shl i32 %X, 1
instead of
shl i32 %X, i8 1
Additionally, this should help a few passes perform additional optimizations.
llvm-svn: 33776
2007-02-02 02:16:23 +00:00
48b094d9dd
Fix a bug in getARMCMP (which translate CondCode to ARM specific CC) when the RHS is a constant.
...
llvm-svn: 33775
2007-02-02 01:53:26 +00:00
9b9e4ae796
Thumb does not have clz.
...
llvm-svn: 33773
2007-02-01 23:34:03 +00:00
2c355da986
Define PrivateGlobalPrefix for ARM Linux. (Fix CodeGen/ARM/large_stack.ll)
...
llvm-svn: 33763
2007-02-01 21:43:53 +00:00
fd522996c8
Pasto. Lots of it.
...
llvm-svn: 33762
2007-02-01 20:44:52 +00:00
903e01d407
Fix .thumb_func directive on linux.
...
llvm-svn: 33759
2007-02-01 18:25:34 +00:00
c3de9b4b14
Support for non-landing pad exception handling.
...
llvm-svn: 33755
2007-02-01 16:31:34 +00:00
f9a4c690de
- Off by one bugs in maximum displacement calculation / testing.
...
- In thumb mode, a new constpool island BB size should be 4 + 2 to
compensate for the potential padding due to alignment requirement.
llvm-svn: 33753
2007-02-01 10:16:15 +00:00
1b4e6015b4
Fixed uninitialized stuff inside LegalizeDAG. Fortunately, the only
...
affected part is codegen of "memove" inside x86 backend. This fixes
PR1144
llvm-svn: 33752
2007-02-01 08:39:52 +00:00
06736d0f88
.set pc relative displacement bug: label should be moved down one instruction
...
to just before the add r1, pc:
Before:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
mov r1, #PCRELV0
add r1, pc
Now:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
mov r1, #PCRELV0
LPCRELL0:
add r1, pc
llvm-svn: 33744
2007-02-01 03:04:49 +00:00
0df1536173
Add a note.
...
llvm-svn: 33743
2007-02-01 02:46:20 +00:00
e724492566
Also set alignment of stack-based structs to 4 in thumb mode.
...
llvm-svn: 33741
2007-02-01 02:18:36 +00:00
e7e966de5e
Special epilogue for vararg functions. We cannot do a pop to pc because
...
there follows a sp increment for the va register save region. Instead issue
a separate pop to another register, increment sp, and then return:
pop {r4, r5, r6, r7}
pop {r3}
add sp, #3 * 4
bx r3
llvm-svn: 33739
2007-02-01 01:49:46 +00:00
234e031e36
Pessmistically assume the .align 2 before the first constpool entry adds
...
two bytes padding.
llvm-svn: 33734
2007-02-01 01:09:47 +00:00
29f920877d
Possible JT improvements.
...
llvm-svn: 33733
2007-02-01 01:07:48 +00:00
f7937005a3
Fix CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
...
llvm-svn: 33732
2007-02-01 00:39:08 +00:00
ed81dea45b
Don't emit unnecessary .align directive.
...
llvm-svn: 33729
2007-01-31 23:39:39 +00:00
e5c19993cd
Handle an interesting corner case: the constpool_entry being reference is two
...
instructions away, i.e. its address is equal to PC.
%r0 = tLDRpci <cp#0>
bx
CONSTPOOL_ENTRY 0 <cp#0>, 4
llvm-svn: 33728
2007-01-31 23:35:18 +00:00
b0ff625a31
Don't want to add FramePtr to callee save spill list twice.
...
llvm-svn: 33727
2007-01-31 23:17:29 +00:00
6f1c20a8e6
Darwin ABI requires FP to point to stack slot of prev FP.
...
llvm-svn: 33724
2007-01-31 22:25:33 +00:00
2e309b15a7
Add entry.
...
llvm-svn: 33723
2007-01-31 22:11:38 +00:00
1c5837dc4a
Thumb add sp, #imm requires the immediate value be multiple of 4. For now,
...
change preferred alignment of short, byte, bool to 4.
llvm-svn: 33722
2007-01-31 22:08:40 +00:00
ffe1d9f7fa
Update comment.
...
llvm-svn: 33721
2007-01-31 22:06:44 +00:00
d7e39eb443
Dead comment.
...
llvm-svn: 33719
2007-01-31 21:31:25 +00:00
0584836340
Thumb asm syntax does not want 's' suffix for flag setting opcodes.
...
llvm-svn: 33717
2007-01-31 20:12:31 +00:00
1f3fc4b3f0
When determining whether a pc relative branch / load displacement fits in the
...
instruction field, adjust it for PC value (4 for thumb, 8 for arm).
llvm-svn: 33711
2007-01-31 19:57:44 +00:00
37ebf9317b
A relatively simple PPC optimization.
...
llvm-svn: 33709
2007-01-31 19:49:20 +00:00
7169bd8784
Some comments.
...
llvm-svn: 33707
2007-01-31 18:29:27 +00:00
456928bbbc
ConstPool island bug: watch out for cases where UserMI is the last MI of the BB.
...
llvm-svn: 33706
2007-01-31 18:19:07 +00:00
7ae4f5599e
ARM fix: Miscompilation when frame pointer can't be eliminated. Uninitialized frame pointer register is used.
...
llvm-svn: 33703
2007-01-31 13:12:46 +00:00
143576ddd2
Specify the right CC for comparison libcalls.
...
llvm-svn: 33702
2007-01-31 09:30:58 +00:00
491fcdb49b
Observe -soft-float.
...
llvm-svn: 33699
2007-01-31 08:40:13 +00:00
345877e77c
- Added Thumb constpool island support.
...
- Islands are inserted right after the user MI since thumb LDR cannot encode
negative offset.
llvm-svn: 33690
2007-01-31 02:22:22 +00:00
dd7a688bb8
During PEI, if the immediate value of sp + offset is too large (i.e. something
...
that would require > 3 instructions to materialize), load the immediate from a
constpool entry.
llvm-svn: 33667
2007-01-30 23:01:46 +00:00
83f35170fa
- Fix codegen for pc relative constant (e.g. JT) in thumb mode:
...
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
mov r1, #PCRELV0
add r1, pc
- In thumb mode, it's not possible to use .set generate a pc relative stub
address. The stub is ARM code which is in a different section from the thumb
code. Load the value from a constpool instead.
- Some asm printing clean up.
llvm-svn: 33664
2007-01-30 20:37:08 +00:00
5301e7c605
For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid
...
confusion with external linkage types.
llvm-svn: 33663
2007-01-30 20:08:39 +00:00
95b85e34ff
Copy and paste bug.
...
llvm-svn: 33658
2007-01-30 08:22:33 +00:00
0e083d0161
Darwin -static should codegen static ctors / dtors to .constructor / .destructor sections.
...
llvm-svn: 33657
2007-01-30 08:04:53 +00:00
ce8fa3ed83
Misseed thumb jumptable branch.
...
llvm-svn: 33656
2007-01-30 08:03:06 +00:00
e43ca022bf
In thumb mode, round up stack frame size to multiple of 4 since add/sub
...
sp, imm instructions implicitly multiply the offset by 4.
llvm-svn: 33653
2007-01-30 02:57:02 +00:00
c419d983d6
Thumb eliminateFrameIndex fixes.
...
llvm-svn: 33652
2007-01-30 02:36:01 +00:00
1cd3c0efb8
Change the operand orders to t_addrmode_s* to make it easier to morph
...
instructions that use these address modes to instructions that use
t_addrmode_sp.
llvm-svn: 33651
2007-01-30 02:35:32 +00:00
7fa6964dc2
- In thumb mode, if size of MachineFunction is >= 2048, force LR to be
...
spilled (if it is not already).
- If LR is spilled, use BL to implement far jumps. LR is not used as a GPR
in thumb mode so it can be clobbered if it is properly spilled / restored
in prologue / epilogue.
- If LR is force spilled but no far jump has been emitted, try undo'ing the
spill by:
push lr -> delete
pop pc -> bx lr
llvm-svn: 33650
2007-01-30 01:18:38 +00:00
863736b0ad
Use BL to implement Thumb far jumps.
...
llvm-svn: 33649
2007-01-30 01:13:37 +00:00
760c68b8af
Factor GetInstSize() out of constpool island pass.
...
llvm-svn: 33644
2007-01-29 23:45:17 +00:00
3f9f250928
Only gather frame info if debug or eh.
...
llvm-svn: 33639
2007-01-29 23:20:22 +00:00
eda5997cc8
Finish off bug 680, allowing targets to custom lower frame and return
...
address nodes.
llvm-svn: 33636
2007-01-29 22:58:52 +00:00
e3b09fbbb0
We'd still like to register allocate r2 on darwin before the callee-save
...
regs.
llvm-svn: 33635
2007-01-29 22:57:48 +00:00
52726f5837
rename flag
...
llvm-svn: 33634
2007-01-29 22:40:03 +00:00
8953edc8a5
Comment.
...
llvm-svn: 33633
2007-01-29 22:23:02 +00:00
43e8518d8b
Remember if LR register has been spilled in this function.
...
llvm-svn: 33632
2007-01-29 22:22:24 +00:00
b8d8b82950
Save all registers by default, as they can be used to pass parameters
...
for "inreg" calls
llvm-svn: 33631
2007-01-29 21:28:01 +00:00
17f250005a
Update some of the llvm in the readme
...
llvm-svn: 33630
2007-01-29 21:21:22 +00:00
d1154860a4
Flag to control exception handling.
...
llvm-svn: 33628
2007-01-29 20:48:32 +00:00
b4a2f05d1c
Landing pad-less eh for PPC.
...
llvm-svn: 33622
2007-01-29 18:51:14 +00:00
1e960cd4fd
Implement use of new IntrinsicLowering interface.
...
llvm-svn: 33619
2007-01-29 17:51:02 +00:00
0c49722b36
Fix compile error "jump to case label crosses initialization".
...
What compiler are people using that accepts this code?
llvm-svn: 33603
2007-01-28 15:39:16 +00:00
037c867b54
Propagate changes from my local tree. This patch includes:
...
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.
NOTEs: 1. Documentation will be updated soon.
2. llvm-upgrade should be improved to translate csret => sret.
Before this, there will be some unexpected test fails.
llvm-svn: 33597
2007-01-28 13:31:35 +00:00
fa663eec17
Make d'tor out-of-line.
...
llvm-svn: 33585
2007-01-27 11:40:32 +00:00
c1f1035518
Return an X86ELFWriterInfo object.
...
llvm-svn: 33574
2007-01-27 02:56:16 +00:00
2bab162501
X86 implementation of the TargetELFWriterInfo class.
...
llvm-svn: 33571
2007-01-27 02:54:30 +00:00
0cd49bc8a2
New entry.
...
llvm-svn: 33569
2007-01-27 02:33:22 +00:00
0701c5a074
Thumb jumptable support.
...
llvm-svn: 33568
2007-01-27 02:29:45 +00:00
f40b9006a8
Thumb add / sub with carry.
...
llvm-svn: 33562
2007-01-27 00:07:15 +00:00
7d47719af0
Some asm directives fixes for ELF.
...
Now we can compile llvm-gcc on arm-linux-gnueabi!
llvm-svn: 33558
2007-01-26 23:24:43 +00:00
debcb5530c
Fix a spelling error
...
llvm-svn: 33556
2007-01-26 22:40:50 +00:00
f209495e93
Handle multiple functions, properly mangle symbols, and fix support for
...
scattered relocations.
llvm-svn: 33555
2007-01-26 22:39:48 +00:00
add7f164a1
Represent tADDspi and tSUBspi as two-address instructions.
...
llvm-svn: 33551
2007-01-26 21:33:19 +00:00
c56315c2b5
Change the MachineDebugInfo to MachineModuleInfo to better reflect usage
...
for debugging and exception handling.
llvm-svn: 33550
2007-01-26 21:22:28 +00:00
d45cd5eb81
Fix Data16bitsDirective for ELF.
...
llvm-svn: 33549
2007-01-26 21:20:45 +00:00
3c9dc6bd46
Conditional branch being fixed up is not the last MI in the BB, there is a
...
unconditional branch following it. Simply invert the condition and swap
destinations if the conditional branch can reach the destination of the
unconditional branch:
beq L1
b L2
=>
bne L2
b L1
llvm-svn: 33548
2007-01-26 20:38:26 +00:00
aa26c1ab9d
If the constant pool value is a extern weak symbol, emit the weak reference.
...
llvm-svn: 33543
2007-01-26 19:51:32 +00:00
d02d75c295
extload -> zextload
...
llvm-svn: 33542
2007-01-26 19:13:16 +00:00
f9e5445ed4
Make LABEL a builtin opcode.
...
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
3ac38e99b9
For PR761:
...
The Module::setEndianness and Module::setPointerSize methods have been
removed. Instead you can get/set the DataLayout. Adjust thise accordingly.
llvm-svn: 33530
2007-01-26 08:11:39 +00:00
c4fbcb370b
For PR645:
...
Remove the Function::renameLocalSymbols function as it is no longer
needed.
llvm-svn: 33522
2007-01-26 08:01:30 +00:00
1e270b639d
SplitBlockBeforeInstr() insert a unconditional branch to the next BB. This
...
is unnecessary when we are fixing up a conditional branch since we will be
adding a unconditional branch to the destination of the original branch.
llvm-svn: 33517
2007-01-26 02:02:39 +00:00
db7f0591f3
Need to scan the function for branches even if there aren't any constants.
...
llvm-svn: 33515
2007-01-26 01:04:44 +00:00
1d138989f4
Forgot to update this.
...
llvm-svn: 33512
2007-01-25 23:31:04 +00:00
010ae386b8
Add comment, fix typo, reduce memory usage, etc.
...
llvm-svn: 33510
2007-01-25 23:18:59 +00:00
fa824b9f73
I am an idiot.
...
llvm-svn: 33509
2007-01-25 23:18:16 +00:00
313c2937f0
Fix comment.
...
llvm-svn: 33508
2007-01-25 22:48:25 +00:00
5acf2fbb43
- Tell PEI that PPC will handle stack frame rounding itself.
...
- Do not round up to max. alignment of stack object if it is > stack alignment.
It will have to be handled with dynamic aligning code.
llvm-svn: 33505
2007-01-25 22:25:04 +00:00
4f7d37fe04
Fix elf object definition.
...
llvm-svn: 33502
2007-01-25 20:11:04 +00:00
417260dc11
Doh. Skip JT branches.
...
llvm-svn: 33501
2007-01-25 19:43:52 +00:00
22c7cf504e
Added (preliminary) branch shortening capability to constantpool island pass.
...
llvm-svn: 33497
2007-01-25 03:12:46 +00:00
Reid Spencer