Commit Graph

199140 Commits

Author SHA1 Message Date
David Blaikie e169e8206b [opaque pointer type] Use pointee type retrieved from asm, rather than accessing it via the pointer type
llvm-svn: 235520
2015-04-22 16:37:35 +00:00
Reid Kleckner ec6789bcfa [cmake] Quote the path to the target exports file, fixes PR23313
llvm-svn: 235519
2015-04-22 16:23:00 +00:00
Daniel Sanders 7ea4cfcf83 [ubsan] Stop cast-overflow.cpp test leaking undefined behaviour into the exit code.
Summary:
ubsan was correctly catching the undefined behaviour but lit's shell was
failing the test anyway because the exit code was non-zero as a result of the
undefined behaviour.

This fixes the test on a mips-linux-gnu target.

Reviewers: samsonov

Reviewed By: samsonov

Subscribers: samsonov, llvm-commits, rsmith, sagar

Differential Revision: http://reviews.llvm.org/D9155

llvm-svn: 235518
2015-04-22 16:14:01 +00:00
Sanjay Patel cab567873f [x86] Add store-folded memop patterns for vcvtps2ph
Differential Revision: http://reviews.llvm.org/D7296

llvm-svn: 235517
2015-04-22 16:11:19 +00:00
Krzysztof Parzyszek 6bbcb31fda [Hexagon] Treat CFI as solo instructions
llvm-svn: 235516
2015-04-22 15:47:35 +00:00
Ilia K 5a931869d4 MI Refactor CMIUtilSystemWindows::GetExecutablesPath()
Summary:
My understanding of the Windows API call GetLastError() is that it should only be checked when ::GetModuleFileName()  returns 0 on error.
Otherwise GetExecutablesPath() could return an error despite nLen being valid if GetLastError() was inconsistent.
Patch updates function to only call GetOSLastError() when nLen == 0

Patch from ewan@codeplay.com

Reviewers: EwanCrawford

Subscribers: lldb-commits, deepak2427

Differential Revision: http://reviews.llvm.org/D9154

llvm-svn: 235515
2015-04-22 15:43:43 +00:00
Krzysztof Parzyszek badf3a6356 [Hexagon] Implement HexagonInstPrinter::printRegName
llvm-svn: 235514
2015-04-22 15:38:17 +00:00
Adhemerval Zanella 9f3dbff08a Support arm32 R_ARM_V4BX relocation format
ARM32 ELF R_ARM_V4BX relocation format is a special relocation type
that records the location of an ARMv4t BX instruction to enable a
static linker to generate ARMv4 compatible instructions.  This
relocation does not contain a reference symbol.

This patch enabled its creation by removing the requeriment of a
relocation symbol target in ELFState<ELFT>::writeSectionContent.

llvm-svn: 235513
2015-04-22 15:26:43 +00:00
Aaron Ballman c75a192f23 Silencing a -Wunused-variable warning; NFC.
llvm-svn: 235512
2015-04-22 15:25:05 +00:00
Brendon Cahoon f9751ad1b0 Fix a type mismatch assert in SCEV division
An assert was triggered when attempting to create a new SCEV
with operands of different types in the visitAddRecExpr. In this
test case, the operand types of the numerator and denominator
are different. The SCEV division code should generate a
conservative answer when this happens.

Differential Revision: http://reviews.llvm.org/D9021

llvm-svn: 235511
2015-04-22 15:06:40 +00:00
Ed Maste 6078597370 Skip additional lldb-mi tests that failed on FreeBSD
llvm-svn: 235510
2015-04-22 14:55:34 +00:00
Andrea Di Biagio 6cd2f42fac [X86][AVX] Fix failure due to a missing ISel pattern to select VBROADCAST nodes (PR23259).
This fixes a regression introduced at revision 218263.

On AVX, if we optimize for size, a splat build_vector of a load
is lowered into a VBROADCAST node. This is done even if the value type of the
splat build_vector node is v2i64.

Since AVX doesn't support v2f64/v2i64 broadcasts, revision 218263 added two
extra tablegen patterns to allow selecting a VMOVDDUPrm from an X86VBroadcast
where the scalar element comes from a loadi64/loadf64.

However, revision 218263 forgot to add an extra fallback pattern for the case
where we have a X86VBroadcast of a loadi64 with multiple uses.

This patch adds the missing tablegen pattern in X86InstrSSE.td.
This patch also adds an extra test to 'splat-for-size.ll' to verify that ISel
doesn't crash with a 'fatal error in the backend' due to a missing AVX pattern
to select v2i64 X86ISD::BROADCAST nodes.

llvm-svn: 235509
2015-04-22 14:53:39 +00:00
Olivier Sallenave c587bee405 Fixed logic to enable complex FMA formation.
llvm-svn: 235508
2015-04-22 14:07:26 +00:00
Alexey Bataev 1d67713b44 [OPENMP] Codegen for 'if' clause in 'task' directive.
If condition evaluates to true, the code executes task by calling @__kmpc_omp_task() runtime function.
If condition evaluates to false, the code executes serial version of the code by executing the following code:

call void @__kmpc_omp_task_begin_if0(<loc>, <threadid>, <task_t_ptr, returned by @__kmpc_omp_task_alloc()>);
proxy_task_entry(<gtid>, <task_t_ptr, returned by @__kmpc_omp_task_alloc()>);
call void @__kmpc_omp_task_complete_if0(<loc>, <threadid>, <task_t_ptr, returned by @__kmpc_omp_task_alloc()>);
Also it checks if the condition is constant and if it is constant it evaluates its value and then generates either parallel version of the code (if the condition evaluates to true), or the serial version of the code (if the condition evaluates to false).
Differential Revision: http://reviews.llvm.org/D9143

llvm-svn: 235507
2015-04-22 13:57:31 +00:00
Alexey Bataev 7ebe5fddac [OPENMP] Codegen for 'reduction' clause in 'for' directive.
Emit a code for reduction clause. Next code should be emitted for reductions:

static kmp_critical_name lock = { 0 };

void reduce_func(void *lhs[<n>], void *rhs[<n>]) {
    *(Type0*)lhs[0] = ReductionOperation0(*(Type0*)lhs[0], *(Type0*)rhs[0]);
      ...
        *(Type<n>-1*)lhs[<n>-1] =
          ReductionOperation<n>-1(*(Type<n>-1*)lhs[<n>-1],
            *(Type<n>-1*)rhs[<n>-1]);
}

 ...
  void *RedList[<n>] = {&<RHSExprs>[0], ..., &<RHSExprs>[<n>-1]};
   switch (__kmpc_reduce{_nowait}(<loc>, <gtid>, <n>, sizeof(RedList), RedList, reduce_func, &<lock>)) {
      case 1:
        <LHSExprs>[0] = ReductionOperation0(*<LHSExprs>[0], *<RHSExprs>[0]);
          ...
            <LHSExprs>[<n>-1] = ReductionOperation<n>-1(*<LHSExprs>[<n>-1], *<RHSExprs>[<n>-1]);
             __kmpc_end_reduce{_nowait}(<loc>, <gtid>, &<lock>);
              break;
               case 2:
                 Atomic(<LHSExprs>[0] = ReductionOperation0(*<LHSExprs>[0], *<RHSExprs>[0]));
                   ...
                     Atomic(<LHSExprs>[<n>-1] = ReductionOperation<n>-1(*<LHSExprs>[<n>-1], *<RHSExprs>[<n>-1]));
                      break;
                       default:;
                        }
                        Reduction variables are a kind of a private variables, they have private copies, but initial values are chosen in accordance with the reduction operation.
Differential Revision: http://reviews.llvm.org/D9139

llvm-svn: 235506
2015-04-22 13:43:03 +00:00
Zoran Jovanovic b59a541926 [mips][microMIPSr6] Implement mips32 to microMIPSr6 mapping support
Differential Revision: http://reviews.llvm.org/D8661

llvm-svn: 235505
2015-04-22 13:27:34 +00:00
Pavel Labath c32e04d82c XFAILing a single test in TestConcurrentEvents
apparently, TestConcurrentEvents is still not fixed. One test has failed on Linux i386 build.
Will disable the failing test on i386 for now, and see how it goes..

llvm-svn: 235504
2015-04-22 13:20:03 +00:00
Alexey Bataev 50a6458870 [OPENMP] Codegen for 'private' clause in 'for' directive.
This patch generates helper variables which used as a private copies of the corresponding original variables inside an OpenMP 'for' directive. These generated variables are initialized by default (with the default constructor, if any). In OpenMP region references to original variables are replaced by the references to these private helper variables.
Differential Revision: http://reviews.llvm.org/D9106

llvm-svn: 235503
2015-04-22 12:24:45 +00:00
Pavel Labath 5c3c43afc1 Enable TestConcurrentEvents on Linux
After the latest changes in NativeProcessLinux, these tests should be stable now. Please revert
(and let me know) if any issue crops up.

llvm-svn: 235502
2015-04-22 12:21:06 +00:00
Alexey Bataev 9e4b820484 [OPENMP] Fixed test incompatibility for simd codegen.
llvm-svn: 235501
2015-04-22 12:20:41 +00:00
Alexey Bataev 62dbb979c0 [OPENMP] Fix use of unsigned counters in loops with zero trip count.
Patch fixes bugs in codegen for loops with unsigned counters and zero trip count. Previously preconditions for all loops were built using logic (Upper - Lower) > 0. But if the loop is a loop with zero trip count, then Upper - Lower is < 0 only for signed integer, for unsigned we're running into an underflow situation.
In this patch we're using original Lower<Upper condition to check that loop body can be executed at least once. Also this allows to skip code generation for loops, if it is known that preconditions for the loop are always false.
Differential Revision: http://reviews.llvm.org/D9103

llvm-svn: 235500
2015-04-22 11:59:37 +00:00
Leny Kholodov 592cee666e [ARM] Update R_ARM_TARGET1 command line option names (remove prefix 'arm-')
Command line options --arm-target1-rel and --arm-target1-abs have been renamed to be compatible with GNU linkers.
Two tests have been updated:
  test/elf/options/target-specific-args.test
  test/elf/ARM/rel-arm-target1.test

Differential Revision: http://reviews.llvm.org/D9037

llvm-svn: 235499
2015-04-22 11:58:09 +00:00
Leny Kholodov 9e4292c0ec [ARM] Replace branches to undefined weak functions with NOP
According to the code model (ARM, Thumb, Thumb2) this patch updates the b/bl/blx 0 instructions with NOP.
test/elf/ARM/weak-branch.test has been added with tests for all available NOP (A1, T1, T2 encodings).

Differential Revision: http://reviews.llvm.org/D8807

llvm-svn: 235498
2015-04-22 11:47:53 +00:00
Hal Finkel 0d49cf2645 [DAGCombine] Disable select(c, load,load) for indexed loads
This turned up after r235333, but was a pre-existing bug. The optimization
which transforms select(c, load, load) into a load of a select of the addresses
does not handle indexed loads (pre/post inc/dec). However, it did not check for
them either, leading to a crash if it tried to transform one of them.

llvm-svn: 235497
2015-04-22 11:32:25 +00:00
Alexey Bataev 98eb6e3d41 [OPENMP] Codegen for 'ordered' directive.
Add codegen for 'ordered' directive:

__kmpc_ordered(ident_t *, gtid);
<associated statement>;
__kmpc_end_ordered(ident_t *, gtid);
Also for 'for' directives with the dynamic scheduling and an 'ordered' clause added a call to '__kmpc_dispatch_fini_(4|8)[u]()' function after increment expression for loop control variable:

while(__kmpc_dispatch_next(&LB, &UB)) {
  idx = LB;
  while (idx <= UB) { BODY; ++idx;
    __kmpc_dispatch_fini_(4|8)[u](); // For ordered loops only.
  } // inner loop
}
Differential Revision: http://reviews.llvm.org/D9070

llvm-svn: 235496
2015-04-22 11:15:40 +00:00
Vasileios Kalintiris e7508c9fc7 Revert "[mips][FastISel] Implement shift ops for Mips fast-isel."
This reverts commit r235194. It was causing a failure in FastISel buildbots
due to sign-extension issues.

llvm-svn: 235495
2015-04-22 10:08:46 +00:00
Tamas Berghammer e7708688ba Fix signle stepping on arm when multiple thread is involved
On linux-arm we use software single stepping where setting the new
breakpoint is only possible while the process is in stopped state.
This CL moves the setup code for single stepping form the SigneStep
operation into the Resum method to avoid an error when the process
already started when we want to step one of the thread.

Differential revision: http://reviews.llvm.org/D9108

llvm-svn: 235494
2015-04-22 10:00:23 +00:00
Pavel Labath 701db36744 [DWARF CFI] Add support for DW_CFA_def_cfa_sf when parsing CIE
Summary: Just what it says on the box.

Reviewers: jasonmolenda

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D9150

llvm-svn: 235493
2015-04-22 09:47:21 +00:00
Daniel Jasper ee4a8a140a clang-format: Fix for #pragma option formatting.
Adapted patch from Sergey Razmetov. Thank you.

llvm-svn: 235492
2015-04-22 09:45:42 +00:00
James Molloy cd2334e86e [AArch64] Disable complex GEP optimization by default.
Enough concerns were raised that this optimization is pessimising some code patterns.

The obvious fix, to add a Reassociate run afterwards, causes even more pessimisation in some cases due to fewer complex addressing modes being matched. As there isn't a trivial fix for this, backing this out by default until someone gets a chance to fix the addressing mode matcher.

llvm-svn: 235491
2015-04-22 09:11:38 +00:00
Filipe Cabecinhas ea79c5b4f7 Have more strict type checks when creating BinOp nodes in BitcodeReader
Summary: Bug found with AFL.

Reviewers: rafael, bkramer

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D9015

llvm-svn: 235489
2015-04-22 09:06:21 +00:00
Simon Atanasyan 6668eb3c40 [Mips] Assign .MIPS.options section to the PT_LOAD segment
llvm-svn: 235488
2015-04-22 08:09:38 +00:00
Simon Atanasyan 5606dac67e [ELF] Allow TargetLayout descendants to control assignment sections to segments
The TargetLayout class puts two sections into the same segment if they
have equal segment types and the same section flags (SHF_xxx). To be
able to merge some sort of sections into the same segment we drop some
flags before comparison. For example to merge string sections into Data
segment we drop SHF_STRINGS and SHF_MERGE flags.

The patch allows TargetLayout descendants to drop some target specific
section flags. MIPS target needs that to merge .MIPS.options section
which has SHF_MIPS_NOSTRIP flag into the LOAD segment.

http://reviews.llvm.org/D9160

llvm-svn: 235487
2015-04-22 07:57:35 +00:00
Denis Protivensky 4b0abddeea [ARM] Implement veneers for dynamic executable linking
llvm-svn: 235486
2015-04-22 07:51:26 +00:00
Denis Protivensky f6c8938edd [ARM] Move veneer generators to base class. NFC
llvm-svn: 235485
2015-04-22 07:45:55 +00:00
Denis Protivensky 38b09f529c [ARM] Rename static veneer atoms to absolute code veneer atoms
No functional changes.

llvm-svn: 235484
2015-04-22 07:38:47 +00:00
Lang Hames 65613a634a [patchpoint] Add support for symbolic patchpoint targets to SelectionDAG and the
X86 backend.

The code generated for symbolic targets is identical to the code generated for
constant targets, except that a relocation is emitted to fix up the actual
target address at link-time. This allows IR and object files containing
patchpoints to be cached across JIT-invocations where the target address may
change.

llvm-svn: 235483
2015-04-22 06:02:31 +00:00
Craig Topper 1f429e4926 [TableGen] Use range based for loops.
llvm-svn: 235482
2015-04-22 05:27:47 +00:00
Craig Topper d05991304b [TableGen] Remove some deletes that violate ownership semantics. These don't seem to execute in our codebase today and date back to a time when there was an allocation in this function.
llvm-svn: 235481
2015-04-22 05:27:11 +00:00
Yaron Keren c60a27cb7d Revert r235219, it's not needed after r235450.
llvm-svn: 235480
2015-04-22 05:06:57 +00:00
David Blaikie 17ab82c686 Replace std::auto_ptr with std::unique_ptr
std::auto_ptr is deprecated in GCC 5.0, and we are already using
std::unique_ptr all over the place.

Patch by Xan López.

llvm-svn: 235479
2015-04-22 04:39:13 +00:00
David Blaikie 83a20fab61 Fix up Exception demo from recent opaque pointer type changes to GEP
llvm-svn: 235478
2015-04-22 04:24:43 +00:00
Craig Topper fe0cdf9899 [TableGen] Make BitRecTy::baseClassOf return true when RHS is an IntRecTy.
Previously the code was accidentally checking if 'this' was an IntRecTy which it can't be since 'this' is a BitRecTy. Looking back at the history it appears it was intended to check RHS.

llvm-svn: 235477
2015-04-22 04:18:32 +00:00
Craig Topper e8005f90f5 Don't use 'nullptr' in comment. Just use 'null'.
llvm-svn: 235476
2015-04-22 04:18:27 +00:00
David Blaikie 50a0615264 [opaque pointer types] Serialize the value type for atomic store instructions
Without pointee types the space optimization of storing only the pointer
type and not the value type won't be viable - so add the extra type
information that would be missing.

llvm-svn: 235475
2015-04-22 04:14:46 +00:00
David Blaikie 612ddbfde0 [opaque pointer types] Serialize the value type for store instructions
Without pointee types the space optimization of storing only the pointer
type and not the value type won't be viable - so add the extra type
information that would be missing.

Storeatomic coming soon.

llvm-svn: 235474
2015-04-22 04:14:42 +00:00
Duncan P. N. Exon Smith e868123d8f Linker: Add flag to override linkage rules
Add a flag to lib/Linker (and `llvm-link`) to override linkage rules.
When set, the functions in the source module *always* replace those in
the destination module.

The `llvm-link` option is `-override=abc.ll`.  All the "regular" modules
are loaded and linked first, followed by the `-override` modules.  This
is useful for debugging workflows where some subset of the module (e.g.,
a single function) is extracted into a separate file where it's
optimized differently, before being merged back in.

Patch by Luqman Aden!

llvm-svn: 235473
2015-04-22 04:11:00 +00:00
Duncan P. N. Exon Smith 0de129d421 llvm-link: Factor out loop over input files, NFC
Factor the loop for linking input files together into a combined module
into a separate function.  This is in preparation for an upcoming patch
that runs the logic twice.

Patch by Luqman Aden!

llvm-svn: 235472
2015-04-22 04:08:22 +00:00
Hans Wennborg 287231cb7a Don't dllimport/export class members with internal linkage (PR23308)
For example, a function taking a parameter with internal linkage will
itself have internal linkage since it cannot be called outside the
translation unit.

Differential Revision: http://reviews.llvm.org/D9182

llvm-svn: 235471
2015-04-22 04:05:17 +00:00
Nico Weber 38267349ee Wrap to 80 columns, fix typo in comment. No behavior change.
llvm-svn: 235470
2015-04-22 03:44:51 +00:00