Commit Graph

269751 Commits

Author SHA1 Message Date
Jonas Devlieghere e101b07a1d [Debug info] Transfer DI to fragment expressions for split integer values.
This patch teaches the SDag type legalizer how to split up debug info for
integer values that are split into a hi and lo part.

(re-commit)

Differential Revision: https://reviews.llvm.org/D36805

llvm-svn: 311181
2017-08-18 18:07:00 +00:00
Ben Dunbobbin 7b76de2dcb [lit] support unsetting env variables (again!)
This is an updated version of https://reviews.llvm.org/D22144 by @jlpeyton.

The patch was accepted but not landed.

This is useful functionality and I would like to use this to enable lit tests for environment variable behaviour.

Differential Revision: https://reviews.llvm.org/D36403

llvm-svn: 311180
2017-08-18 17:32:57 +00:00
Konstantin Zhuravlyov f5d826a294 AMDGPU/NFC: Rename few things in SIMemoryLegalizer:
- AtomicInfo -> MemOpInfo
  - getAtomicLoadInfo -> getLoadInfo
  - getAtomicStoreInfo -> getStoreInfo
  - expandAtomicLoad -> expandLoad
  - expandAtomicStore -> expandStore

Differential Revision: https://reviews.llvm.org/D36861

llvm-svn: 311179
2017-08-18 17:30:02 +00:00
Konstantin Zhuravlyov 0ebd9e18ef AMDGPU: Rename r600-mcpu.cl->amdgpu-mcpu.cl
llvm-svn: 311178
2017-08-18 17:29:07 +00:00
Marek Sokolowski f276f52014 Revert "[llvm-rc] Add basic RC scripts parsing ability."
This reverts commit r311175.

This failed some buildbots compilation.

llvm-svn: 311177
2017-08-18 17:25:55 +00:00
Jakub Kuderski 756c09a58f [Dominators] Don't print the whole tree when running with -debug
As the incremental API is now used in several transforms, printing
the whole dominator tree creates a lot of noise when running with
the `-debug` flag. This patch fixes that.

llvm-svn: 311176
2017-08-18 17:06:37 +00:00
Marek Sokolowski dbc16476c1 [llvm-rc] Add basic RC scripts parsing ability.
As for now, the parser supports a limited set of statements and
resources. This will be extended in the following patches.

Thanks to Nico Weber (thakis) for his original work in this area.

Differential Revision: https://reviews.llvm.org/D36340

llvm-svn: 311175
2017-08-18 17:05:47 +00:00
Ben Dunbobbin ac6a5aab45 [Support] env vars with empty values on windows
An environment variable can be in one of three states:

1. undefined.
2. defined with a non-empty value.
3. defined but with an empty value.

The windows implementation did not support case 3
(it was not handling errors). The Linux implementation
is already correct.

Differential Revision: https://reviews.llvm.org/D36394

llvm-svn: 311174
2017-08-18 16:55:44 +00:00
Johannes Altmanninger 849f20e4a2 [clang-diff] Add commandline arguments.
Summary:
Support command line options for build path and extra arguments
This emulates the options accepted by clang tools that use CommonOptionsParser.

Add a flag for controlling the maximum size parameter for bottom up matching.

Reviewers: arphaman

Subscribers: klimek

Differential Revision: https://reviews.llvm.org/D36177

llvm-svn: 311173
2017-08-18 16:34:22 +00:00
Johannes Altmanninger fa524d7b24 [clang-diff] Fix some errors and inconsistencies
Fix to the computation of the rightmost descendant.

Prevents root nodes from being mapped if they are already mapped.  This
only makes a difference when we compare AST Nodes other than entire
translation units, a feature which still has to be tested.

Reviewers: arphaman

Subscribers: klimek

Differential Revision: https://reviews.llvm.org/D36176

llvm-svn: 311172
2017-08-18 16:34:15 +00:00
Simon Pilgrim 879ce046ad [X86][BMI2] Added scheduling test for RORX/SARX/SHLX/SHRX instructions
llvm-svn: 311171
2017-08-18 16:26:39 +00:00
Johannes Altmanninger 5d2fd55fd9 [CommonOptionsParser] Expose ArgumentsAdjustingCompilationDatabase
This is useful for tools such as clang-diff which do not use
CommonOptionsParser due to the need for multiple compilation databases.

llvm-svn: 311170
2017-08-18 16:21:08 +00:00
Ben Dunbobbin 95637558fa Test commit.
Removed extraneous comment markers

llvm-svn: 311169
2017-08-18 16:15:36 +00:00
Brian Gesiak 8953a7c544 [Lexicon] Add "GEP"
Summary:
`getelementptr` is frequently abbreviated as "GEP", often in source files that
do not ever reference the full name of the instruction. Add it to the Lexicon,
in case readers go to look for what it means there.

Test plan:
1. `ninja sphinx`
2. Confirm that the rendered docs HTML contains the new "GEP" entry

llvm-svn: 311168
2017-08-18 15:35:53 +00:00
Simon Pilgrim 358aeae7b8 [X86][AES] Add scheduling latency/throughput tests for AES instructions
llvm-svn: 311167
2017-08-18 15:26:51 +00:00
Simon Pilgrim 9eb0869e91 [X86][PCLMUL] Add scheduling latency/throughput test for PCLMULQDQ instruction
Added it to the SSE42 tests as targets seem to always have both

llvm-svn: 311166
2017-08-18 15:08:30 +00:00
Andreas Simbuerger 8d5b257d02 [Polly][Bug fix] Wrong dependences filtering during Fully Indexed expansion
Summary:
When trying to expand memory accesses, the current version of Polly uses statement Level dependences. The actual implementation is not working in case of multiple dependences per statement. For example in the following source code :
```
void mse(double A[Ni], double B[Nj], double C[Nj], double D[Nj]) {
  int i,j;
  for (j = 0; j < Ni; j++) {
    for (int i = 0; i<Nj; i++)
S:    B[i] = i;
    for (int i = 0; i<Nj; i++)
T:    D[i] = i;

U:  A[j] = B[j];
      C[j] = D[j];
  }
}
```
The statement U has two dependences with S and T. The current version of polly fails during expansion.

This patch aims to fix this bug. For that, we use Reference Level dependences to be able to filter dependences according to statement and memory ref. The principle of expansion remains the same as before.

We also noticed that we need to bail out if load come after store (at the same position) in same statement. So a check was added to isExpandable.

Contributed by: Nicholas Bonfante <nicolas.bonfante@insa-lyon.fr>

Reviewers: Meinersbur, simbuerg, bollu

Reviewed By: Meinersbur, simbuerg

Subscribers: pollydev, llvm-commits

Differential Revision: https://reviews.llvm.org/D36791

llvm-svn: 311165
2017-08-18 15:01:18 +00:00
Simon Pilgrim ccaec26175 [X86][SHA] Add scheduling latency/throughput tests for SHA instructions
llvm-svn: 311164
2017-08-18 14:55:50 +00:00
Simon Pilgrim 7f506f7d72 [X86][MOVBE] Add scheduling latency/throughput tests for MOVBE instructions
llvm-svn: 311163
2017-08-18 14:44:31 +00:00
Sam Parker 04a7db5915 [ARM] Add PostRAScheduler option
This patch adds the option to allow also using the PostRA scheduler,
which brings the ARM backend inline with AArch64 targets. The
SchedModel can also set 'PostRAScheduler', as the R52 does, so also
query this property in the overridden function.

Differential Revision: https://reviews.llvm.org/D36866

llvm-svn: 311162
2017-08-18 14:27:51 +00:00
Tobias Grosser ec02acfb98 [GPGPU] Simplify PPCGSCop to reduce compile time [NFC]
Summary:
Drop unused parameter dimensions to reduce the size of the sets we are working
with. Especially the computed dependences tend to accumulate a lot of parameters
that are present in the input memory accesses, but often not necessary to
express the actual dependences. As isl represents maps and sets with dense
matrices, reducing the dimensionality of isl sets commonly reduces code
generation performance.

This reduces compile time from 17 to 11 seconds for our test case. While this is
not impressive, this patch helped me to identify the previous two performance
improvements and additionally also increases readability of the isl data
structures we use.

Reviewers: Meinersbur, bollu, singam-sanjay

Reviewed By: bollu

Subscribers: nemanjai, pollydev, llvm-commits, kbarton

Tags: #polly

Differential Revision: https://reviews.llvm.org/D36869

llvm-svn: 311161
2017-08-18 13:38:12 +00:00
Simon Dardis 02c9a3dfc3 [mips] Follow up comments on r310460
Use dblaikie's suggestion of cast<> instead of a seperate assert.

llvm-svn: 311160
2017-08-18 13:27:02 +00:00
Simon Pilgrim 320f89782a [X86][BMI2] Added scheduling test for MULX instructions
llvm-svn: 311159
2017-08-18 13:22:18 +00:00
Siddharth Bhat 656e629572 [Polly] [PPCGCodeGeneration] Print current Scop and loop depth in PPCGCodeGen. [NFC]
Differential Revision: https://reviews.llvm.org/D36871

llvm-svn: 311158
2017-08-18 13:16:58 +00:00
Tobias Grosser 861a387fac [GPGPU] Do not create copy statements when targetting managed memory
Summary:
They are not used and consequently do not even need to be computed. This reduces
the overall compile time for our kernel from 1m33s to 17s.

Reviewers: Meinersbur, bollu, singam-sanjay

Reviewed By: bollu

Subscribers: nemanjai, pollydev, llvm-commits, kbarton

Tags: #polly

Differential Revision: https://reviews.llvm.org/D36868

llvm-svn: 311157
2017-08-18 13:11:05 +00:00
Joerg Sonnenberger 7e680f15a5 Spelling
llvm-svn: 311156
2017-08-18 12:57:36 +00:00
Tobias Grosser 62acb344d0 [GPGPU] Synchronize after each kernel, not each copy out
Summary:
This change reduces the overall number of synchronize calls for kernels with
a lot of output data at the cost of additional synchronize calls for kernels
launched in sequence without any device to host transfers in between. As the
latter pattern is a lot less frequent, this seems a better tradeoff.

Even though the above motivation would be motivation enough, this is just
a step towards enabling ppcg to not compute to and from device copy calls
at all, which would be incorrect in case we still relied on these calls to
place our synchronization statements.

Reviewers: Meinersbur, bollu, singam-sanjay

Reviewed By: bollu

Subscribers: nemanjai, kbarton, pollydev, llvm-commits

Tags: #polly

Differential Revision: https://reviews.llvm.org/D36867

llvm-svn: 311155
2017-08-18 12:55:58 +00:00
Sjoerd Meijer ec9581e5e0 [AArch64] Do not promote f16 when subtarget HasFullFP16
Armv8.2-A adds FP16 support, i.e. f16 is not only a storage-only type, but it
also supports performing data processing on 16-bit floating-point quantities.
All the necessary (tablegen) groundwork of adding the ARMv8.2-A FP16 (scalar)
instructions was done in D15014. To take advantage of this, this patch avoids
promotion of f16 to f32 types when the subtarget supports FullFP16, which
enables instruction selection of these FP16 instructions.

Differential Revision: https://reviews.llvm.org/D36396

llvm-svn: 311154
2017-08-18 10:51:14 +00:00
Renato Golin 6fd16d37ae [Triple] Define OS Check for Haiku
This adds the OS check for the Haiku operating system, as it was
missing in the Triple class. Tests for x86_64-unknown-haiku and
i586-pc-haiku were also added.

These patches only affect Haiku and are completely harmless for
other platforms.

Patch by Calvin Hill <calvin@hakobaito.co.uk>

llvm-svn: 311153
2017-08-18 10:35:42 +00:00
Ilya Biryukov 827c8acc21 Addressed some security issues in Dockerfiles.
Summary:
- Removed --trust-server-cert from `svn checkout` invocations.
  Installing 'ca-certificates' package on ubuntu adds required CAs to
  the system and svn can do proper checkout using https.

- Added checksum verification when installing cmake from cmake.org.

Reviewers: mehdi_amini, klimek

Reviewed By: mehdi_amini

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D36673

llvm-svn: 311152
2017-08-18 09:37:23 +00:00
Diana Picus 42ea77d5c2 Revert "GlobalISel (AArch64): fix ABI at border between GPRs and SP."
This reverts commit e8fd20964798ca6d46d2729dd3a789707a6416da in an
attempt to appease the GlobalISel buildbot, which fails in the
test-suite with errors like
fpcmp: files differ without tolerance allowance

llvm-svn: 311151
2017-08-18 09:31:21 +00:00
Sam Parker 25efe769c0 [AArch64] Fix for buildbots, unused function
Removing function declaration, my previous commit broke the bots.

llvm-svn: 311150
2017-08-18 09:08:05 +00:00
Victor Leschuk 091da14423 Remove useless default case in switch
llvm-svn: 311149
2017-08-18 09:02:06 +00:00
Sam Parker 96f8959cfd [AArch64] Remove DecodeAuthLoadWriteback
The BaseAuthLoad instruction class was incorrectly passing an empty
constraint string to its parent, so I have corrected this. This makes
the DecodeAuthLoadWriteback function redundant, so I've also removed
it.

Differential Revision: https://reviews.llvm.org/D36741

llvm-svn: 311148
2017-08-18 08:39:54 +00:00
Alex Bradbury f698a29a51 Refine report_fatal_error guidance after post-commit review
Use text suggested by Justin Bogner in post-commit review of r311146 
<http://lists.llvm.org/pipermail/llvm-commits/Week-of-Mon-20170814/479898.html>, 
which makes it clear that report_fatal_error shouldn't be used when there is a 
practicable alternative. Also make this clearer in CodingStandards.

llvm-svn: 311147
2017-08-18 06:45:34 +00:00
Alex Bradbury 7182440fbd Give guidance on report_fatal_error in CodingStandards.rst and ProgrammersManual.rst
The current ProgrammersManual.rst document has a lot of well-written 
documentation on error handling thanks to @lhames. It suggests errors can be 
split cleanly into "programmatic" and "recoverable" errors. However, the 
reality in current LLVM seems to be there are a number of cases where a 
non-programmatic error is not easily recoverable. Therefore, add a note to 
indicate the existence of report_fatal_error for these cases. I've also added 
a reminder to CodingStandards.rst in the section on assertions, to indicate 
that llvm_unreachable and assertions should not be relied upon to report 
errors triggered by user input.

The ProgrammersManual is also silent on the use of LLVMContext::diagnose, 
which is used in BPF+WebAssembly+AMDGPU to report some errors during 
instruction selection. I don't address that in this patch, as it's not quite 
clear how to fit in to the current error handling story

Differential Revision: https://reviews.llvm.org/D36826

llvm-svn: 311146
2017-08-18 05:29:21 +00:00
Dean Michael Berris 7eaaa0f0f2 [XRay][compiler-rt][NFC] Expand the PIC test case for XRay
Summary:
Here we add a build with -ffunction-sections -fdata-sections and
-Wl,--gc-sections to ensure that we're still able to generate XRay
traces.

This is just adding a test, no functional changes.

Differential Revision: https://reviews.llvm.org/D36863

llvm-svn: 311145
2017-08-18 05:24:32 +00:00
Craig Topper e3edd9c9be [DAGCombiner] Fix bad comment that had immediate values swapped from the code and what they need to be to make sense. NFC
llvm-svn: 311144
2017-08-18 04:52:46 +00:00
Jatin Bhateja e739fc7d11 Test commit access
Summary: Adding a blank line.

Differential Revision: https://reviews.llvm.org/D36859

llvm-svn: 311143
2017-08-18 02:39:28 +00:00
Geoff Berry bd47e8a4f7 Revert "[MachineCopyPropagation] Extend pass to do COPY source forwarding" round 2
This reverts commit r311135.

sanitizer-x86_64-linux-android buildbot is timing out with just this
patch applied.

llvm-svn: 311142
2017-08-18 01:43:11 +00:00
Konstantin Zhuravlyov a42719406f AMDGPU: add missing amdgcn processors and tests
- gfx600
  - gfx601
  - gfx703
  - gfx902
  - gfx903

Differential Revision: https://reviews.llvm.org/D36771

llvm-svn: 311141
2017-08-18 01:13:39 +00:00
Tim Northover b6a826bdc7 Revert r311137 (GlobalISel ABI commit).
It was committed by mistake since it was in the same monorepo as the
LLVM change I was working on.

llvm-svn: 311140
2017-08-18 00:33:24 +00:00
Richard Smith c0541dfa3e Increase tail dup threshold for -O3 from 3 to 4.
We see a modest performance improvement from this slightly higher tail dup threshold.

Differential Revision: https://reviews.llvm.org/D36775

llvm-svn: 311139
2017-08-17 23:38:41 +00:00
Craig Topper 1fae3ae6f0 [X86] Remove SSE/AVX patterns for AND/XOR/OR/ANDN that checked for the inputs being bitcasted from floating point types.
There's really no reason to do this we should just let isel pick the integer version and let the execution dependency fixing pass take care of moving to FP if necessary.

It's not very reliable to look for bitcasts at the edges of patterns. If for some reason one input was bitcasted and the other wasn't, or if one was a v4f32 bitcast and one was a v2f64 bitcast, we would have fallen back to the integer pattern anyway.

llvm-svn: 311138
2017-08-17 23:20:57 +00:00
Tim Northover 48fff995d6 GlobalISel (AArch64): fix ABI at border between GPRs and SP.
If a struct would end up half in GPRs and half on SP the ABI says it should
actually go entirely on the stack. We were getting this wrong in GlobalISel
before, causing compatibility issues.

llvm-svn: 311137
2017-08-17 23:14:01 +00:00
Alexander Kornienko dea43983ae [clang-tidy] Add modernize-use-equals-default.IgnoreMacros option
llvm-svn: 311136
2017-08-17 23:07:59 +00:00
Geoff Berry 51f52c4fca Re-enable "[MachineCopyPropagation] Extend pass to do COPY source forwarding"
Two issues identified by buildbots were addressed:
    - The pass no longer forwards COPYs to physical register uses, since
      doing so can break code that implicitly relies on the physical
      register number of the use.
    - The pass no longer forwards COPYs to undef uses, since doing so
      can break the machine verifier by creating LiveRanges that don't
      end on a use (since the undef operand is not considered a use).

    [MachineCopyPropagation] Extend pass to do COPY source forwarding

    This change extends MachineCopyPropagation to do COPY source forwarding.

    This change also extends the MachineCopyPropagation pass to be able to
    be run during register allocation, after physical registers have been
    assigned, but before the virtual registers have been re-written, which
    allows it to remove virtual register COPY LiveIntervals that become dead
    through the forwarding of all of their uses.

    Reviewers: qcolombet, javed.absar, MatzeB, jonpa

    Subscribers: jyknight, nemanjai, llvm-commits, nhaehnle, mcrosier, mgorny

    Differential Revision: https://reviews.llvm.org/D30751

llvm-svn: 311135
2017-08-17 23:06:55 +00:00
Siddharth Bhat dd616e9519 [ScpInliner] Move DEBUG-TYPE to below all includes to prevent cross-module interaction. [NFC]
This fixes compile errors.

llvm-svn: 311130
2017-08-17 22:21:16 +00:00
Zachary Turner 4c432b202f Fix warning about covered switch default.
llvm-svn: 311129
2017-08-17 22:20:15 +00:00
Tom Stellard a096b12628 AMDGPU: Add R600InstPrinter class
Summary:
This is step towards separating the GCN and R600 tablegen'd code.

This is a little awkward for now, because the R600 functions won't have the
MCSubtargetInfo parameter, so we need to have AMDMGPUInstPrinter
delegate to R600InstPrinter, but once the tablegen'd code is split,
we will be able to drop the delegation and use R600InstPrinter directly.

Reviewers: arsenm

Subscribers: kzhuravl, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D36444

llvm-svn: 311128
2017-08-17 22:20:04 +00:00