e0d3426e1a
Followup to 132458, omit unnecessary stack copy when x87 input is a
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load. rdar://problem/6373334
llvm-svn: 132696
2011-06-06 23:15:58 +00:00
2f7f64f9e1
Test case for PR10085.
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llvm-svn: 132682
2011-06-06 20:03:22 +00:00
bd375f1a3f
PR10077: fix fast-isel of extractvalue of aggregate constants.
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llvm-svn: 132676
2011-06-06 05:46:34 +00:00
59652d36a5
Harden tests for windows path separators.
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llvm-svn: 132671
2011-06-05 18:20:05 +00:00
38080e8700
Fix a test that keeps breaking when allocation orders change.
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Who said FileCheck couldn't handle arbitrarily complex conditions?
llvm-svn: 132654
2011-06-04 23:34:40 +00:00
be605494ac
Reapply 132424 with fixes. This fixes PR10068.
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rdar://problem/5993888
llvm-svn: 132606
2011-06-03 23:53:54 +00:00
496fa5556f
Fix some tests that depend on register allocation.
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llvm-svn: 132602
2011-06-03 22:45:21 +00:00
e37b939793
Add test for PR10068.
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llvm-svn: 132482
2011-06-02 20:02:48 +00:00
aa318ae495
Revert 132424 to fix PR10068.
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llvm-svn: 132479
2011-06-02 19:57:47 +00:00
351422bdc8
Andy pointed out a dumb omission in this test case. Thanks Andy!
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llvm-svn: 132477
2011-06-02 19:26:49 +00:00
e239a6920e
Jakob pointed out a dumb omission in this test case. Thanks Jakob!
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llvm-svn: 132472
2011-06-02 18:44:05 +00:00
8d530ad22a
Omit unnecessary stack copy when x87 input is a load.
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rdar://problem/6373334
llvm-svn: 132458
2011-06-02 15:57:11 +00:00
7f25c32d5b
Tweak testcase for ARM bot. rdar://problem/5993888
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llvm-svn: 132454
2011-06-02 05:05:39 +00:00
324f843107
Do not drop constant values when a variable's content is described using .debug_loc entries.
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llvm-svn: 132427
2011-06-01 22:03:25 +00:00
7adc95f69e
Recommit 132404 with fixes. rdar://problem/5993888
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llvm-svn: 132424
2011-06-01 21:33:14 +00:00
aab130d995
Revert 132404 to appease a buildbot. rdar://problem/5993888
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llvm-svn: 132419
2011-06-01 19:52:20 +00:00
41b1aa466d
Cleanup test case. rdar://problem/5660695
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llvm-svn: 132408
2011-06-01 18:23:14 +00:00
7b7c102f2c
Add support for x86 CMPEQSS and friends. These instructions do a
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floating-point comparison, generate a mask of 0s or 1s, and generally
DTRT with NaNs. Only profitable when the user wants a materialized 0
or 1 at runtime. rdar://problem/5993888
llvm-svn: 132404
2011-06-01 17:17:45 +00:00
6f89e2ffaa
A forthcoming SSE patch will break this test; since the test is also
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valid for x87, re-target to x87. rdar://problem/5993888
llvm-svn: 132401
2011-06-01 16:13:09 +00:00
4d2fe66dc0
Test case for 132396. rdar://problem/5660695
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llvm-svn: 132399
2011-06-01 15:50:29 +00:00
08600bcf65
Use the dwarf->llvm mapping to print register names in the cfi
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directives.
Fixes PR9826.
llvm-svn: 132317
2011-05-30 20:20:15 +00:00
873106a932
Force a triple to make this test pass on Darwin.
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llvm-svn: 132228
2011-05-27 23:12:48 +00:00
75d99e4b70
Add a GR32_NOREX_NOSP register class and fix a bug where getMatchingSuperRegClass()
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was saying that the matching superregister class of GR32_NOREX in GR64_NOREX_NOSP
is GR64_NOREX, which drops the NOSP constraint. This fixes PR10032.
llvm-svn: 132225
2011-05-27 22:26:04 +00:00
d23bfb8a7a
Make size computation less brittle.
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llvm-svn: 132222
2011-05-27 22:05:41 +00:00
63a9cef5c2
Delete a test that is no longer relevant.
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According to PR2536, the old spiller had trouble with the IMPLICIT_DEF in this
code:
%reg1028<def> = MOV16rm %reg0, 1, %reg0, <ga:g_5>, Mem:LD(2,2) [g_5 + 0]
%reg1039<def> = IMPLICIT_DEF
%reg1038<def> = INSERT_SUBREG %reg1039, %reg1028, 2
%reg1025<def> = AND32ri %reg1038, 65534, %%EFLAGS<imp-def>
However, today we emit a zero-extending load instead:
%vreg10<def> = MOVZX32rm16 %noreg, 1, %noreg, <ga:@g_5>, %noreg; %mem:LD2[@g_5] GR32:%vreg10
%vreg0<def> = AND32ri %vreg10, 65534, %%EFLAGS<imp-def,dead>; %GR32:%vreg0,%vreg10
This makes the test pointless since it no longer creates the spiller hazard.
llvm-svn: 132210
2011-05-27 20:02:42 +00:00
3c6aed2d98
Select DW_AT_const_value size based on variable size.
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llvm-svn: 132193
2011-05-27 16:45:18 +00:00
34ef49dc74
Fix PR10029 - VerifyCoalescing failure on patterns_dfa.c of 445.gobmk.
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llvm-svn: 132181
2011-05-27 05:04:51 +00:00
b362884ca9
Renamed llvm.x86.sse42.crc32 intrinsics; crc64 doesn't exist.
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crc32.[8|16|32] have been renamed to .crc32.32.[8|16|32] and
crc64.[8|16|32] have been renamed to .crc32.64.[8|64].
llvm-svn: 132163
2011-05-26 23:13:19 +00:00
c48f7c212e
Fix test on Windows.
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llvm-svn: 132126
2011-05-26 18:00:32 +00:00
493a12bf5e
Reverting 132105: it broke some LLVM-GCC DejaGNU tests.
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llvm-svn: 132108
2011-05-26 04:09:49 +00:00
276f231c2f
Correctly handle a one-word struct passed byval on x86_64.
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rdar://problem/6920088
llvm-svn: 132105
2011-05-26 02:44:56 +00:00
c70355195c
Rewrite fast-isel integer cast handling to handle more cases, and to be simpler and more consistent.
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The practical effects here are that x86-64 fast-isel can now handle trunc from i8 to i1, and ARM fast-isel can handle many more constructs involving integers narrower than 32 bits (including loads, stores, and many integer casts).
rdar://9437928 .
llvm-svn: 132099
2011-05-25 23:49:02 +00:00
fc9bae6f8b
Replace the -unwind-tables option with a per function flag. This is more
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LTO friendly as we can now correctly merge files compiled with or without
-fasynchronous-unwind-tables.
llvm-svn: 132033
2011-05-25 03:44:17 +00:00
0f33be1b87
Fix the defaults for .eh_frame. We were marking it as writable.
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llvm-svn: 131951
2011-05-24 02:50:20 +00:00
88f9137fd7
- Teach SelectionDAG::isKnownNeverZero to return true (op x, c) when c is
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non-zero.
- Teach X86 cmov optimization to eliminate the cmov from ctlz, cttz extension
when the source of X86ISD::BSR / X86ISD::BSF is proven to be non-zero.
rdar://9490949
llvm-svn: 131948
2011-05-24 01:48:22 +00:00
6c4a319088
When checking for signed multiplication overflow, watch out for INT_MIN and -1.
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This fixes PR9845.
llvm-svn: 131919
2011-05-23 21:07:39 +00:00
9987d3098b
Test case for r131908.
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llvm-svn: 131909
2011-05-23 17:49:29 +00:00
c4d9a84159
While replacing all uses of a SDValue with another value, do not forget to transfer SDDbgValue.
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llvm-svn: 131907
2011-05-23 17:35:08 +00:00
2fd48f2730
Implement mulo x, 2 -> addo x, x in DAGCombiner.
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llvm-svn: 131800
2011-05-21 18:31:55 +00:00
e08fb1dce9
Merge and FileCheckize test cases.
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llvm-svn: 131799
2011-05-21 18:31:48 +00:00
60afcc2a6f
Add fast-isel support for byval calls on x86.
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llvm-svn: 131764
2011-05-20 22:21:04 +00:00
91f1d24736
Re-commit 131641 with fixes; de-pseudoize MOVSX16rr8 and friends.
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rdar://problem/8614450
llvm-svn: 131746
2011-05-20 19:04:40 +00:00
ad00f3d0b9
Fixed regression due to commit 131709, which disables vararg tail call optimizations on Win64
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llvm-svn: 131740
2011-05-20 17:49:39 +00:00
0bf26746d9
Rename the "sandybridge" subtarget to "corei7-avx", for GCC compatibility.
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llvm-svn: 131730
2011-05-20 15:11:26 +00:00
e0a52df6e5
Fix PR9960 by teaching SimpleRegisterCoalescing::AdjustCopiesBackFrom() to preserve
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the phikill flag.
llvm-svn: 131717
2011-05-20 03:54:04 +00:00
552f8c4819
Don't attempt to tail call optimize for Win64.
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llvm-svn: 131709
2011-05-20 00:59:28 +00:00
e8d2e9eb35
Revert r131664 and fix it in instcombine instead. rdar://9467055
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llvm-svn: 131708
2011-05-20 00:54:37 +00:00
22da799428
Add fast-isel support for zeroext and signext ret instructions on x86.
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llvm-svn: 131689
2011-05-19 22:16:13 +00:00
4014e5e208
Oddly people want to use the 'r' constraint for fp constants on x86.
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Fixes rdar://9218925
Fixes PR9601
llvm-svn: 131682
2011-05-19 21:33:47 +00:00
e53a77d3a6
Fix up this test to use explicit triples (Win64 passes a different number of arguments in registers).
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llvm-svn: 131676
2011-05-19 21:13:08 +00:00
Stuart Hastings