4 Commits

Author	SHA1	Message	Date
Matt Arsenault	fae05692a3	CodeGen: Print/parse LLTs in MachineMemOperands ... This will currently accept the old number of bytes syntax, and convert it to a scalar. This should be removed in the near future (I think I converted all of the tests already, but likely missed a few). Not sure what the exact syntax and policy should be. We can continue printing the number of bytes for non-generic instructions to avoid test churn and only allow non-scalar types for generic instructions. This will currently print the LLT in parentheses, but accept parsing the existing integers and implicitly converting to scalar. The parentheses are a bit ugly, but the parser logic seems unable to deal without either parentheses or some keyword to indicate the start of a type.	2021-06-30 16:54:13 -04:00
Zarko Todorovski	2b50ce1524	[PowerPC][AIX] Enable the default AltiVec ABI on AIX ... This patch adds support for the default AltiVec ABI for AIX. Vector registers 20 through 31 are marked as reserved and cannot be used in the default ABI. This patch adds handling for this case and also remove the default AltiVec ABI errors. Reviewed By: sfertile Differential Revision: https://reviews.llvm.org/D96351	2021-03-05 12:46:27 -05:00
Zarko Todorovski	1c051b7b70	[NFC][AIX] Rename aix-csr-vector.ll to aix-csr-vector-extabi.ll	2021-02-24 22:12:01 -05:00
Zarko Todorovski	be7d425edc	[PPC][AIX] Add vector callee saved registers for AIX extended vector ABI ... This patch is the initial patch for support of the AIX extended vector ABI. The extended ABI treats vector registers V20-V31 as non-volatile and we add them as callee saved registers in this patch. Reviewed By: sfertile Differential Revision: https://reviews.llvm.org/D88676	2020-11-24 23:01:51 -05:00