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109788 Commits

Author SHA1 Message Date
Eric Christopher e040c27fb8 Remove the need for a header and specify a triple so that the type 
sizes make sense.

llvm-svn: 136309
 2011-07-28 00:28:22 +00:00
Eric Christopher 1137086e19 Fix this up for clang codegen versus llvm-gcc. 
llvm-svn: 136308
 2011-07-28 00:25:28 +00:00
Eric Christopher 9c8dece1b6 Fix this test to work for arm and on all platforms. 
llvm-svn: 136307
 2011-07-28 00:22:59 +00:00
Richard Trieu 82398f9cd6 Add template instantiations to the output of -ast-dump. 
llvm-svn: 136306
 2011-07-28 00:19:05 +00:00
Eric Christopher 18a53fca27 Add a triple to this test and make sure it passes on arm where it was 
supposed to.

llvm-svn: 136305
 2011-07-28 00:13:53 +00:00
Eric Christopher ddc29f002e Correct the triple here. 
llvm-svn: 136304
 2011-07-28 00:11:03 +00:00
Eric Christopher 6455d84653 This works on arm. 
llvm-svn: 136303
 2011-07-28 00:10:10 +00:00
Eric Christopher 1aa80a57e0 Apparently this does work on arm. 
llvm-svn: 136302
 2011-07-28 00:09:38 +00:00
Eric Christopher 8afab4d19e This was meant to test arm anyhow, make the registers agree with the 
instruction and the architecture for which the instruction exists.

llvm-svn: 136301
 2011-07-28 00:08:06 +00:00
Eric Christopher f65a0e50ff Remove this test, it's actually testing something that clang doesn't support. 
llvm-svn: 136300
 2011-07-28 00:03:07 +00:00
Eric Christopher 3befed71c6 XFAIL this test on ARM. Filed PR10518 to track. 
llvm-svn: 136299
 2011-07-27 23:48:42 +00:00
Eric Christopher 93dd260cc9 Remove the optimization option for this test. 
llvm-svn: 136298
 2011-07-27 23:46:26 +00:00
Eric Christopher 60962757d1 No one cares about ppc, but make this work for arm and x86 and xfail the rest. 
llvm-svn: 136297
 2011-07-27 23:44:48 +00:00
Chad Rosier 02cc82c234 Test for r136294. 
llvm-svn: 136296
 2011-07-27 23:37:42 +00:00
Owen Anderson b81af2abe0 Refactor and improve the encodings/decodings for addrmode3 loads, and make the writeback operand always the first. 
llvm-svn: 136295
 2011-07-27 23:36:57 +00:00
Chad Rosier 7742b5de70 The -fapple-kext flag was designed to "do the right thing" for building code for 
use in KEXTs. However, users/Xcode still need to tweak the linker flags to do 
the right thing, and end up using -Xlinker, for example.  Instead, have the 
driver "do the right thing" when linking when -fapple-kext is present on the 
command line, and we should have Xcode use -fapple-kext instead of setting other
flags like -Xlinker -kext or -nodefaultlibs.
rdar://7809940

llvm-svn: 136294
 2011-07-27 23:36:45 +00:00
Enrico Granata 7703020e1b another possible incarnation of a C++ string straight from llvm-gcc build 5658 
llvm-svn: 136293
 2011-07-27 23:33:58 +00:00
Evan Cheng eda1d4f3ba Emit an error is asm parser parsed X86_64 only registers, e.g. %rax, %sil. 
This can happen in cases where TableGen generated asm matcher cannot check
whether a register operand is in the right register class. e.g. mem operands.

rdar://8204588

llvm-svn: 136292
 2011-07-27 23:22:03 +00:00
Howard Hinnant f4a797e3d2 Optimizing valarray::operator=(some-valarray-expression) 
llvm-svn: 136291
 2011-07-27 23:19:59 +00:00
Johnny Chen 847f511300 Modify: 
self.expect("expression -- '(anonymous namespace)::i'", VARIABLES_DISPLAYED_CORRECTLY,
            substrs = [" = 3"])

to get rid of the '(anonymous namespace)', which is not c++ syntax, thingy fed to the expression parser.
According to rdar://problem/8668674.  It is still marked expectedFailure since the bug has not been fixed.

llvm-svn: 136290
 2011-07-27 23:17:56 +00:00
Jim Grosbach e37f7dc349 ARM assembly parsing and encoding for USUB16 and USUB8. 
llvm-svn: 136289
 2011-07-27 23:10:05 +00:00
Jim Grosbach 05f80d3add ARM assembly parsing and encoding for USAX. 
llvm-svn: 136288
 2011-07-27 23:07:00 +00:00
Kevin Enderby 5ef6c453a6 Fix llvm-mc handing of x86 instructions that take 8-bit unsigned immediates. 
llvm-mc gives an "invalid operand" error for instructions that take an unsigned
immediate which have the high bit set such as:
    pblendw $0xc5, %xmm2, %xmm1
llvm-mc treats all x86 immediates as signed values and range checks them.
A small number of x86 instructions use the imm8 field as a set of bits.
This change only changes those instructions and where the high bit is not
ignored.  The others remain unchanged.

llvm-svn: 136287
 2011-07-27 23:01:50 +00:00
Jim Grosbach 16dd4adcbe Clean up tabs. 
llvm-svn: 136286
 2011-07-27 22:35:06 +00:00
Jim Grosbach 57e2d3cb84 ARM assembly parsing and encoding support for USAT and USAT16. 
Use range checked immediate operands for instructions. Add tests.

llvm-svn: 136285
 2011-07-27 22:34:17 +00:00
Jim Grosbach fea7a44a9b ARM assembly parsing and encoding tests for USAD8 and USADA8. 
llvm-svn: 136284
 2011-07-27 22:23:02 +00:00
Eli Friedman 26a484852e Code generation for 'fence' instruction. 
llvm-svn: 136283
 2011-07-27 22:21:52 +00:00
Jim Grosbach 1644409b47 ARM assembly parsing and encoding tests for UQSUB16 and UQSUB8. 
llvm-svn: 136282
 2011-07-27 22:13:08 +00:00
Jim Grosbach 1a3ddffc1c Fix comment copy/paste-o. 
llvm-svn: 136281
 2011-07-27 22:11:41 +00:00
Jim Grosbach 84ecab228a ARM assembly parsing and encoding tests for UQASX and UQSAX. 
llvm-svn: 136280
 2011-07-27 22:09:30 +00:00
Jim Grosbach 928f4175c0 ARM assembly parsing and encoding tests for UQADD16 and UQADD8. 
llvm-svn: 136279
 2011-07-27 22:08:14 +00:00
Jakub Staszak da3df4302a Use BlockFrequency instead of uint32_t in BlockFrequencyInfo. 
llvm-svn: 136278
 2011-07-27 22:05:51 +00:00
Jim Grosbach 39b062bfaa ARM assembly parsing and encoding for UMULL. 
Fix parsing of the 's' suffix for the mnemonic. Add tests.

llvm-svn: 136277
 2011-07-27 22:01:42 +00:00
Devang Patel 53dc616170 Remove outdated FIXME comment. 
llvm-svn: 136275
 2011-07-27 22:00:01 +00:00
Jim Grosbach 0c398b9c7e ARM assembly parsing and encoding for UMLAL. 
Fix parsing of the 's' suffix for the mnemonic. Add tests.

llvm-svn: 136274
 2011-07-27 21:58:11 +00:00
Douglas Gregor bae31201bb Turn Sema::DelegatingCtorDecls into a LazyVector. 
llvm-svn: 136273
 2011-07-27 21:57:17 +00:00
Jim Grosbach 121c21aba9 ARM assembly parsing and encoding tests for UMAAL. 
llvm-svn: 136272
 2011-07-27 21:53:42 +00:00
John McCall d9bb743e0d The lock operand to an @synchronized statement is also 
supposed to be a full-expression;  make it so.  In ARC, make sure
we retain the lock for the entire protected block. 

llvm-svn: 136271
 2011-07-27 21:50:02 +00:00
Douglas Gregor a94a1544d8 Switch Sema::UnusedFileScopedDecls over to a LazyVector. 
- Added LazyVector::erase() to support this use case.
  - Factored out the LazyDecl-of-Decls to RecordData translation in
  the ASTWriter. There is still a pile of code duplication here to
  eliminate.

llvm-svn: 136270
 2011-07-27 21:45:57 +00:00
Bill Wendling 9c5b7ff807 Refuse to inline two functions which use different personality functions. 
llvm-svn: 136269
 2011-07-27 21:44:28 +00:00
Anna Zaks 59a3c80717 Add a utility function to the Lexer, which makes it easier to find a token after the given location. (It is a generalized version of trans::findLocationAfterSemi from ArcMigrate, which will be changed to use the Lexer utility). 
llvm-svn: 136268
 2011-07-27 21:43:43 +00:00
Jim Grosbach 7cfd32a006 ARM assembly parsing and encoding tests for UHSUB16 and UHSUB8. 
llvm-svn: 136267
 2011-07-27 21:21:59 +00:00
Jim Grosbach 3f45383ef5 ARM assembly parsing and encoding tests for UHADD16, UHADD8 and UHASX. 
llvm-svn: 136266
 2011-07-27 21:20:45 +00:00
Johnny Chen bfdf9a36d9 The SBValue.linked_list_iter() API failed for an empty list. 
Fix the bug and add a test case.

llvm-svn: 136265
 2011-07-27 21:14:01 +00:00
Jim Grosbach 03f56d9de6 ARM parsing and encoding of SBFX and UBFX. 
Encode the width operand as it encodes in the instruction, which simplifies
the disassembler and the encoder, by using the imm1_32 operand def. Add a
diagnostic for the context-sensitive constraint that the width must be in
the range [1,32-lsb].

llvm-svn: 136264
 2011-07-27 21:09:25 +00:00
Bill Wendling 2641d132d1 Keep enums stable. Append EH stuff to the end. 
llvm-svn: 136263
 2011-07-27 21:00:28 +00:00
Douglas Gregor eb08bd48e6 Introduce a new data structure, LazyVector, which is a vector whose 
contents are lazily loaded on demand from an external source (e.g., an
ExternalASTSource or ExternalSemaSource). The "loaded" entities are
kept separate from the "local" entities, so that the two can grow
independently.

Switch Sema::TentativeDefinitions from a normal vector that is eagerly
populated by the ASTReader into one of these LazyVectors, making the
ASTReader a bit more like me (i.e., lazy).

llvm-svn: 136262
 2011-07-27 20:58:46 +00:00
Jim Grosbach 36ce7492a6 ARM assembly parsing and encoding tests for UADD16, UADD8 and UASX. 
llvm-svn: 136261
 2011-07-27 20:43:44 +00:00
Jim Grosbach 542333ea05 ARM assembly parsing and encoding tests for TST instruction. 
llvm-svn: 136260
 2011-07-27 20:38:58 +00:00
Jim Grosbach f176e1addb ARM assembly parsing and encoding tests for TEQ instruction. 
llvm-svn: 136259
 2011-07-27 20:37:36 +00:00