Commit Graph

90700 Commits

Author SHA1 Message Date
Rafael Espindola 8571aa3d5d Simplify handling of hidden stubs on PowerPC.
We now handle them just like non hidden ones. This was already the case
on x86 (r207518) and arm (r207517).

llvm-svn: 270205
2016-05-20 12:00:52 +00:00
NAKAMURA Takumi 0e57b13743 SparcISelLowering.cpp: Add missing StringSwitch.h
llvm-svn: 270200
2016-05-20 10:53:56 +00:00
Chris Dewhurst ad74117af4 [Sparc] Implement getRegisterByName.
Allows Sparc registers to be specifically referred to in inline assembly.

llvm-svn: 270198
2016-05-20 10:21:01 +00:00
Benjamin Kramer 38de59e4d9 [ProfileData] Thread unique_ptr through the summary builder to avoid leaks.
llvm-svn: 270195
2016-05-20 09:18:37 +00:00
Igor Kudrin ac40e81987 [Coverage] Fix an issue where improper coverage mapping data could be loaded for an inline function.
If an inline function is observed but unused in a translation unit, dummy
coverage mapping data with zero hash is stored for this function.
If such a coverage mapping section came earlier than real one, the latter
was ignored. As a result, llvm-cov was unable to show coverage information
for those functions.

Differential Revision: http://reviews.llvm.org/D20286

llvm-svn: 270194
2016-05-20 09:14:24 +00:00
Chris Dewhurst 0dfa6bc004 [Sparc] Enable more inline assembly constraints.
Note: This is specifically to allow GCC's test pr44707 to pass.

Trivial change, not put for differential revision. Test included.

llvm-svn: 270192
2016-05-20 09:03:01 +00:00
Diana Picus 86f1f4ca77 Fix some comment typos in SelectionDAGBuilder. NFC
llvm-svn: 270190
2016-05-20 08:06:31 +00:00
Craig Topper b182715a52 [X86] Fix another AVX pattern to only be disable if VLX and BWI are supported.
llvm-svn: 270182
2016-05-20 05:10:27 +00:00
Jacques Pienaar 813e83734d [lanai] Use Optional<Reloc> in LanaiTargetMachine.
Follow r269988 and use Optional<Reloc>.

llvm-svn: 270176
2016-05-20 03:21:37 +00:00
Craig Topper 0a7a8dee2b [X86] Fix some AVX patterns to only be disabled if VLX and BWI are supported. Without this we get isel failures on the avx-intrinsics-x86.ll test in AVX512VL.
llvm-svn: 270174
2016-05-20 02:00:08 +00:00
Dan Liew 11565444ca [LibFuzzer] Fix implementation of ``GetPeakRSSMb()`` on Mac OSX.
On Linux ``rusage.ru_maxrss`` is in KiB but on Mac OSX it is in bytes.

Differential Revision: http://reviews.llvm.org/D20410

llvm-svn: 270173
2016-05-20 01:37:54 +00:00
Dan Liew e6ac1fd089 [LibFuzzer] Fix ``NumberOfCpuCores()`` on Mac OSX.
The ``nprocs`` command does not exist under Mac OSX so use
``sysctl`` instead on that platform.

Whilst I'm here

* Use ``pclose()`` instead of ``fclose()`` which the ``popen()``
  documentation says should be used.
* Check for errors that were previously unhandled.

Differential Revision: http://reviews.llvm.org/D20409

llvm-svn: 270172
2016-05-20 01:30:36 +00:00
Dylan McKay 7ec6f56040 Add AVRTargetStreamers
Reviewed by Matt Arsenault in http://reviews.llvm.org/D16311

llvm-svn: 270171
2016-05-20 01:17:38 +00:00
Quentin Colombet d84d00baf1 [RegBankSelect] Refactor the code to split the repairing and mapping of
an instruction.

Use the previously introduced RepairingPlacement class to split the code
computing the repairing placement from the code doing the actual
placement. That way, we will be able to consider different placement and
then, only apply the best one.

llvm-svn: 270168
2016-05-20 00:55:51 +00:00
Quentin Colombet 5565075418 [RegBankSelect] Add helper class for repairing code placement.
When assigning the register banks we may have to insert repairing code
to move already assigned values accross register banks.

Introduce a few helper classes to keep track of what is involved in the
repairing of an operand:
- InsertPoint and its derived classes record the positions, in the CFG,
  where repairing has to be inserted.
- RepairingPlacement holds all the insert points for the repairing of an
  operand plus the kind of action that is required to do the repairing.

This is going to be used to keep track of how the repairing should be
done, while comparing different solutions for an instruction. Indeed, we
will need the repairing placement to capture the cost of a solution and
we do not want to compute it a second time when we do the actual
repairing.

llvm-svn: 270167
2016-05-20 00:49:10 +00:00
Quentin Colombet 0d77da4ef8 [RegBankSelect] Refactor assignmentMatch to avoid testing the current
register bank twice.

Prior to this change, we were checking if the assignment for the current
machine operand was matching, then we would check if the mismatch
requires to insert repair code.
We actually already have this information from the first check, so just
pass it along.

NFCI.

llvm-svn: 270166
2016-05-20 00:42:57 +00:00
Rafael Espindola 78d947b4f5 Fix pr27728.
Sorry for the lack testcase. There is one in the pr, but it depends on
std::sort and the .ll version is 110 lines, so I don't think it is
wort it.

The bug was that we were sorting after adding a terminator, and the
sorting algorithm could end up putting the terminator in the middle of
the List vector.

With that we would create a Spans map entry keyed on nullptr which would
then be added to CUs and fail in that sorting.

llvm-svn: 270165
2016-05-20 00:38:28 +00:00
Quentin Colombet cfd97b9386 [RegBankSelect] Introduce MappingCost helper class.
This helper class will be used to represent the cost of mapping an
instruction to a specific register bank.
The particularity of these costs is that they are mostly local, thus the
frequency of the basic block is irrelevant. However, for few
instructions (e.g., phis and terminators), the cost may be non-local and
then, we need to account for the frequency of the involved basic blocks.

This will be used by the greedy mode I am working on.

llvm-svn: 270163
2016-05-20 00:35:26 +00:00
Lang Hames 45bd7ca7fc [RuntimeDyld][MachO] Add support for SUBTRACTOR relocations between anonymous
symbols on x86-64.

llvm-svn: 270157
2016-05-19 23:26:05 +00:00
Rafael Espindola 0a78f8c463 clang-format. NFC.
llvm-svn: 270156
2016-05-19 23:17:37 +00:00
Sanjoy Das 2351975860 Add const qualifiers to appease bots; NFC
llvm-svn: 270155
2016-05-19 23:15:59 +00:00
Easwaran Raman bb578ef0dd Allow -inline-threshold to override default threshold.
Before r257832, the threshold used by SimpleInliner was explicitly specified or generated from opt levels and passed to the base class Inliner's constructor. There, it was first overridden by explicitly specified -inline-threshold. The refactoring in r257832 did not preserve this behavior for all opt levels. This change brings back the original behavior.

Differential Revision: http://reviews.llvm.org/D20452

llvm-svn: 270153
2016-05-19 23:02:09 +00:00
Sanjoy Das f5f0331a3b [GuardWidening] Introduce range check merging
Sequences of range checks expressed using guards, like

  guard((I - 2) u< L)
  guard((I - 1) u< L)
  guard((I + 0) u< L)
  guard((I + 1) u< L)
  guard((I + 2) u< L)

can sometimes be combined into a smaller sequence:

  guard((I - 2) u< L AND (I + 2) u< L)

if we can prove that (I - 2) u< L AND (I + 2) u< L implies all of checks
expressed in the previous sequence.

This change teaches GuardWidening to do this kind of merging when
feasible.

llvm-svn: 270151
2016-05-19 22:55:46 +00:00
Quentin Colombet b926bdac4c Reapply r263460: [SpillPlacement] Fix a quadratic behavior in spill placement.
Using Chandler's words from r265331:
This commit was greatly exacerbating PR17409 and effectively regressed
build time for lot of (very large) code when compiled with ASan or MSan.

PR17409 is fixed by r269249, so this is fine to reapply r263460.

Original commit message:
The bad behavior happens when we have a function with a long linear
chain of basic blocks, and have a live range spanning most of this
chain, but with very few uses.

Let say we have only 2 uses.

The Hopfield network is only seeded with two active blocks where the
uses are, and each iteration of the outer loop in
`RAGreedy::growRegion()` only adds two new nodes to the network due to
the completely linear shape of the CFG.  Meanwhile,
`SpillPlacer->iterate()` visits the whole set of discovered nodes, which
adds up to a quadratic algorithm.

This is an historical accident effect from r129188.

When the Hopfield network is expanding, most of the action is happening
on the frontier where new nodes are being added. The internal nodes in
the network are not likely to be flip-flopping much, or they will at
least settle down very quickly. This means that while
`SpillPlacer->iterate()` is recomputing all the nodes in the network, it
is probably only the two frontier nodes that are changing their output.

Instead of recomputing the whole network on each iteration, we can
maintain a SparseSet of nodes that need to be updated:

- `SpillPlacement::activate()` adds the node to the todo list.
- When a node changes value (i.e., `update()` returns true), its
  neighbors are added to the todo list.
- `SpillPlacement::iterate()` only updates the nodes in the list.

The result of Hopfield iterations is not necessarily exact. It should
converge to a local minimum, but there is no guarantee that it will find
a global minimum. It is possible that updating nodes in a different
order will cause us to switch to a different local minimum. In other
words, this is not NFC, but although I saw a few runtime improvements
and regressions when I benchmarked this change, those were side effects
and actually the performance change is in the noise as expected.

Huge thanks to Jakob Stoklund Olesen <stoklund@2pi.dk> for his
feedbacks, guidance and time for the review.

llvm-svn: 270149
2016-05-19 22:40:37 +00:00
Rafael Espindola ab03eb007c Record a TargetMachine instead of a Reloc::Model.
Addresses r270095's code review.

llvm-svn: 270147
2016-05-19 22:07:57 +00:00
Dan Liew 3868e468fe [LibFuzzer]
Work around crashes in ``__sanitizer_malloc_hook()`` under Mac OSX.

Under Mac OSX we intercept calls to malloc before thread local
storage is initialised leading to a crash when accessing
``AllocTracer``. To workaround this ``AllocTracer`` is only accessed
in the hook under Linux. For symmetry ``__sanitizer_free_hook()``
is also modified in the same way.

To support this change a set of new macros
LIBFUZZER_LINUX and LIBFUZZER_APPLE has been defined which can be
used to check the target being compiled for.

Differential Revision: http://reviews.llvm.org/D20402

llvm-svn: 270145
2016-05-19 22:00:33 +00:00
Easwaran Raman 7cefdb81c5 Remove specializations of ProfileSummary
This removes the subclasses of ProfileSummary, moves the members of the derived classes to the base class.

Differential Revision: http://reviews.llvm.org/D20390

llvm-svn: 270143
2016-05-19 21:53:28 +00:00
Matthew Simpson 476c0afc01 [ARM, AArch64] Match additional patterns to ldN instructions
When matching an interleaved load to an ldN pattern, the interleaved access
pass checks that all users of the load are shuffles. If the load is used by an
instruction other than a shuffle, the pass gives up and an ldN is not
generated. This patch considers users of the load that are extractelement
instructions. It attempts to modify the extracts to use one of the available
shuffles rather than the load. After the transformation, the load is only used
by shuffles and will then be matched with an ldN pattern.

Differential Revision: http://reviews.llvm.org/D20250

llvm-svn: 270142
2016-05-19 21:39:00 +00:00
Matt Arsenault 4e3d383c46 AMDGPU: Remove pointless conversions
llvm-svn: 270139
2016-05-19 21:09:58 +00:00
Dan Gohman 847afa2231 [WebAssembly] Simplify code that never has to handle physical registers. NFC.
llvm-svn: 270137
2016-05-19 21:07:20 +00:00
Easwaran Raman e5a17e3f1d Move ProfileSummary to IR.
This splits ProfileSummary into two classes: a ProfileSummary class that has methods to convert from/to metadata and a ProfileSummaryBuilder class that computes the profiles summary which is in ProfileData.

Differential Revision: http://reviews.llvm.org/D20314

llvm-svn: 270136
2016-05-19 21:07:12 +00:00
Guozhi Wei b1d37199cc [InstCombine] Avoid combining the bitcast of a var that is used as both address and result of load instructions
This patch fixes https://llvm.org/bugs/show_bug.cgi?id=27703.

If there is a sequence of one or more load instructions, each loaded value is used as address of later load instruction, bitcast is necessary to change the value type, don't optimize it.

llvm-svn: 270135
2016-05-19 21:07:01 +00:00
Chris Bieneman 9f243e9a1c [obj2yaml] [yaml2obj] Support for MachO Load Command data
This re-applies r270115.

Many of the MachO load commands can have data appended after the command structure. This data is frequently strings, but can actually be anything. This patch adds support for three optional fields on load command yaml descriptions.

The new PayloadString YAML field is populated with the data after load commands known to have strings as extra data.

The new ZeroPadBytes YAML field is a count of zero'd bytes after the end of the load command structure before the next command. This can apply anywhere in the file. MachO2YAML verifies that bytes are zero before populating this field, and YAML2MachO will add zero'd bytes.

The new PayloadBytes YAML field stores all bytes after the end of the load command structure before the next command if they are non-zero. This is a catch all for all unhandled bytes. If MachO2Yaml populates PayloadBytes it will not populate ZeroPadBytes, instead zero'd bytes will be in the PayloadBytes structure.

llvm-svn: 270124
2016-05-19 20:54:43 +00:00
Chris Bieneman f605d10a06 Revert "[obj2yaml] [yaml2obj] Support for MachO Load Command data"
This reverts commit r270115.

This failed on several builders using GCC.

llvm-svn: 270121
2016-05-19 20:48:54 +00:00
David Blaikie bc744272f8 Fix -Wunused-variable in non-Asserts build
llvm-svn: 270118
2016-05-19 20:44:22 +00:00
Chris Bieneman f590c971c7 [obj2yaml] [yaml2obj] Support for MachO Load Command data
Many of the MachO load commands can have data appended after the command structure. This data is frequently strings, but can actually be anything. This patch adds support for three optional fields on load command yaml descriptions.

The new PayloadString YAML field is populated with the data after load commands known to have strings as extra data.

The new ZeroPadBytes YAML field is a count of zero'd bytes after the end of the load command structure before the next command. This can apply anywhere in the file. MachO2YAML verifies that bytes are zero before populating this field, and YAML2MachO will add zero'd bytes.

The new PayloadBytes YAML field stores all bytes after the end of the load command structure before the next command if they are non-zero. This is a catch all for all unhandled bytes. If MachO2Yaml populates PayloadBytes it will not populate ZeroPadBytes, instead zero'd bytes will be in the PayloadBytes structure.

llvm-svn: 270115
2016-05-19 20:40:03 +00:00
Wei Mi 0456d9dd18 Recommit r255691 since PR26509 has been fixed.
llvm-svn: 270113
2016-05-19 20:38:03 +00:00
David Blaikie f869d3190c Simplify conditional unreachable into an assertion
llvm-svn: 270111
2016-05-19 20:28:40 +00:00
Reid Kleckner e1587bce96 Fix -Wmicrosoft-enum-value warning
llvm-svn: 270110
2016-05-19 20:20:22 +00:00
Hans Wennborg 172eee9cfc X86: Don't reset the stack after calls that don't return (PR27117)
Since the calls don't return, the instruction afterwards will never run,
and is just taking up unnecessary space in the binary.

Differential Revision: http://reviews.llvm.org/D20406

llvm-svn: 270109
2016-05-19 20:15:33 +00:00
Adrian McCarthy a972d6121e Modify emitTypeInformation to use MemoryTypeTableBuilder
A baby step toward translating DIType records to CodeView.

This does not (yet) combine the record length with the record data. I'm going back and forth trying to determine if that's a good idea.

llvm-svn: 270106
2016-05-19 20:12:56 +00:00
Matthew Simpson 330a125542 [ARM, AArch64] Properly initialize InterleavedAccessPass
InterleavedAccessPass is an IR-level pass, so this change will enable testing
it with opt. This is part of D20250.

llvm-svn: 270101
2016-05-19 20:08:32 +00:00
Rafael Espindola 46107b9e62 Remember the relocation model. NFC.
This avoids passing a TargetMachine in a few places.

llvm-svn: 270095
2016-05-19 18:49:29 +00:00
Rafael Espindola cb2d266360 Style fixes. NFC.
llvm-svn: 270093
2016-05-19 18:34:20 +00:00
Zhan Jun Liau e327fa12a1 [SystemZ] Test commit - remove idea from README
Remove a comment about not supporting LRVH/STRVH from the README
LRVH/STRVH are being generated as of r269688

llvm-svn: 270092
2016-05-19 18:30:17 +00:00
Matt Arsenault 4318ea354a AMDGPU: Also look for s_cbranch_vccz
llvm-svn: 270091
2016-05-19 18:20:25 +00:00
Rui Ueyama 0376b1a2d7 pdbdump: Rename NumberOfSymbols -> SymbolRecordStreamIndex.
Differential Revision: http://reviews.llvm.org/D20441

llvm-svn: 270088
2016-05-19 18:05:58 +00:00
Ron Lieberman 562e19eecb Fix a covnersion from string to bool issue used in an assert
Problem Was exposed by -Wstring-conversion
    

llvm-svn: 270087
2016-05-19 18:05:56 +00:00
Mitch Bodart 6453501403 CodeGen: Move check of EnablePostRAScheduler to avoid disabling antidependency breaker
Previously, specifying -post-RA-scheduler=true had the side effect of
disabling the antidependency breaker, yielding different behavior than
if the post-RA-scheduler was enabled via the scheduling model.

Differential Revision: http://reviews.llvm.org/D20186

llvm-svn: 270077
2016-05-19 16:40:49 +00:00
George Rimar cf2bf9d015 Temporarily revert r270070
It broke buildbot:
http://lab.llvm.org:8011/builders/clang-s390x-linux/builds/4817/steps/ninja%20check%201/logs/stdio

Actually it is just because D20273 not yet commited, but these 2 were crossing with each other,
and I`ll better find the way to land them separatelly soon.

Initial commit message:

[llvm-mc] - Teach llvm-mc to generate compressed debug sections in zlib style.

Before this patch llvm-mc generated zlib-gnu styled sections. 
That means no SHF_COMPRESSED flag was set, magic 'zlib' signature
was used in combination with full size field. Sections were renamed to "*.z*".
This patch reimplements the compression style to zlib one as zlib-gnu looks
to be depricated everywhere.

Differential revision: http://reviews.llvm.org/D20331

llvm-svn: 270075
2016-05-19 15:58:05 +00:00
Davide Italiano 46f249b4cd [SCCP] Prefer class to struct.
llvm-svn: 270074
2016-05-19 15:58:02 +00:00
Sanjay Patel f39f42d3fb [SelectionDAG] rename/move isKnownToBeAPowerOfTwo() from TargetLowering (NFC)
There are at least 2 places (DAGCombiner, X86ISelLowering) where this could be used instead
of ad-hoc and watered down code that is trying to match a power-of-2 pattern.

Differential Revision: http://reviews.llvm.org/D20439

llvm-svn: 270073
2016-05-19 15:53:52 +00:00
Matthew Simpson 6feebe9847 [LAA] Check independence of strided accesses before forward case
This patch changes the order in which we attempt to prove the independence of
strided accesses. We previously did this after we knew the dependence distance
was positive. With this change, we check for independence before handling the
negative distance case. The patch prevents LAA from reporting forward
dependences for independent strided accesses.

This change was requested in the review of D19984.

llvm-svn: 270072
2016-05-19 15:37:19 +00:00
George Rimar 99c901fc47 [llvm-mc] - Teach llvm-mc to generate compressed debug sections in zlib style.
Before this patch llvm-mc generated zlib-gnu styled sections. 
That means no SHF_COMPRESSED flag was set, magic 'zlib' signature
was used in combination with full size field. Sections were renamed to "*.z*".
This patch reimplements the compression style to zlib one as zlib-gnu looks
to be depricated everywhere.

Differential revision: http://reviews.llvm.org/D20331

llvm-svn: 270070
2016-05-19 15:08:31 +00:00
Chad Rosier 02f25a9565 [AArch64 ] Generate a BFXIL from 'or (and X, Mask0Imm),(and Y, Mask1Imm)'.
Mask0Imm and ~Mask1Imm must be equivalent and one of the MaskImms is a shifted
mask (e.g., 0x000ffff0).  Both 'and's must have a single use.

This changes code like:

  and w8, w0, #0xffff000f
  and w9, w1, #0x0000fff0
  orr w0, w9, w8

into

  lsr w8, w1, #4
  bfi w0, w8, #4, #12

llvm-svn: 270063
2016-05-19 14:19:47 +00:00
Ranjeet Singh c520e93d9a Test commit.
llvm-svn: 270056
2016-05-19 12:44:39 +00:00
Artem Tamazov 8ce1f7177b [AMDGPU][llvm-mc] Fixes to support buffer atomics.
Fixes for MUBUF_Atomic instructions to make operand list valid:
 - For RTN insns, make a copy of $vdata_in operand as $vdata.
 - Do not add operand for GLC, it is hardcoded and comes as a token.
Workaround to avoid adding multiple default optional operands.
Tests added.

Differential Revision: http://reviews.llvm.org/D20257

llvm-svn: 270049
2016-05-19 12:22:39 +00:00
Zoran Jovanovic 5f94cedeb5 ps][microMIPS] Add R_MICROMIPS_PC21_S1 relocation
Differential Revision: http://reviews.llvm.org/D15526

llvm-svn: 270048
2016-05-19 12:20:40 +00:00
Daniel Sanders 2f2ab5102c [mips][mips16] Fix ZERO is not a CPU16Regs register error from the machine verifier.
Summary: Partially fixes PR27458

Reviewers: sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: http://reviews.llvm.org/D20330

llvm-svn: 270037
2016-05-19 10:42:14 +00:00
Andrey Turetskiy 45b22a4aff [X86] Enable RRL part of the LEA optimization pass for -O2.
Enable "Remove Redundant LEAs" part of the LEA optimization pass for -O2.
This gives 6.4% performance improve on Broadwell on nnet benchmark from Coremark-pro.
There is no significant effect on other benchmarks (Geekbench, Spec2000, Spec2006).

Differential Revision: http://reviews.llvm.org/D19659

llvm-svn: 270036
2016-05-19 10:18:29 +00:00
Zlatko Buljan e663e34e79 [mips][microMIPS] Implement BC1EQZC, BC1NEZC, BC2EQZC and BC2NEZC instructions
Differential Revision: http://reviews.llvm.org/D18352

llvm-svn: 270030
2016-05-19 07:31:28 +00:00
Craig Topper 19e04b6430 [X86] Generalize and combine some similar type constraints and node types. No changes to the isel table size so the separation wasn't buying us anything.
llvm-svn: 270026
2016-05-19 06:13:58 +00:00
Craig Topper 9152f5fcdf [X86] Simplify some type constraints by removing parts that were already implied.
llvm-svn: 270025
2016-05-19 06:13:48 +00:00
Peter Collingbourne fe12d0e3e5 CodeGen: Make the global-merge pass independently testable, and add a test.
llvm-svn: 270023
2016-05-19 04:38:56 +00:00
Vedant Kumar 9152fd17e9 Retry^3 "[ProfileData] (llvm) Use Error in InstrProf and Coverage, NFC"
Transition InstrProf and Coverage over to the stricter Error/Expected
interface.

Changes since the initial commit:
- Fix error message printing in llvm-profdata.
- Check errors in loadTestingFormat() + annotateAllFunctions().
- Defer error handling in InstrProfIterator to InstrProfReader.
- Remove the base ProfError class to work around an MSVC ICE.

Differential Revision: http://reviews.llvm.org/D19901

llvm-svn: 270020
2016-05-19 03:54:45 +00:00
Sanjoy Das b784ed36c0 [GuardWidening] Use getEquivalentICmp to fold constant compares
`ConstantRange::getEquivalentICmp` is more general, and better
factored.

llvm-svn: 270019
2016-05-19 03:53:17 +00:00
Sanjoy Das 590614c1e1 [ConstantRange] Add an getEquivalentICmp helper
Currently only its unit test uses it, but this will be used in a later
change to simplify some logic in the GuardWidening pass.

llvm-svn: 270018
2016-05-19 03:53:06 +00:00
Dan Gohman 41133a3e96 [WebAssembly] Update WebAssembly target for r269988.
llvm-svn: 270017
2016-05-19 03:00:05 +00:00
Craig Topper 4fcff19ff5 [X86] Remove some type constraint classes and use already existing stricter classes.
llvm-svn: 270013
2016-05-19 02:05:58 +00:00
Craig Topper 7ee092a268 [AVX512] Strengthen type constraints for VFIXUPIMM patterns and combine the type constraints for vector and scalar.
llvm-svn: 270012
2016-05-19 02:05:55 +00:00
Sanjay Patel b2bcd95aab reduce indentation; NFCI
llvm-svn: 270007
2016-05-19 00:33:07 +00:00
Chad Rosier e006202a4d [AArch64] Push comment into function. NFC.
llvm-svn: 270003
2016-05-18 23:51:17 +00:00
Matt Arsenault c5bebac934 AMDGPU: Fix verifier error when spilling undef subreg
llvm-svn: 270002
2016-05-18 23:35:53 +00:00
Matt Arsenault c438ef574d AMDGPU: Fix promote alloca for pointer loads
If the load has a pointer type, we don't want to change
its type.

llvm-svn: 270000
2016-05-18 23:20:24 +00:00
Sanjoy Das 52bbde2bbc [LowerGuards] Rename variable; NFC
PredicatePassProbability is a better name for what LikelyBranchWeight
was trying to express.

llvm-svn: 269999
2016-05-18 23:16:27 +00:00
Sanjoy Das 083f38939b New pass: guard widening
Summary:
Implement guard widening in LLVM. Description from GuardWidening.cpp:

The semantics of the `@llvm.experimental.guard` intrinsic lets LLVM
transform it so that it fails more often that it did before the
transform.  This optimization is called "widening" and can be used hoist
and common runtime checks in situations like these:

```
%cmp0 = 7 u< Length
call @llvm.experimental.guard(i1 %cmp0) [ "deopt"(...) ]
call @unknown_side_effects()
%cmp1 = 9 u< Length
call @llvm.experimental.guard(i1 %cmp1) [ "deopt"(...) ]
...
```

to

```
%cmp0 = 9 u< Length
call @llvm.experimental.guard(i1 %cmp0) [ "deopt"(...) ]
call @unknown_side_effects()
...
```

If `%cmp0` is false, `@llvm.experimental.guard` will "deoptimize" back
to a generic implementation of the same function, which will have the
correct semantics from that point onward.  It is always _legal_ to
deoptimize (so replacing `%cmp0` with false is "correct"), though it may
not always be profitable to do so.

NB! This pass is a work in progress.  It hasn't been tuned to be
"production ready" yet.  It is known to have quadriatic running time and
will not scale to large numbers of guards

Reviewers: reames, atrick, bogner, apilipenko, nlewycky

Subscribers: mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D20143

llvm-svn: 269997
2016-05-18 22:55:34 +00:00
Dehao Chen f16376b505 Follow-up patch of http://reviews.llvm.org/D19948 to handle missing profiles when simplifying CFG.
Summary: Set default branch weight to 1:1 if one of the branch has profile missing when simplifying CFG.

Reviewers: spatel, davidxl

Subscribers: danielcdh, llvm-commits

Differential Revision: http://reviews.llvm.org/D20307

llvm-svn: 269995
2016-05-18 22:41:03 +00:00
Haicheng Wu c01919e796 [MBP] Remove a redundant skipFunction(). NFC.
skipFunction() is called twice.

Differential Revision: http://reviews.llvm.org/D20377

llvm-svn: 269994
2016-05-18 22:34:45 +00:00
Richard Smith 61b41e0737 Work around a glibc bug: backtrace() spuriously fails if
- glibc is dynamically linked, and
 - libgcc_s is unavailable (for instance, another library is being used to
   provide the compiler runtime or libgcc is statically linked), and
 - the target is x86_64.

If we run backtrace() and it fails to find any stack frames, try using
_Unwind_Backtrace instead if available.

llvm-svn: 269992
2016-05-18 22:26:36 +00:00
Sanjay Patel f3587ec955 fix formatting; NFC
llvm-svn: 269990
2016-05-18 22:05:28 +00:00
Rafael Espindola 8c34dd8257 Delete Reloc::Default.
Having an enum member named Default is quite confusing: Is it distinct
from the others?

This patch removes that member and instead uses Optional<Reloc> in
places where we have a user input that still hasn't been maped to the
default value, which is now clear has no be one of the remaining 3
options.

llvm-svn: 269988
2016-05-18 22:04:49 +00:00
Jacques Pienaar 314444b4cd [lanai] Change the way flag setting instructions are checked.
isReturn() was returning different values with and without -g which led to
different code being generated. Change isFlagSettingInstruction to query
an instruction's effect on SR instead.

llvm-svn: 269986
2016-05-18 21:31:37 +00:00
Michael Zolotukhin d2268a73bc [LoopUnrollAnalyzer] Take into account cost of instructions controlling branches, along with their operands.
Previously, we didn't add their and their operands cost, which could've
resulted in unrolling loops for no actual benefit.

llvm-svn: 269985
2016-05-18 21:20:12 +00:00
Dan Gohman e045f67ffc [WebAssembly] Disable the MachineScheduler.
llvm-svn: 269976
2016-05-18 20:19:02 +00:00
Dehao Chen f6c0083b55 clang-format SimplifyCFG.cpp.
llvm-svn: 269974
2016-05-18 19:44:21 +00:00
Jan Vesely ae265c03f7 AMDGPU: Fix incorrect simm check
Use signed division otherwise all back jumps fail the check
Fixes regression introduced in r269951

Differential Revision: http://reviews.llvm.org/D20380

llvm-svn: 269972
2016-05-18 19:07:58 +00:00
Krzysztof Parzyszek 14a1c18448 When looking for a spill slot in reg scavenger, find one that matches RC
When looking for an available spill slot, the register scavenger would stop
after finding the first one with no register assigned to it. That slot may
have size and alignment that do not meet the requirements of the register
that is to be spilled. Instead, find an available slot that is the closest
in size and alignment to one that is needed to spill a register from RC.

Differential Revision: http://reviews.llvm.org/D20295

llvm-svn: 269969
2016-05-18 18:16:00 +00:00
Chad Rosier 91294c5bdc [AArch64] Minor refactoring. NFC.
llvm-svn: 269963
2016-05-18 17:43:11 +00:00
Sanjay Patel e99014d471 clean up; NFCI
llvm-svn: 269962
2016-05-18 17:23:38 +00:00
Rui Ueyama 350b29862f pdbdump: Print out section offsets in the publics stream.
llvm-svn: 269955
2016-05-18 16:24:16 +00:00
Chris Bieneman 2de17d49dd Re-apply: [obj2yaml] [yaml2obj] Support MachO section and section_64
This re-applies r269845, r269846, and r269850 with an included fix for a crash reported by zturner.

llvm-svn: 269953
2016-05-18 16:17:23 +00:00
Matt Arsenault a519cf593f AMDGPU: Error if branch distance exceeds limit
llvm-svn: 269951
2016-05-18 16:10:24 +00:00
Matt Arsenault 1735da460b AMDGPU: Other sizes of popcnt are fast
We can chain bcnt instructions together, so
any width popcnt is pretty fast.

llvm-svn: 269950
2016-05-18 16:10:19 +00:00
Hans Wennborg 8eb336c14e Re-commit r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"
with an additional fix to make RegAllocFast ignore undef physreg uses. It would
previously get confused about the "push %eax" instruction's use of eax. That
method for adjusting the stack pointer is used in X86FrameLowering::emitSPUpdate
as well, but since that runs after register-allocation, we didn't run into the
RegAllocFast issue before.

llvm-svn: 269949
2016-05-18 16:10:17 +00:00
Matt Arsenault 9430b9113a AMDGPU: Fix assert when erroring on a call
For some reason an assert is now hit when a valid chain
is not returned, so return the entry chain.

llvm-svn: 269948
2016-05-18 16:10:11 +00:00
Rafael Espindola 38af4d6347 Trivial cleanups.
This just clang formats and cleans comments in an area I am about to
post a patch for review.

llvm-svn: 269946
2016-05-18 16:00:24 +00:00
Matt Arsenault 891fccc0c1 AMDGPU: Handle alloca promoting with null operands
If the second pointer in a multi-pointer instruction is
a constant, we can replace the type.

llvm-svn: 269945
2016-05-18 15:57:21 +00:00
Matt Arsenault bde80346c1 AMDGPU: Don't run passes that aren't useful
llvm-svn: 269943
2016-05-18 15:41:07 +00:00
Matt Arsenault ab3429c2b4 AMDGPU: Fix assert on ttmp registers
Use register class that does not include them when looking
for unallocated registers.

This is hit by the udiv v8i64 test in the opencl integer
conformance test, and takes a few seconds to compile in
a debug build so no test included.

llvm-svn: 269938
2016-05-18 15:19:50 +00:00
Davide Italiano 98f7e0e790 [PM] Port per-function SCCP to the new pass manager.
llvm-svn: 269937
2016-05-18 15:18:25 +00:00
Krzysztof Parzyszek ca3b532e2c [Hexagon] Recognize "q" and "v" in inline-asm as register constraints
llvm-svn: 269933
2016-05-18 14:34:51 +00:00
Dan Gohman b4c3c38276 [WebAssembly] Don't expand divisions by constants.
Don't expand divisions by constants if it would require multiple instructions.
The current assumption is that engines will perform the desired optimizations.

llvm-svn: 269930
2016-05-18 14:29:42 +00:00
Bryan Chan e656f61d1e [SystemZ] Fix register ordering for BinaryRRF instructions
Summary:
The ordering of registers in BinaryRRF instructions are wrong, and
affects the copysign instruction (CPSDR). This results in the wrong
magnitude and sign being set.

Author: zhanjunl

Reviewers: kbarton, uweigand

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20308

llvm-svn: 269922
2016-05-18 13:24:57 +00:00
Aaron Ballman 54269226ba Removing an unused variable introduced in r269911; NFC.
llvm-svn: 269915
2016-05-18 12:52:04 +00:00
Daniel Sanders 016e6c4354 Try again to fix pdbdump-headers.test on big-endian hosts after r269861.
r269898 fixed the problem with HashBuckets but the same issue occurred with
AddressMap and ThunkMap too.

llvm-svn: 269913
2016-05-18 12:36:25 +00:00
Ashutosh Nema 348af9cc6b Add new flag and intrinsic support for MWAITX and MONITORX instructions
Summary:

MONITORX/MWAITX instructions provide similar capability to the MONITOR/MWAIT
pair while adding a timer function, such that another termination of the MWAITX
instruction occurs when the timer expires. The presence of the MONITORX and
MWAITX instructions is indicated by CPUID 8000_0001, ECX, bit 29.

The MONITORX and MWAITX instructions are intercepted by the same bits that
intercept MONITOR and MWAIT. MONITORX instruction establishes a range to be
monitored. MWAITX instruction causes the processor to stop instruction execution
and enter an implementation-dependent optimized state until occurrence of a
class of events.

Opcode of MONITORX instruction is "0F 01 FA". Opcode of MWAITX instruction is
"0F 01 FB". These opcode information is used in adding tests for the
disassembler.

These instructions are enabled for AMD's bdver4 architecture.

Patch by Ganesh Gopalasubramanian!

Reviewers: echristo, craig.topper, RKSimon
Subscribers: RKSimon, joker.eph, llvm-commits
Differential Revision: http://reviews.llvm.org/D19795

llvm-svn: 269911
2016-05-18 11:59:12 +00:00
Rafael Espindola 699281cce7 Don't pass a Reloc::Model to MC.
MC only needs to know if the output is PIC or not. It never has to
decide about creating GOTs and PLTs for example. The only thing that
MC itself uses this information for is expanding "macros" in sparc and
mips. The rest I am pretty sure could be moved to CodeGen.

This is a cleanup and isolates the code from future changes to
Reloc::Model.

llvm-svn: 269909
2016-05-18 11:58:50 +00:00
James Molloy a854c0a0c3 [VectorUtils] Fix nasty use-after-free
In truncateToMinimalBitwidths() we were RAUW'ing an instruction then erasing it. However, that intruction could be cached in the map we're iterating over. The first check is "I->use_empty()" which in most cases would return true, as the (deleted) object was RAUW'd first so would have zero use count. However in some cases the object could have been polluted or written over and this wouldn't be the case. Also it makes valgrind, asan and traditionalists who don't like their compiler to crash sad.

No testcase as there are no externally visible symptoms apart from a crash if the stars align.

Fixes PR26509.

llvm-svn: 269908
2016-05-18 11:57:58 +00:00
Dylan McKay f830f4baa5 [AVR] Remove the 'AVRConfig.h' header
It defined the LLVM_AVR_GCC_COMPAT constant, which would enable/disable
certain GCC-specific behaviours.

There is no point conditionally turning it on/off, as it will always be
turned on, and we have to maintain both code paths anyway.

llvm-svn: 269904
2016-05-18 11:20:48 +00:00
Dylan McKay c1ec00fe88 [AVR] Add missing CMake dependencies
llvm-svn: 269901
2016-05-18 11:11:51 +00:00
Dylan McKay f1f1c010e4 [AVR] Fix a few compile errors
llvm-svn: 269900
2016-05-18 11:11:38 +00:00
Simon Dardis 669d8dd8e1 [PATCH] [mips] Restrict the creation of compact branches
Restrict the creation of compact branches so that they do meet the ISA
requirements. Notably do not permit $zero to be used as a operand for compact
branches and ensure that some other branches fulfil the requirement that
rs != rt.

Fixup cases where $rs > $rt for bnec and beqc.

Recommit of rL269893 with reviewers comments.

Reviewers: dsanders, vkalintiris

Differential Review: http://reviews.llvm.org/D20284

llvm-svn: 269899
2016-05-18 10:38:01 +00:00
Daniel Sanders c819d903e1 Attempt to fix pdbdump-headers.test on big-endian hosts after r269861.
llvm-svn: 269898
2016-05-18 09:59:14 +00:00
Simon Dardis b0aa9f2cbe Revert "[mips] Restrict the creation of compact branches"
This reverts commit rL269893.

Incorrect patch applied.

llvm-svn: 269897
2016-05-18 09:51:37 +00:00
Dylan McKay d56676ed65 [AVR] Convert C style comments to C++
llvm-svn: 269895
2016-05-18 09:43:01 +00:00
Simon Dardis 1549a2f46a [mips] Restrict the creation of compact branches
Restrict the creation of compact branches so that they meet the ISA encoding
requirements. Notably do not permit $zero to be used as a operand for compact
branches and ensure that some other branches fulfil the requirement that
rs != rt.

Fixup cases where $rs > $rt for bnec and beqc.

Reviewers: dsanders, vkalintiris

Differential Review: http://reviews.llvm.org/D20284

llvm-svn: 269893
2016-05-18 09:21:44 +00:00
Chris Dewhurst 68388a0a99 [Sparc] Add Soft Float support
This change adds support for software floating point operations for Sparc targets.

This is the first in a set of patches to enable software floating point on Sparc. The next patch will enable the option to be used with Clang.

Differential Revision: http://reviews.llvm.org/D19265

llvm-svn: 269892
2016-05-18 09:14:13 +00:00
Igor Kudrin eb10307347 [Coverage] Ensure that coverage mapping data has an expected alignment in 'covmapping' files.
Coverage mapping data is organized in a sequence of blocks, each of which is expected
to be aligned by 8 bytes. This feature is used when reading those blocks, see
VersionedCovMapFuncRecordReader::readFunctionRecords(). If a misaligned covearge
mapping data has more than one block, it causes llvm-cov to fail.

Differential Revision: http://reviews.llvm.org/D20285

llvm-svn: 269887
2016-05-18 07:43:27 +00:00
Craig Topper 095fc41523 [AVX512] Strengthen type constraints on my rounding mode inputs and some immediate inputs.
llvm-svn: 269886
2016-05-18 06:56:01 +00:00
Craig Topper 74ed087b0b [AVX512] Strengthen type checks on the X86ISD::SELECT node. Saves over 800 bytes in the DAG isel table by removing type checks for the condition operand which is always a vector or scalar of i1 matching the the number of elements in the other operands.
llvm-svn: 269885
2016-05-18 06:55:59 +00:00
Zlatko Buljan 6afea51a58 [mips][microMIPS] Implement LH, LHE, LHU and LHUE instructions and add CodeGen support
Differential Revision: http://reviews.llvm.org/D15418

llvm-svn: 269883
2016-05-18 06:54:59 +00:00
Lang Hames 4ce96c59e4 [RuntimeDyld] Thread Error through some APIs, remove calls to report_fatal_error.
llvm-svn: 269881
2016-05-18 05:31:24 +00:00
Zachary Turner 63a2846e84 [codeview] Some cleanup of Symbol Records.
* Reworks the CVSymbolTypes.def to work similarly to TypeRecords.def.
* Moves some enums from SymbolRecords.h to CodeView.h to maintain
  consistency with how we do type records.
* Generalize a few simple things like the record prefix
* Define the leaf enum and the kind enum similar to how we do with tyep
  records.

Differential Revision: http://reviews.llvm.org/D20342
Reviewed By: amccarth, rnk

llvm-svn: 269867
2016-05-17 23:50:21 +00:00
Zachary Turner b18921b565 Revert "[obj2yaml] [yaml2obj] Support MachO section and section_64
structs"

This reverts commits r269845, r269846, and r269850 as they
introduce a crash in obj2yaml when trying to do a roundtrip.

llvm-svn: 269865
2016-05-17 23:38:22 +00:00
Dan Gohman 7100809080 [WebAssembly] Rename $discard to $drop in the assembly output.
llvm-svn: 269862
2016-05-17 23:19:03 +00:00
Rui Ueyama 8dc18c5f45 pdbdump: Print out more strcutures.
I don't yet fully understand the meaning of these data strcutures,
but at least it seems that their sizes and types are correct.
With this change, we can read publics streams till end.

Differential Revision: http://reviews.llvm.org/D20343

llvm-svn: 269861
2016-05-17 23:07:48 +00:00
Paul Robinson 101772128a [DwarfDebug] Make tuning predicates private, should be used only in ctor.
llvm-svn: 269859
2016-05-17 22:53:20 +00:00
Dan Gohman 1054570a29 [WebAssembly] Model the stack evaluation order more precisely.
We currently don't represent get_local and set_local explicitly; they
are just implied by virtual register use and def. This avoids a lot of
clutter, but it does complicate stackifying: get_locals read their
operands at their position in the stack evaluation order, rather than
at their parent instruction. This patch adds code to walk the stack to
determine the precise ordering, when needed.

llvm-svn: 269854
2016-05-17 22:24:18 +00:00
Rafael Espindola 705231bfd4 Delete deprecated function.
llvm-svn: 269853
2016-05-17 22:07:45 +00:00
Lang Hames 8a63b2afc1 [Object] Move isNotObjectErrorInvalidFileType out of header.
llvm-svn: 269848
2016-05-17 21:38:53 +00:00
Justin Bogner 594e07bd78 [PM] Port DSE to the new pass manager
Patch by JakeVanAdrighem. Thanks!

llvm-svn: 269847
2016-05-17 21:38:13 +00:00
Chris Bieneman 622a9394f9 [obj2yaml][yaml2obj] Fixing dyld_info_command mappings
Apparently I mucked up the mappings here, which was causing some binary differences in round tripping.

llvm-svn: 269846
2016-05-17 21:33:59 +00:00
Chris Bieneman 7b504b7531 [obj2yaml] [yaml2obj] Support MachO section and section_64 structs
This patch adds round trip support for MachO section structs.

llvm-svn: 269845
2016-05-17 21:31:02 +00:00
Lang Hames e3ec688df5 Remove unnecessary header include.
llvm-svn: 269844
2016-05-17 21:15:50 +00:00
Dan Gohman d08cd15f33 [WebAssembly] Don't stackify calls past stack pointer modifications.
llvm-svn: 269843
2016-05-17 21:14:26 +00:00
Adrian Prantl 6323ddf99c Debug Info: Introduce a DwarfDebug::UseDWARF2Bitfields flag
instead of having DwarfUnit query the debugger tuning options.

Follow-up commmit to r269827.
Thanks to Paul Robinson for pointing this out!

llvm-svn: 269840
2016-05-17 21:07:16 +00:00
Xinliang David Li 7d0fed74f0 minor cleanup /NFC
llvm-svn: 269839
2016-05-17 21:06:16 +00:00
Hans Wennborg 759af30109 Revert r269828 "X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions"
Seems to have broken the Windows ASan bot. Reverting while investigating.

llvm-svn: 269833
2016-05-17 20:38:56 +00:00
Sanjay Patel 22b01febd4 [InstCombine] add another test for wrong icmp constant (PR27792)
It doesn't matter if the comparison is unsigned; the inc/dec is always signed.

llvm-svn: 269831
2016-05-17 20:20:40 +00:00
Dan Gohman 12de0b91ac [WebAssembly] Stackify induction variable increment instructions.
This handles instructions where the defined register is also used, as in
"x = x + 1".

llvm-svn: 269830
2016-05-17 20:19:47 +00:00
Xinliang David Li 8da773bf74 Simple refactoring /NFC
llvm-svn: 269829
2016-05-17 20:19:03 +00:00
Hans Wennborg c3fb51171e X86: Avoid using _chkstk when lowering WIN_ALLOCA instructions
This patch moves the expansion of WIN_ALLOCA pseudo-instructions
into a separate pass that walks the CFG and lowers the instructions
based on a conservative estimate of the offset between the stack
pointer and the lowest accessed stack address.

The goal is to reduce binary size and run-time costs by removing
calls to _chkstk. While it doesn't fix all the code quality problems
with inalloca calls, it's an incremental improvement for PR27076.

Differential Revision: http://reviews.llvm.org/D20263

llvm-svn: 269828
2016-05-17 20:13:29 +00:00
Adrian Prantl f0a41089ff Debug Info: Don't emit bitfields in the DWARF4 format when tuning for GDB.
As discovered in PR27758, GDB does not fully support the DWARF 4 format.
This patch ensures we always emit bitfields in the DWARF 2 when tuning for GDB.

llvm-svn: 269827
2016-05-17 20:12:08 +00:00
Renato Golin 38ed8021c7 Fix an assert in SelectionDAGBuilder when processing inline asm
When processing inline asm that contains errors, make sure we can recover
gracefully by creating an UNDEF SDValue for the inline asm statement before
returning from SelectionDAGBuilder::visitInlineAsm. This is necessary for
consumers that don't exit on the first error that is emitted (e.g. clang)
and that would assert later on.

Fixes PR24071.

Patch by Diana Picus.

llvm-svn: 269811
2016-05-17 19:52:01 +00:00
Chris Bieneman 3f2eb8369e Reapply r269782 "[obj2yaml] [yaml2obj] Support for MachO load command structures""
This adds support for all the MachO *_command structures. The load_command payloads still are not represented, but that will come next.

llvm-svn: 269808
2016-05-17 19:44:06 +00:00
Davide Italiano bfe3801d16 [LCSSA] Use llvm::any_of instead of std::size_of.
The API is simpler. Suggested by David Blaikie!

llvm-svn: 269800
2016-05-17 19:01:02 +00:00
Sanjay Patel 86564cad06 [InstCombine] fix constant to be signed for signed comparisons
This bug was introduced in r269728 and is the likely cause of many stage 2 ubsan bot failures.
I'll add a test in a follow-up commit assuming this fixes things properly.

llvm-svn: 269797
2016-05-17 18:38:55 +00:00
Sanjoy Das fd67038c8b [Guards] Add branch metadata when lowering
Guards are expected to basically never fail.  Reflect this in the branch
probabilities in their lowered form.

llvm-svn: 269791
2016-05-17 17:51:19 +00:00
Sanjoy Das f5d40d5350 [SCEV] Be more aggressive in proving NUW
... for AddRec's in loops for which SCEV is unable to compute a max
tripcount.  This is the NUW variant of r269211 and fixes PR27691.

(Note: PR27691 is not a correct or stability bug, it was created to
track a pending task).

llvm-svn: 269790
2016-05-17 17:51:14 +00:00
Chris Bieneman 1c0f0b242d Revert "[obj2yaml] [yaml2obj] Support for MachO load command structures"
This reverts commit r269782 because it broke bots with -fpermissive.

llvm-svn: 269785
2016-05-17 17:13:50 +00:00
Kevin Enderby ac9e15551d Change llvm-objdump, llvm-nm and llvm-size when reporting an object file error
when the object is in an archive to use something like libx.a(foo.o) as part of
the error message.

Also changed llvm-objdump and llvm-size to be like llvm-nm and ignore non-object
files in archives and not produce any error message.

To do this Archive::Child::getAsBinary() was changed from ErrorOr<...> to
Expected<...> then that was threaded up to its users.

Converting this interface to Expected<> from ErrorOr<> does involve
touching a number of places. To contain the changes for now the use of
errorToErrorCode() is still used in one place yet to be fully converted.

Again there some were bugs in the existing code that did not deal with the
old ErrorOr<> return values.  So now with Expected<> since they must be
checked and the error handled, I added a TODO and a comments for those.

llvm-svn: 269784
2016-05-17 17:10:12 +00:00
Chris Bieneman 3552c426e9 [obj2yaml] [yaml2obj] Support for MachO load command structures
This adds support for all the MachO *_command structures. The load_command payloads still are not represented, but that will come next.

llvm-svn: 269782
2016-05-17 17:03:28 +00:00
Reid Kleckner fcc5550544 [codeview] Test serialization of all known type records
This just checks that we emit all type records once, and then after
merging the type stream with no other type streams, we still emit every
kind of type record.

We could test the dumper output more closely, but that would make the
test very brittle. Currently we're just getting coverage.

llvm-svn: 269778
2016-05-17 16:20:35 +00:00
Rafael Espindola 712f957cae Simplify handling of hidden stub.
Since r207518 they are printed exactly like non-hidden stubs on x86 and
since r207517 on ARM.

This means we can use a single set for all stubs in those platforms.

llvm-svn: 269776
2016-05-17 16:01:32 +00:00
Teresa Johnson bbd10b4579 [ThinLTO] Option to control path of distributed backend files
Summary:
Add support to control where files for a distributed backend (the
individual index files and optional imports files) are created.

This is invoked with a new thinlto-prefix-replace option in the gold
plugin and llvm-lto. If specified, expects a string of the form
"oldprefix:newprefix", and instead of generating these files in the
same directory path as the corresponding bitcode file, will use a path
formed by replacing the bitcode file's path prefix matching oldprefix
with newprefix.

Also add a new replace_path_prefix helper to Path.h in libSupport.

Depends on D19636.

Reviewers: joker.eph

Subscribers: llvm-commits, joker.eph

Differential Revision: http://reviews.llvm.org/D19644

llvm-svn: 269771
2016-05-17 14:45:30 +00:00
Davide Italiano a0e0feea1d [PM/LCSSA] Fix dependency list. Some passes are preserved, not required.
llvm-svn: 269768
2016-05-17 14:32:12 +00:00
Davide Italiano b75b16e2ff [LCSSA] Use any_of() to simplify the code. NFCI.
llvm-svn: 269767
2016-05-17 14:24:41 +00:00
Igor Laevsky 953f2d2a54 [RewriteStatepointsForGC] Remove obsolete assertion
This is assertion is no longer necessary since we never record
constants in the live set anyway. (They are never recorded in 
the initial live set, and constant bases are removed near line 2119)

Differential Revision: http://reviews.llvm.org/D20293

llvm-svn: 269764
2016-05-17 13:54:10 +00:00
Renato Golin 57bfb69aa4 [ARM] ARM mov InstAlias for MOVW lacks HasV6T2
The movw instruction is only available in ARM state for V6T2 and above.
The MOVi16 instruction has requirement HasV6T2 but the InstAlias
for mov rd, imm where the operand is imm0_65535_expr:$imm does not.

This means that movw can incorrectly be used in ARMv4 and ARMv5 by
writing mov rd, 0x1234. The simple fix is to the requirement HasV6T2
to the InstAlias. Tests added to not-armv4.s.

Patch by Peter Smith.

llvm-svn: 269761
2016-05-17 13:05:28 +00:00
David L Kreitzer e7c583e06f Fix for PR27750. Correctly handle the case where the fallthrough block and
target block are the same in getFallThroughMBB.

Differential Revision: http://reviews.llvm.org/D20288

llvm-svn: 269760
2016-05-17 12:47:46 +00:00
Benjamin Kramer ca9a0fe2b9 [InstCombine] Don't crash when trying to take an element of a ConstantExpr.
Fixes PR27786.

llvm-svn: 269757
2016-05-17 12:08:55 +00:00
Derek Schuff 6c1d74a094 [WebAssembly] Remove our copy of PrologEpilogInserter
It's no longer needed after r269750

llvm-svn: 269756
2016-05-17 11:18:35 +00:00
Zoran Jovanovic 84e4d59e47 [mips][microMIPS] Implement BEQZC and BNEZC instructions
Differential Revision: http://reviews.llvm.org/D15417

llvm-svn: 269755
2016-05-17 11:10:15 +00:00
Simon Dardis 8d8f2f8b8d [mips] Compact branch policy control for MIPSR6
This patch adds the commandline option -mips-compact-branches={never,optimal,always),
which controls how LLVM generates compact branches for MIPS targets. By
default, the compact branch policy is 'optimal' where LLVM will (hopefully)
pick the optimal branch for any situation. The 'never' policy will disable
the generation of compact branches and 'always' will generate compact branches
wherever possible.

Reviewers: dsanders

Differential Review: http://reviews.llvm.org/D20167

llvm-svn: 269753
2016-05-17 10:21:43 +00:00
Zlatko Buljan e9abe8816c [mips][microMIPS][DSP] Implement BALIGN, BITREV, BPOSGE32, CMP*, CMPGDU*, CMPGU* and CMPU* instructions
Differential Revision: http://reviews.llvm.org/D16182

llvm-svn: 269752
2016-05-17 09:32:58 +00:00
Derek Schuff 1aaf87e91d Factor PrologEpilogInserter around spilling, frame finalization, and scavenging
PrologEpilogInserter has these 3 phases, which are related, but not
all of them are needed by all targets. This patch reorganizes PEI's
varous functions around those phases for more clear separation. It also
introduces a new TargetMachine hook, usesPhysRegsForPEI, which is true
for non-virtual targets. When it is true, all the phases operate as
before, and PEI requires the AllVRegsAllocated property on
MachineFunctions. Otherwise, CSR spilling and scavenging are skipped and
only prolog/epilog insertion/frame finalization is done.

Differential Revision: http://reviews.llvm.org/D18366

llvm-svn: 269750
2016-05-17 08:49:59 +00:00
Dan Gohman 2644d74bc2 [WebAssembly] Improve the precision of memory and side effect dependence tracking.
MachineInstr::isSafeToMove is more conservative than is needed here;
use a more explicit check, and incorporate knowledge of some
WebAssembly-specific opcodes.

llvm-svn: 269736
2016-05-17 04:05:31 +00:00
Adrian Prantl 7aa34c8cbb Debug Info: Don't emit a DW_AT_data_member_location for DWARF bitfields.
The DWARF spec states that a member entry may have either a
DW_AT_data_member_location or a DW_AT_data_bit_offset, but not both.

This fixes a bug found in PR 27758.

llvm-svn: 269731
2016-05-17 02:37:53 +00:00
Sanjay Patel 18254935c9 try to avoid unused variable warning in release build; NFCI
llvm-svn: 269729
2016-05-17 01:12:31 +00:00
Sanjay Patel e9b2c32e7f [InstCombine] check vector elements before trying to transform LE/GE vector icmp (PR27756)
Fix a bug introduced with rL269426 :
[InstCombine] canonicalize* LE/GE vector integer comparisons to LT/GT (PR26701, PR26819)

We were assuming that a ConstantDataVector / ConstantVector / ConstantAggregateZero operand of
an ICMP was composed of ConstantInt elements, but it might have ConstantExpr or UndefValue 
elements. Handle those appropriately.

Also, refactor this function to join the scalar and vector paths and eliminate the switches.

Differential Revision: http://reviews.llvm.org/D20289

llvm-svn: 269728
2016-05-17 00:57:57 +00:00
Easwaran Raman 01d98ba0b2 Remove .hot and .unlikely prefixes from function section names.
This code currently relies on static methods in ProfileSummary to determine whether a function is hot or unlikley. I am refactoring the ProfileSummary code and these methods will be removed. As discussed offline, the right way to re-introduce this is to add a pass to annotate functions with unlikely/hot hints and use the hints to determine the prefix here.

llvm-svn: 269726
2016-05-16 23:59:04 +00:00
Jan Vesely 687ca8df18 AMDGPU/R600: Use correct number of vector elements when lowering private loads
Reviewer: tstellardAMD, arsenm

Subscribers: arsenm, kzhuravl, llvm-commits

Differential Revision: http://reviews.llvm.org/D20032

llvm-svn: 269725
2016-05-16 23:56:32 +00:00
Mehdi Amini fdbb8f47eb Avoid temporary vector for sorting in BitcodeWriter
As suggested by Duncan, fixup for r269634 and r269635

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 269715
2016-05-16 22:47:15 +00:00
Adrian Prantl e7d833defb Debug info: Don't emit a DW_AT_byte_size when emitting a DWARF4 bit field.
The DWARF spec clearly states that a bit field member should have either a
DW_AT_byte_size or a DW_AT_bit_size, but not both.
Also the DW_AT_byte_size is redundant with the size of the type of the member.

This fixes a bug found in PR 27758.

llvm-svn: 269714
2016-05-16 22:45:10 +00:00
Matt Arsenault 8a028bf4d7 AMDGPU: Fix promote alloca pass creating huge arrays
This was assuming it could use all memory before, which is
a bad decision because it restricts occupancy.

By default, only try to use enough space that could reduce
occupancy to 7, an arbitrarily chosen limit.

Based on the exist LDS usage, try to round up to the limit
in the current tier instead of further hurting occupancy.
This isn't ideal, because it doesn't accurately know how much
space is going to be used for alignment padding.

llvm-svn: 269708
2016-05-16 21:19:59 +00:00
Rafael Espindola e64619ce6e Fail early on unknown appending linkage variables.
In practice only a few well known appending linkage variables work.

Currently if codegen sees an unknown appending linkage variable it will
just print it as a regular global. That is wrong as the symbol in the
produced object file has different semantics as the one provided by the
appending linkage.

This just errors early instead of producing a broken .o.

llvm-svn: 269706
2016-05-16 21:14:24 +00:00
Vedant Kumar 85c973d3f0 Revert "Retry^2 "[ProfileData] (llvm) Use Error in InstrProf and Coverage, NFC""
This reverts commit r269694. MSVC says:

error C2086: 'char llvm::ProfErrorInfoBase<enum llvm::instrprof_error>::ID' : redefinition

llvm-svn: 269700
2016-05-16 21:03:38 +00:00
Matt Arsenault c31a9d0671 SelectionDAG: Select min/max when both are used
Allow two users of the condition if the other user
is also a min/max select. i.e.

%c = icmp slt i32 %x, %y
%min = select i1 %c, i32 %x, i32 %y
%max = select i1 %c, i32 %y, i32 %x

llvm-svn: 269699
2016-05-16 20:58:23 +00:00
Geoff Berry 74cb718ea9 [AArch64] Fix bug in large stack spill slot handling (PR27717)
Summary:
Fix bug in MachO path where a frame index offset would not be reserved
for handling large frames when an extra non-used callee-save register
was saved.  In the case where the extra register is reserved or not a
GPR (e.g. %FP in the MachO case), this would lead to the register
scavenger later failing when called from PrologEpilogInserter.

Reviewers: t.p.northover

Subscribers: aemerson, rengolin, mcrosier, llvm-commits

Differential Revision: http://reviews.llvm.org/D20185

llvm-svn: 269697
2016-05-16 20:52:28 +00:00
Vedant Kumar 7cb2fd5904 Retry^2 "[ProfileData] (llvm) Use Error in InstrProf and Coverage, NFC"
Transition InstrProf and Coverage over to the stricter Error/Expected
interface.

Changes since the initial commit:
- Address undefined-var-template warning.
- Fix error message printing in llvm-profdata.
- Check errors in loadTestingFormat() + annotateAllFunctions().
- Defer error handling in InstrProfIterator to InstrProfReader.

Differential Revision: http://reviews.llvm.org/D19901

llvm-svn: 269694
2016-05-16 20:49:39 +00:00
Bryan Chan 28b759c4c8 [SystemZ] Support LRVH and STRVH opcodes
Summary: On Linux, /usr/include/bits/byteswap-16.h defines __byteswap_16(x) as an inlined LRVH (Load Reversed Half-word) instruction. The SystemZ back-end did not support this opcode and the inlined assembly would cause a fatal error.

Reviewers: bryanpkc, uweigand

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D18732

llvm-svn: 269688
2016-05-16 20:32:22 +00:00
Chad Rosier 1cb56a1850 Remove extra whitespace. NFC.
llvm-svn: 269685
2016-05-16 20:03:02 +00:00
Mehdi Amini 819e9cdfb4 ThinLTO: sort inputs and schedule by decreasing size
This is a compile time optimization: keeping a large file to process
at the end hurts parallelism.
The heurisitic used right now is the input buffer size, however we
may want to consider the number of functions to import or the
different number of files to load for importing as well.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 269684
2016-05-16 19:33:07 +00:00
Dan Gohman 4817a7577c [WebAssembly] Mark COPY_LOCAL and TEE_LOCAL instructions has having no side effects.
llvm-svn: 269683
2016-05-16 19:16:32 +00:00
Mehdi Amini 001bb41556 ThinLTO caching: reload cached file with mmap and drop heap-allocated memory buffer
This is reducing pressure on the OS memory system, and is NFC
when not using a cache.
I measure a 10x memory consumption reduction when linking opt
with full debug info.

From: Mehdi Amini <mehdi.amini@apple.com>
llvm-svn: 269682
2016-05-16 19:11:59 +00:00
Dan Gohman 804749c942 [WebAssembly] Use eqz to negate a branch conditions.
llvm-svn: 269681
2016-05-16 18:59:34 +00:00
Geoff Berry 9b4ff336ce [BasicAA] Update comments based on feedback from hfinkel. NFCI.
Original change Hal's comments were based on:
http://reviews.llvm.org/D19730

llvm-svn: 269678
2016-05-16 18:51:54 +00:00
Dan Gohman 6627e5f48b [WebAssembly] Add a few optimization ideas to README.txt.
llvm-svn: 269677
2016-05-16 18:51:03 +00:00
Michael Kuperstein ac2088d122 [X86] Remove transformVSELECTtoBlendVECTOR_SHUFFLE
The new X86 shuffle lowering can do just fine without transforming vselects
into vector_shuffles. It looks like the only thing this code does right now
is cause trouble - in particular, it can lead to combine/legalization infinite
loops.

Note that it's not completely NFC, since some of the shuffle masks get inverted,
which may cause slight differences further down the line. We may want to find
a way to invert those masks, but that's orthogonal to this commit.

This fixes the hang in PR27689.

llvm-svn: 269676
2016-05-16 18:27:00 +00:00
Krzysztof Parzyszek a5bd2954e2 [Hexagon] Make getCallerSavedRegs specific to a register class
llvm-svn: 269674
2016-05-16 18:02:28 +00:00
Matthew Simpson 37ec5f914e [LAA] Rename forwarding conflict detection option (NFC)
This patch renames the option enabling the store-to-load forwarding conflict
detection optimization. This change was requested in the review of D20241.

llvm-svn: 269668
2016-05-16 17:00:56 +00:00
Adam Nemet 884d313b7f [LAA] Comment couldPreventStoreLoadForward. NFC
Also s/Cycles/Iters/ in NumCyclesForStoreLoadThroughMemory to make it
clear that this is not about clock cycles but loop cycles/iterations.

llvm-svn: 269667
2016-05-16 16:57:47 +00:00
Adam Nemet 9b5852aeb2 [LAA] clang-format the function couldPreventStoreLoadForward. NFC
llvm-svn: 269666
2016-05-16 16:57:42 +00:00
Krzysztof Parzyszek 0a04ac2153 [Hexagon] Simplify HexagonInstrInfo::isPredicable
Remove all the checks for constant extenders from isPredicable. The users
of it should be the ones checking cost/profitability.

llvm-svn: 269664
2016-05-16 16:56:10 +00:00
Xinliang David Li f3c7a35238 [PM] Port indirect call promotion pass to new pass manager
llvm-svn: 269660
2016-05-16 16:31:07 +00:00
Matthew Simpson e43198dc4b [LV] Ensure safe VF for loops with interleaved accesses
The selection of the vectorization factor currently doesn't consider
interleaved accesses. The vectorization factor is based on the maximum safe
dependence distance computed by LAA. However, for loops with interleaved
groups, we should instead base the vectorization factor on the maximum safe
dependence distance divided by the maximum interleave factor of all the
interleaved groups. Interleaved accesses not in a group will be scalarized.

Differential Revision: http://reviews.llvm.org/D20241

llvm-svn: 269659
2016-05-16 15:08:20 +00:00
Renato Golin 4b9c0d4dcf [llc] New diagnostic handler
Without a diagnostic handler installed, llc's behaviour is to exit on the first
error that it encounters. This is very different from the behaviour of clang
and other front ends, which try to gather as many errors as possible before
exiting.

This commit adds a diagnostic handler to llc, allowing it to find and report
more than one error. The old behaviour is preserved under a flag (-exit-on-error).

Some of the tests fail with the new diagnostic handler, so they have to use the
new flag in order to run under the previous behaviour. Some of these are known
bugs, others need further investigation. Ideally, we should fix the tests and
remove the flag at some point in the future.

Reapplied after fixing the LLDB build that was broken due to the new
DiagnosticSeverity in LLVMContext.h, and fixed an UB in the new change.

Patch by Diana Picus.

llvm-svn: 269655
2016-05-16 14:28:02 +00:00
Matthew Simpson a250dc9f11 [LAA] Add option to disable conflict detection (NFC)
llvm-svn: 269654
2016-05-16 14:14:49 +00:00
Chad Rosier c73d559df4 Use proper capitalization and punctuation per coding standards. NFC.
llvm-svn: 269652
2016-05-16 12:55:01 +00:00
Simon Pilgrim 0d05484db6 Fixed unused variable warning
llvm-svn: 269650
2016-05-16 11:48:54 +00:00