Commit Graph

4040 Commits

Author SHA1 Message Date
Michael J. Spencer 22120c47a7 Add YAML parser to Support.
llvm-svn: 153977
2012-04-03 23:09:22 +00:00
Bob Wilson 8bbd98df00 When building llvmCore, pass the SDKROOT and -arch setting to configure.
So far all of configure tests have been run against the default SDK and
architecture, regardless of what is actually being built.  We've gotten
lucky until now.  <rdar://problem/11112479>

llvm-svn: 153972
2012-04-03 21:50:26 +00:00
Bob Wilson 5512ec8bae Remove a reference to the C backend.
llvm-svn: 153971
2012-04-03 21:50:24 +00:00
Craig Topper 9c252ebe4c Tidy up spacing in some tablegen outputs.
llvm-svn: 153937
2012-04-03 06:52:47 +00:00
Craig Topper 7629d63bc4 Add support for AVX enhanced comparison predicates. Patch from Kay Tiong Khoo.
llvm-svn: 153935
2012-04-03 05:20:24 +00:00
Bill Wendling 7d350efddc As Eric pointed out, even a Debug build should be equal. Leave the flag that can turn off comparisons though.
llvm-svn: 153927
2012-04-03 03:27:43 +00:00
Andrew Trick a890e3c69a Cleanup set_union usage. The same thing but a bit cleaner now.
llvm-svn: 153922
2012-04-03 01:35:52 +00:00
Andrew Trick c544e7c0a7 Use std::set_union instead of nasty custom code.
I just noticed Jakob's examples of the proper application of
std::set... routines.

llvm-svn: 153918
2012-04-03 00:47:23 +00:00
Bill Wendling d70cde134b Compare the .o files only for release builds. Add an option to bypass the comparison altogether.
llvm-svn: 153909
2012-04-02 23:27:43 +00:00
Silviu Baranga 98144e9e1a Second part for the 153874 one
llvm-svn: 153875
2012-04-02 15:46:46 +00:00
Benjamin Kramer 22d093e4f1 Emit the asm writer's mnemonic table with SequenceToOffsetTable.
This way we can get AVX v-prefixed instructions tail merged with the normal insns.

llvm-svn: 153869
2012-04-02 09:13:46 +00:00
Craig Topper 4de7373862 Reorder fields in MatchEntry and OperandMatchEntry to reduce padding. A bit tricky due to the target specific sizes for some of the fields so the ordering is only optimal for the targets in the tree.
llvm-svn: 153865
2012-04-02 07:48:39 +00:00
Craig Topper dab9e35ad0 Remove getInstructionName from MCInstPrinter implementations in favor of using the instruction name table from MCInstrInfo. Reduces static data in the InstPrinter implementations.
llvm-svn: 153863
2012-04-02 07:01:04 +00:00
Craig Topper 7a2cea1814 Use SequenceToOffsetTable to generate instruction name table for AsmWriter.
llvm-svn: 153857
2012-04-02 00:47:39 +00:00
Craig Topper 91773ab2ca Use SequenceToOffsetTable to create instruction name table. Saves space particularly on X86 where AVX instructions just add a 'v' to the front of other instructions.
llvm-svn: 153841
2012-04-01 18:14:14 +00:00
Benjamin Kramer 12af4285d1 Emit the LLVM<->DWARF register mapping as a sorted table and use binary search to do the lookup.
This also avoids emitting the information twice, which led to code bloat. On i386-linux-Release+Asserts
with all targets built this change shaves a whopping 1.3 MB off clang. The number is probably exaggerated
by recent inliner changes but the methods were already enormous with the old inline cost computation.

The DWARF reg -> LLVM reg mapping doesn't seem to have holes in it, so it could be a simple lookup table.
I didn't implement that optimization yet to avoid potentially changing functionality.

There is still some duplication both in tablegen and the generated code that should be cleaned up eventually.

llvm-svn: 153837
2012-04-01 14:23:58 +00:00
Andrew Trick cdefdf1f5b comment typo
llvm-svn: 153796
2012-03-31 02:39:17 +00:00
Andrew Trick 1a004ca084 Introduce Register Units: Give each leaf register a number.
First small step toward modeling multi-register multi-pressure. In the
future, register units can also be used to model liveness and
aliasing.

llvm-svn: 153794
2012-03-31 01:35:59 +00:00
Benjamin Kramer 682de39f2d Rip out emission of the regIsInRegClass function for the asm printer.
It's slow, bloated and completely redundant with MCRegisterClass::contains.

llvm-svn: 153782
2012-03-30 23:13:40 +00:00
Jakob Stoklund Olesen 892f48058b Use SequenceToOffsetTable in emitRegisterNameString.
This allows suffix sharing in register names. (AX is a suffix of EAX).

llvm-svn: 153777
2012-03-30 21:12:52 +00:00
Jakob Stoklund Olesen 066aba5fe9 Reapply 153764 and 153761 with a fix.
Use an explicit comparator instead of the default.

The sets are sorted, but not using the default comparator. Hopefully,
this will unbreak the Linux builders.

llvm-svn: 153772
2012-03-30 20:24:14 +00:00
Rafael Espindola fc06055173 Revert 153764 and 153761. They broke a --enable-optimized --enable-assertions
--enable-expensive-checks build.

llvm-svn: 153771
2012-03-30 20:09:06 +00:00
Jakob Stoklund Olesen e214c3df40 Compress SimpleValueType lists by sharing.
Many register classes have the same value types. Share the table space.

llvm-svn: 153764
2012-03-30 17:42:04 +00:00
Jakob Stoklund Olesen 569e116d35 Compress register lists by sharing suffixes.
TableGen emits lists of sub-registers, super-registers, and overlaps. Put
them all in a single table and use a SequenceToOffsetTable to share
suffixes.

llvm-svn: 153761
2012-03-30 17:25:43 +00:00
Jakob Stoklund Olesen a234f2efbd Add a SequenceToOffsetTable to TableGen.
This is similar to the StringToOffsetTable we use to produce string
tables, but it can be used for other sequences than strings, and it
eliminates entries for suffixes.

llvm-svn: 153760
2012-03-30 17:25:40 +00:00
Jakob Stoklund Olesen 00296815c5 Add more constness to CodeGenRegisters.
llvm-svn: 153667
2012-03-29 18:03:59 +00:00
Jakob Stoklund Olesen 9e512120b7 Spill DPair registers, not just QPR.
The arm_neon intrinsics can create virtual registers from the DPair
register class which allows both even-odd and odd-even D-register pairs.

This fixes PR12389.

llvm-svn: 153603
2012-03-28 21:20:32 +00:00
Chris Lattner 9e4e335281 fix a failure path to print the right thing, part of PR12357
llvm-svn: 153457
2012-03-26 19:11:51 +00:00
Benjamin Kramer c16e09bb80 TableGen: Don't emit the llvm intrinsic -> gcc builtin table, its only user was the c backend.
llvm-svn: 153432
2012-03-26 11:08:03 +00:00
Eli Bendersky 6330877a3e Fix lit failure on cmake-clang-x64_64-linux bot, apparently due to its having
a very (*very*) old version of Python (2.4?)

llvm-svn: 153409
2012-03-25 09:42:28 +00:00
Eli Bendersky f33086052d Continue cleanup of LIT, getting rid of the remaining artifacts from dejagnu
* Removed test/lib/llvm.exp - it is no longer needed 
* Deleted the dg.exp reading code from test/lit.cfg. There are no dg.exp files
  left in the test suite so this code is no longer required. test/lit.cfg is
  now much shorter and clearer 
* Removed a lot of duplicate code in lit.local.cfg files that need access to
  the root configuration, by adding a "root" attribute to the TestingConfig
  object. This attribute is dynamically computed to provide the same
  information as was previously provided by the custom getRoot functions. 
* Documented the config.root attribute in docs/CommandGuide/lit.pod

llvm-svn: 153408
2012-03-25 09:02:19 +00:00
Benjamin Kramer b0640db80e Include cstdio in a few place that depended on getting it transitively through StringExtras.h
llvm-svn: 153328
2012-03-23 11:35:30 +00:00
Eric Christopher 64a232343a Remove the C backend.
llvm-svn: 153307
2012-03-23 05:50:46 +00:00
Nico Weber d998e8450e Add a ${pathsep} variable to lit that expands to : (or ; on win32).
This is in braces so that it doesn't conflict with the existing %p.
It uses braces instead of parens because parens would have to be
regex-escaped.

llvm-svn: 153213
2012-03-21 19:56:42 +00:00
NAKAMURA Takumi 98b18777a4 lit/TestRunner.py: [Win32] Rework WinWaitReleased() again! "win32file" from Python Win32 Extensions.
We can simply confirm the handle released to open it with EXCLUSIVE. Attempting renaming was bad.

Disable win32file at ImportError. Thanks to Francois to let me know.

FIXME: Could we report warning or notification if win32file were not found?
llvm-svn: 153172
2012-03-21 07:49:44 +00:00
Evan Cheng 630a7f3064 Reserve number of MI operands to accom,odate complex patterns.
llvm-svn: 153125
2012-03-20 21:07:51 +00:00
Francois Pichet b7ae23fb66 Revert r152915. Chapuni's WinWaitReleased refactoring: It doesn't work for me
llvm-svn: 152958
2012-03-16 22:50:01 +00:00
NAKAMURA Takumi 16d5af118c lit/TestRunner.py: [Win32] Check all opened_files[] released, rather than (obsoleted) written_files[].
In previous case,
RUN: foo -o %t
RUN: FileCheck < %t
RUN: bar -o %t

2nd read handle might prevent manipulation of 3rd %t in bar, to remove and rename.

llvm-svn: 152916
2012-03-16 10:48:10 +00:00
NAKAMURA Takumi ee4d317725 lit/TestRunner.py: [Win32] Rework WinWaitReleased().
We can simply confirm the handle released to open it with EXCLUSIVE. Attempting renaming was bad.

llvm-svn: 152915
2012-03-16 10:48:03 +00:00
Craig Topper 501d95c176 More const-correcting of FixedLenDecoderEmitter.
llvm-svn: 152906
2012-03-16 06:52:56 +00:00
Craig Topper 48c112babe Const-correct the FixedLenDecoderEmitter. Pass a few things by const reference instead of value to avoid some copying.
llvm-svn: 152899
2012-03-16 05:58:09 +00:00
Craig Topper 82d0d5fc6b Spacing fixes. Mostly aligning arguments that spilled onto next line with the opening parenthese instead of 2 spaces in.
llvm-svn: 152889
2012-03-16 01:19:24 +00:00
Craig Topper 93e6434ca9 Remove unused field NumVariable from Filter class. Even it was needed the same result could be found with VariableInstructions.size(). Also fix some typos in comments.
llvm-svn: 152885
2012-03-16 00:56:01 +00:00
Jakob Stoklund Olesen 21561f937a Make MnemonicTable const again. That part of r152202 was OK.
llvm-svn: 152840
2012-03-15 21:22:53 +00:00
Jakob Stoklund Olesen cecb34407f Don't assume all mnemonics fit in 64k.
We currently assume that all targets have less than 64k opcodes. We
shouldn't limit it further.

llvm-svn: 152833
2012-03-15 20:44:06 +00:00
Jakob Stoklund Olesen e3084895d2 Revert r152202: "Use uint16_t to store InstrNameIndices in MCInstrInfo."
We cannot limit the concatenated instruction names to 64K.  ARM is
already at 32K, and it is easy to imagine a target with more
instructions.

llvm-svn: 152817
2012-03-15 18:05:57 +00:00
Jakob Stoklund Olesen e99d26c68b Revert r152105: "Use uint16_t to store indices into string table"
This patch limited the concatenated register names to 64K which meant
that the total number of registers was many times less than 64K.

If any compilers actually enforce the 64K limit on string literals, and
it turns out to be a problem, we should fix that problem by not using
long string literals.

llvm-svn: 152816
2012-03-15 18:05:54 +00:00
Craig Topper ba6d810752 Remove unused field from FixedLenDecoderEmitter. Move NumberedInstructions declaration from class to run method since its only used there and was being reinitialized anyway.
llvm-svn: 152616
2012-03-13 06:39:00 +00:00
NAKAMURA Takumi c114e0cf3c lit: Pass %INCLUDE% to tests on Win32. clang may expect existence of %INCLUDE% in vcvarsall.bat.
llvm-svn: 152588
2012-03-13 00:02:06 +00:00
Benjamin Kramer a7bedb6ebd DFAPacketizerEmitter: Prune includes.
llvm-svn: 152581
2012-03-12 21:32:58 +00:00
Craig Topper bef78fc2ee Convert more static tables of registers used by calling convention to uint16_t to reduce space.
llvm-svn: 152538
2012-03-11 07:57:25 +00:00
Craig Topper b358499b18 Shrink and reorder some fields in MCOperandInfo to fit it in 8 bytes to reduce size of static tables.
llvm-svn: 152524
2012-03-11 01:57:56 +00:00
Kevin Enderby 014e1cde5f Fix the x86 disassembler to at least print the lock prefix if it is the first
prefix.  Added a FIXME to remind us this still does not work when it is not the
first prefix.

llvm-svn: 152414
2012-03-09 17:52:49 +00:00
NAKAMURA Takumi c72fdf4490 TableGen/CodeEmitterGen.cpp: Fix an expression of generating bitmask.
~0U might be i32 on 32-bit hosts, then (uint64_t)~0U might not be expected as (i64)0xFFFFFFFF_FFFFFFFF, but as (i64)0x00000000_FFFFFFFF.

llvm-svn: 152407
2012-03-09 14:52:44 +00:00
Craig Topper 5a4bcc749a Use uint16_t to store instruction implicit uses and defs. Reduces static data.
llvm-svn: 152301
2012-03-08 08:22:45 +00:00
Craig Topper d31658d44c Re-commit r152202 hopefully fixing the MSVC linker error.
Original commit message:
Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable.

llvm-svn: 152296
2012-03-08 06:55:27 +00:00
Chad Rosier 3048107bc1 Revert r152202 as it's causing internal buildbot failures.
Original commit message:
Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect 
all 16-bit string table offsets. Also make sure the string to offset table 
string is not larger than 65536 characters since larger string literals aren't 
portable.

llvm-svn: 152233
2012-03-07 17:06:40 +00:00
Craig Topper 8d68422121 Use uint16_t to store InstrNameIndices in MCInstrInfo. Add asserts to protect all 16-bit string table offsets. Also make sure the string to offset table string is not larger than 65536 characters since larger string literals aren't portable.
llvm-svn: 152202
2012-03-07 05:17:23 +00:00
Jim Grosbach ed428bc1ce ARM more NEON VLD/VST composite physical register refactoring.
Register pair, all lanes subscripting.

llvm-svn: 152157
2012-03-06 23:10:38 +00:00
Jim Grosbach 13a292cc74 ARM refactor more NEON VLD/VST instructions to use composite physregs
Register pair VLD1/VLD2 all-lanes instructions. Kill off more of the
pseudos as a result.

llvm-svn: 152150
2012-03-06 22:01:44 +00:00
Owen Anderson 773642d3d8 Fix support for encodings up to 64-bits in length. TableGen was silently truncating them to 32-bits prior to this.
llvm-svn: 152148
2012-03-06 21:48:32 +00:00
Craig Topper 93d65c785e Use uint16_t to store indices into string table since C++ only allows 64K string literals so the index into the big string can never be larger than that.
llvm-svn: 152105
2012-03-06 06:04:39 +00:00
Craig Topper f875c10fda Add asserts to ensure that values will fit into the tables.
llvm-svn: 152104
2012-03-06 04:39:52 +00:00
Jim Grosbach 6cbf0f13dd Nuke a bit of dead code.
llvm-svn: 152067
2012-03-05 23:09:51 +00:00
Jim Grosbach e5307f9019 ARM Refactor VLD/VST spaced pair instructions.
Use the new composite physical registers.

llvm-svn: 152063
2012-03-05 21:43:40 +00:00
Jim Grosbach c988e0c521 ARM refactor away a bunch of VLD/VST pseudo instructions.
With the new composite physical registers to represent arbitrary pairs
of DPR registers, we don't need the pseudo-registers anymore. Get rid of
a bunch of them that use DPR register pairs and just use the real
instructions directly instead.

llvm-svn: 152045
2012-03-05 19:33:30 +00:00
Craig Topper d3e7057afc Shrink and reorder fields in MCRegisterClass to reduce size of static data.
llvm-svn: 152019
2012-03-05 08:33:33 +00:00
Craig Topper 4b02a29eba Convert more GenRegisterInfo tables from unsigned to uint16_t to reduce static data size.
llvm-svn: 152016
2012-03-05 05:37:41 +00:00
Craig Topper 1d32658877 Use uint16_t to store register overlaps to reduce static data.
llvm-svn: 152001
2012-03-04 10:43:23 +00:00
Craig Topper b35eacb0f0 Use uint16_t instead of unsigned to store registers in reg classes. Reduces static data size.
llvm-svn: 151998
2012-03-04 10:16:38 +00:00
Craig Topper 420525ce3b Use uint16_t to store registers in callee saved register tables to reduce size of static data.
llvm-svn: 151996
2012-03-04 03:33:22 +00:00
Craig Topper 6dedbae429 Use uint8_t instead of enums to store values in X86 disassembler table. Shaves 150k off the size of X86DisassemblerDecoder.o
llvm-svn: 151995
2012-03-04 02:16:41 +00:00
Benjamin Kramer 0764a3fb72 Perform the string table optimization for OperandMatchEntries too.
llvm-svn: 151986
2012-03-03 20:44:43 +00:00
Benjamin Kramer 5aeee5f854 Shrink the asm matcher tables.
- Shrink the opcode field to 16 bits.
- Shrink the AsmVariantID field to 8 bits.
- Store the mnemonic string in a string table, store a 16 bit index.
- Store a pascal-style length byte in the string instead of a null terminator,
  so we can avoid calling strlen on every entry we visit during mnemonic search.

Shrinks X86AsmParser.o from 434k to 201k on x86_64 and eliminates relocs from the table.

llvm-svn: 151984
2012-03-03 19:13:26 +00:00
Benjamin Kramer dbe7f3bf2e StringToOffsetTable: Allow uniquing the first element, add an option to skip appending a terminating null.
llvm-svn: 151983
2012-03-03 19:13:20 +00:00
Duncan Sands d30d8c82cb Honour --config-prefix also for lit.local.cfg.
llvm-svn: 151977
2012-03-03 13:30:56 +00:00
Benjamin Kramer c3098f2ab2 Move getSubRegIndex out of generated code into MCRegisterInfo, devirtualize it.
llvm-svn: 151821
2012-03-01 18:16:35 +00:00
Jim Grosbach e89025b8ce Move TargetRegisterInfo::getSubReg() to MCRegisterInfo.
Allows us to de-virtualize the function and provides access to it in
the instruction printer, which is useful for handling composite
physical registers (e.g., ARM register lists).

llvm-svn: 151815
2012-03-01 17:30:39 +00:00
Jim Grosbach 53733cdb23 Revert "Emit the SubRegTable with the smallest possible integer type."
This reverts commit 151760.

We want to move getSubReg() from TargetRegisterInfo into MCRegisterInfo,
but to do that, the type of the lookup table needs to be the same for
all targets.

llvm-svn: 151814
2012-03-01 17:30:35 +00:00
Benjamin Kramer e39d7ac396 Make TargetRegisterClasses non-virtual by making the only virtual function a function pointer.
This allows us to make TRC non-polymorphic and value-initializable, eliminating a huge static
initializer and a ton of cruft from the generated code.

Shrinks ARMBaseRegisterInfo.o by ~100k.

llvm-svn: 151806
2012-03-01 13:37:55 +00:00
Benjamin Kramer acd78d5092 Emit the "is an intrinsic overloaded" table as a bitfield.
llvm-svn: 151792
2012-03-01 02:16:57 +00:00
Benjamin Kramer aba3503639 Emit the intrinsic modref info as a lookup table instead of a huge switch.
Shrinks BasicAliasAnalysis.o from 106k to 56k on i386.

llvm-svn: 151781
2012-03-01 01:18:32 +00:00
Benjamin Kramer 0aafd06a85 Implement getSubRegIndex as a linear search on the SubRegTable instead of using a big switch.
- The search bounds are constant, in the worst case (ARM target) it will scan over 30 uint16_ts.
- This method isn't very hot, I had problems finding a testcase where it's called more than a dozen of times (no perf impact).

llvm-svn: 151773
2012-02-29 23:46:50 +00:00
Jim Grosbach 3f4b23933f Tidy up. 80 columns.
llvm-svn: 151764
2012-02-29 22:07:56 +00:00
Benjamin Kramer c80c3fd5a7 Emit the SubRegTable with the smallest possible integer type.
Doesn't help ARM with its massive register set, but halves the size on x86 and all other targets.

llvm-svn: 151760
2012-02-29 21:57:08 +00:00
Jim Grosbach 43bb61ea29 Tidy up. Spelling.
llvm-svn: 151758
2012-02-29 21:46:32 +00:00
Jim Grosbach 8d2f09117b Move the subregister indicies enum into the REGINFO_ENUM section.
llvm-svn: 151756
2012-02-29 21:43:16 +00:00
Jim Grosbach f591df6dd7 Switch TargetRegisterInfo::getSubReg() to use a lookup table.
Instead of nested switch statements, use a lookup table. On ARM, this replaces
a 23k (x86_64 release build) function with a 16k table. Its not unlikely to
be faster, as well.

llvm-svn: 151751
2012-02-29 20:31:17 +00:00
Craig Topper ccd651cac8 Convert generated intrinsic attributes to use an array lookup as Chris suggested in PR11951.
llvm-svn: 151622
2012-02-28 06:32:00 +00:00
Craig Topper 8e76068c6e Update tblgen command guide. Remove unused tblgen InstrEnumEmitter files.
llvm-svn: 151513
2012-02-27 02:31:09 +00:00
Craig Topper 6491c8020e X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by Kay Tiong Khoo.
llvm-svn: 151510
2012-02-27 01:54:29 +00:00
Craig Topper 243582995a Remove 'if' from getSuperRegisters, getSubRegisters, and getOverlaps that were added in r151038.
llvm-svn: 151246
2012-02-23 08:42:06 +00:00
Bill Wendling 7f7a0c6560 Remove bad comma from .el file.
llvm-svn: 151189
2012-02-22 19:38:03 +00:00
David Greene fb927af24f Add Foreach Loop
Add some data structures to represent for loops.  These will be
referenced during object processing to do any needed iteration and
instantiation.

Add foreach keyword support to the lexer.

Add a mode to indicate that we're parsing a foreach loop.  This allows
the value parser to early-out when processing the foreach value list.

Add a routine to parse foreach iteration declarations.  This is
separate from ParseDeclaration because the type of the named value
(the iterator) doesn't match the type of the initializer value (the
value list).  It also needs to add two values to the foreach record:
the iterator and the value list.

Add parsing support for foreach.

Add the code to process foreach loops and create defs based
on iterator values.

Allow foreach loops to be matched at the top level.

When parsing an IDValue check if it is a foreach loop iterator for one
of the active loops.  If so, return a VarInit for it.

Add Emacs keyword support for foreach.

Add VIM keyword support for foreach.

Add tests to check foreach operation.

Add TableGen documentation for foreach.

Support foreach with multiple objects.

Support non-braced foreach body with one object.

Do not require types for the foreach declaration.  Assume the iterator
type from the iteration list element type.

llvm-svn: 151164
2012-02-22 16:09:41 +00:00
Craig Topper cc830f8cda Declare register classes as const. Fix a couple pointers to register classes that weren't already const.
llvm-svn: 151138
2012-02-22 07:28:11 +00:00
Craig Topper 760b134ffa Make all pointers to TargetRegisterClass const since they are all pointers to static data that should not be modified.
llvm-svn: 151134
2012-02-22 05:59:10 +00:00
Craig Topper 028a6721c9 Reorder some members in MCRegisterClass to remove padding on 64-bit builds.
llvm-svn: 151043
2012-02-21 07:36:39 +00:00
Craig Topper da991549c0 In generated RegisterInfo files, replace a pointer to the end of an array with just the size of the array to avoid relocations.
llvm-svn: 151041
2012-02-21 06:54:41 +00:00
Craig Topper 9a511519e4 Merge some tables in generated RegisterInfo file. Store indices into larger table instead of pointers to reduce relocations and shrink table size on 64-bit builds. Shaves ~24K off X86MCTargetDesc.o. Accidentally commited only part of this in r151038.
llvm-svn: 151039
2012-02-21 06:23:21 +00:00
Ahmed Charles 636a3d618c Remove dead code. Improve llvm_unreachable text. Simplify some control flow.
llvm-svn: 150918
2012-02-19 11:37:01 +00:00
Craig Topper 66a3597a4a Add vmfunc instruction to X86 assembler and disassembler.
llvm-svn: 150899
2012-02-19 01:39:49 +00:00
Craig Topper ed7aa46366 Add X86 assembler and disassembler support for AMD SVM instructions. Original patch by Kay Tiong Khoo. Few tweaks by me for code density and to reduce replication.
llvm-svn: 150873
2012-02-18 08:19:49 +00:00
Daniel Dunbar 06b6812b5f utils: Kill NewNightlyTest.pl, which has been replaced by LNT (as far as I know).
llvm-svn: 150610
2012-02-15 19:24:11 +00:00
Benjamin Kramer 428704eb52 Make the EDis tables const.
llvm-svn: 150304
2012-02-11 14:51:07 +00:00
Benjamin Kramer 478e8de8ef Reuse the enum names from X86Desc in the X86Disassembler.
This requires some gymnastics to make it available for C code. Remove the names
from the disassembler tables, making them relocation free.

llvm-svn: 150303
2012-02-11 14:50:54 +00:00
Benjamin Kramer bf152d57a4 Put instruction names into an indexed string table on the side, removing a pointer from MCInstrDesc.
Make them accessible through MCInstrInfo. They are only used for debugging purposes so this doesn't
have an impact on performance. X86MCTargetDesc.o goes from 630K to 461K on x86_64.

llvm-svn: 150245
2012-02-10 13:18:44 +00:00
Benjamin Kramer c602b6ecaf Store just the SimpleValueType in the generated VT tables for each register class, eliminating static ctors.
llvm-svn: 150173
2012-02-09 12:35:37 +00:00
Benjamin Kramer 8e012f5f22 Move the Name field in MCInstrDesc to the end, saving 8 bytes of padding per entry on x86_64.
No change on i386.

llvm-svn: 150170
2012-02-09 11:25:09 +00:00
James Molloy d9ba4fd48f Teach the MC and disassembler about SoftFail, and hook it up to UNPREDICTABLE on ARM. Wire this to tBLX in order to provide test coverage.
llvm-svn: 150169
2012-02-09 10:56:31 +00:00
Craig Topper a0cd970b81 More tweaks to get the size of the X86 disassembler tables down.
llvm-svn: 150167
2012-02-09 08:58:07 +00:00
Craig Topper 487e744f66 Flatten some of the arrays in the X86 disassembler tables to reduce space needed to store pointers on 64-bit hosts and reduce relocations needed at startup. Part of PR11953.
llvm-svn: 150161
2012-02-09 07:45:30 +00:00
Benjamin Kramer 0e4319ec99 Don't map registers to the invalid dwarf register (-1). It's the default value.
X86GenRegisterInfo.inc | 1032 -------------------------------------------------
  1 file changed, 1032 deletions(-)

llvm-svn: 150080
2012-02-08 18:46:26 +00:00
Benjamin Kramer fbe5d3a78f Value initialize MCRegisterClasses. Not sure how could miss this during the MCTargetDesc refactor.
llvm-svn: 150076
2012-02-08 14:43:53 +00:00
Andrew Trick 5470205ad2 This is a small patch with a couple of improvements for running lit with --debug:
1. Added a status note when a config file is loaded directly with load_config. This helps notice loads of lit.cfg from lit.site.cfg
2. Added a status note on the result of a config load. Previously, it was just notifying that it tries to load a config file. Now it will also say whether the load succeeded or the file wasn't found

The two changes give better visibility into which config files were actually loaded by lit. The effect is only on --debug runs.

Patch by Eli Bendersky!

llvm-svn: 149932
2012-02-06 23:34:52 +00:00
Craig Topper c4965bce14 Convert assert(0) to llvm_unreachable
llvm-svn: 149814
2012-02-05 07:21:30 +00:00
Brendon Cahoon e9b60aaf1c Increment DFAStateEntryTable index for sentinel entry.
When adding the {-1, -1} entry to the DFAStateInputTable, we
need to increment the index used to populate the DFAStateEntryTable.
Otherwise, the entry table will be off by one for each transition
after the {-1, -1} entry. PR11908.

llvm-svn: 149713
2012-02-03 21:08:25 +00:00
Rafael Espindola ec217f6ad6 Replace the old --with-cxx-* configure options with a single --with-gcc-toolchain
that just uses the new toolchain probing logic. This fixes linking with -m32 on
64 bit systems (the /32 dir was not being added to the search).

llvm-svn: 149651
2012-02-03 00:59:30 +00:00
Jakob Stoklund Olesen 2123160919 Specify SubRegIndex components on the index itself.
It is simpler to define a composite index directly:

  def ssub_2 : SubRegIndex<[dsub_1, ssub_0]>;
  def ssub_3 : SubRegIndex<[dsub_1, ssub_1]>;

Than specifying the composite indices on each register:

  CompositeIndices = [(ssub_2 dsub_1, ssub_0),
                      (ssub_3 dsub_1, ssub_1)] in ...

This also makes it clear that SubRegIndex composition is supposed to be
unique.

llvm-svn: 149556
2012-02-01 23:16:41 +00:00
Jakob Stoklund Olesen fff0dfd810 Fix a bug in the TopoOrderRC comparison function.
The final tie breaker comparison also needs to return +/-1, or 0.
This is not a less() function.

This could cause otherwise identical super-classes to be ordered
unstably, depending on what the system qsort routine does with a bad
compare function.

llvm-svn: 149549
2012-02-01 22:19:26 +00:00
Jakob Stoklund Olesen 855662ad9a Avoid emitting empty arrays, they're not standard C++.
It's only by luck that we haven't produced any yet, and clang refuses to
compile them.

llvm-svn: 149546
2012-02-01 22:12:51 +00:00
Jakob Stoklund Olesen 2c1ef87e39 Don't assign a value to NUM_TARGET_NAMED_SUBREGS.
It was wrong and completely unused.

llvm-svn: 149433
2012-01-31 21:51:53 +00:00
Jakob Stoklund Olesen 9a44ad7029 Move the composite map into CodeGenSubRegIndex.
Each SubRegIndex keeps track of how it composes.

llvm-svn: 149423
2012-01-31 21:44:11 +00:00
Jakob Stoklund Olesen f1bb151917 Add a TableGen CodeGenSubRegIndex class.
This class is used to represent SubRegIndex instances instead of the raw
Record pointers that were used before.

No functional change intended.

llvm-svn: 149418
2012-01-31 20:57:55 +00:00
David Greene c26e5fb86b Remove Deprecated Features
Move to a model where we build whatever branches are checked out
in the source directories.  This was a bit too smart (and complicated)
in handling details best left to the user and the revision control
system.

In addition, get rid of support for llvm-gcc and building gcc as
these are no longer necessary.

llvm-svn: 149149
2012-01-27 23:01:35 +00:00
Eric Christopher 6a6a30d555 Use -H on darwin as well.
Patch by Liang Wang!

llvm-svn: 149085
2012-01-26 22:06:23 +00:00
Jim Grosbach 0bba00dc2f Tidy up. Trailing whitespace.
llvm-svn: 148856
2012-01-24 21:06:59 +00:00
Owen Anderson d845d9d9e9 Widen the instruction encoder that TblGen emits to a 64 bits, which should accomodate every target I can think of offhand.
llvm-svn: 148833
2012-01-24 18:37:29 +00:00
Jakob Stoklund Olesen 60e70e8fcf Add an (interleave A, B, ...) SetTheory operator.
This will interleave the elements from two or more lists.

llvm-svn: 148824
2012-01-24 18:06:05 +00:00
David Blaikie 6c33e1ce00 Help GCC along with code that's actually unreachable.
Unfortunately I don't think there's a fix for this that will work upstream and
also satisfy Clang's -Wunreachable-code, which is a pity. But I'll give it some
more thought -perhaps there's some way out.

llvm-svn: 148645
2012-01-22 01:17:04 +00:00
David Blaikie fb6ecdf27c Remove unreachable defaults from gtest.
This will ensure LLVM and Clang build -Wswitch-enum-redundant-default (an on-by-default warning I'm about to add to Clang).

llvm-svn: 148639
2012-01-21 18:02:01 +00:00
Kostya Serebryany a5054ad2f3 Extend Attributes to 64 bits
Problem: LLVM needs more function attributes than currently available (32 bits).
One such proposed attribute is "address_safety", which shows that a function is being checked for address safety (by AddressSanitizer, SAFECode, etc).

Solution:
- extend the Attributes from 32 bits to 64-bits
- wrap the object into a class so that unsigned is never erroneously used instead
- change "unsigned" to "Attributes" throughout the code, including one place in clang.
- the class has no "operator uint64 ()", but it has "uint64_t Raw() " to support packing/unpacking.
- the class has "safe operator bool()" to support the common idiom:  if (Attributes attr = getAttrs()) useAttrs(attr);
- The CTOR from uint64_t is marked explicit, so I had to add a few explicit CTOR calls
- Add the new attribute "address_safety". Doing it in the same commit to check that attributes beyond first 32 bits actually work.
- Some of the functions from the Attribute namespace are worth moving inside the class, but I'd prefer to have it as a separate commit.

Tested:
"make check" on Linux (32-bit and 64-bit) and Mac (10.6)
built/run spec CPU 2006 on Linux with clang -O2.


This change will break clang build in lib/CodeGen/CGCall.cpp.
The following patch will fix it.

llvm-svn: 148553
2012-01-20 17:56:17 +00:00
Jakob Stoklund Olesen f43b599550 Add a CoveredBySubRegs property to Register descriptions.
When set, this bit indicates that a register is completely defined by
the value of its sub-registers.

Use the CoveredBySubRegs property to infer which super-registers are
call-preserved given a list of callee-saved registers.  For example, the
ARM registers D8-D15 are callee-saved.  This now automatically implies
that Q4-Q7 are call-preserved.

Conversely, Win64 callees save XMM6-XMM15, but the corresponding
YMM6-YMM15 registers are not call-preserved because they are not fully
defined by their sub-registers.

llvm-svn: 148363
2012-01-18 00:16:39 +00:00
Daniel Dunbar 9619961e1b [lit] Add a --filter option which is useful when dealing with virtual test
paths.

llvm-svn: 148362
2012-01-18 00:03:12 +00:00
Jakob Stoklund Olesen c3abb0f64a Add TableGen support for callee saved registers.
Targets can now add CalleeSavedRegs defs to their *CallingConv.td file.
TableGen will use this to create a *_SaveList array suitable for
returning from getCalleeSavedRegs() as well as a *_RegMask bit mask
suitable for returning from getCallPreservedMask().

llvm-svn: 148346
2012-01-17 22:46:58 +00:00
Devang Patel a77c03be54 Intel syntax: Ignore mnemonic aliases.
llvm-svn: 148316
2012-01-17 18:30:45 +00:00
Benjamin Kramer 50b78ec043 Add an LLDB data formatter script for llvm::SmallVector, maybe this is helpful to someone else.
This lets lldb give sane output for SmallVectors, e.g.
Before:
(lldb) p sv
(llvm::SmallVector<int, 10>) $0 = {
  (llvm::SmallVectorImpl<int>) llvm::SmallVectorImpl<int> = {
    (llvm::SmallVectorTemplateBase<int>) llvm::SmallVectorTemplateBase<int> = {
      (llvm::SmallVectorTemplateCommon<int>) llvm::SmallVectorTemplateCommon<int> = {
        (llvm::SmallVectorBase) llvm::SmallVectorBase = {
          (void *) BeginX = 0x00007fff5fbff960
...
}

After:
(lldb) p sv
(llvm::SmallVector<int, 10>) $0 = {
  (int) [0] = 42
  (int) [1] = 23
...
}

The script is still a bit rough so expect crashes for vectors of complex types.
Synthetic children are _not_ available in xcode 4.2, newer LLDBs should work though.

llvm-svn: 148308
2012-01-17 14:52:12 +00:00
David Blaikie a5708dc3a3 Provide better messages in llvm_unreachable.
llvm-svn: 148293
2012-01-17 07:00:13 +00:00
David Blaikie b48ed1a4cb Remove unreachable code. (replace with llvm_unreachable to help GCC where necessary)
llvm-svn: 148284
2012-01-17 04:43:56 +00:00
David Blaikie 486df738c3 Removing unused default switch cases in switches over enums that already account for all enumeration values explicitly.
(This time I believe I've checked all the -Wreturn-type warnings from GCC & added the couple of llvm_unreachables necessary to silence them. If I've missed any, I'll happily fix them as soon as I know about them)

llvm-svn: 148262
2012-01-16 23:24:27 +00:00
Jakob Stoklund Olesen 071c69cd7c Skip the NAME field when forming tuples.
llvm-svn: 148147
2012-01-13 22:23:50 +00:00
Jakob Stoklund Olesen dd8fbf572e Delete CodeInit and CodeRecTy from TableGen.
The code type was always identical to a string anyway. Now it is simply
a synonym. The code literal syntax [{...}] is still valid.

llvm-svn: 148092
2012-01-13 03:38:34 +00:00
Pete Cooper 9bcb72136e Added MVT::v2f16
llvm-svn: 148067
2012-01-12 23:14:13 +00:00
Argyrios Kyrtzidis cd8fe08e4d Disable the crash reporter when running lit tests.
llvm-svn: 147965
2012-01-11 20:53:25 +00:00
Devang Patel 9bdc505c50 Record asm variant id in MatchEntry and check it while matching instruction.
llvm-svn: 147858
2012-01-10 17:50:43 +00:00
David Blaikie edbb58c577 Remove unnecessary default cases in switches that cover all enum values.
llvm-svn: 147855
2012-01-10 16:47:17 +00:00
Devang Patel 700e2e7505 Use descriptive variable name and remove incorrect operand number check.
llvm-svn: 147802
2012-01-09 21:30:46 +00:00
Devang Patel 85d684a4d9 Split AsmParser into two components - AsmParser and AsmParserVariant
AsmParser holds info specific to target parser.
AsmParserVariant holds info specific to asm variants supported by the target.

llvm-svn: 147787
2012-01-09 19:13:28 +00:00
Benjamin Kramer 6898db6269 Remove VectorExtras. This unused helper was written for a type of API that is discouraged now.
llvm-svn: 147738
2012-01-07 19:42:13 +00:00
Cameron Zwarich e47e682bec Fix TableGen so that it will emit the correct signature for FastEmit_f:
/// FastEmit_f - This method is called by target-independent code
  /// to request that an instruction with the given type, opcode, and
  /// floating-point immediate operand be emitted.
  virtual unsigned FastEmit_f(MVT VT,
                              MVT RetVT,
                              unsigned Opcode,
                              const ConstantFP *FPImm);

Currently, it emits an accidentally overloaded version without the const on the
ConstantFP*. This doesn't affect anything in the tree, since nothing causes that
method to be autogenerated, but I have been playing with some ARM TableGen
refactorings that hit this problem.

llvm-svn: 147727
2012-01-07 08:18:37 +00:00
Devang Patel 6d676e45df Refactor.
Store AsmParser info locally. A small step towards emitting match entries for multiple asm variants.

llvm-svn: 147710
2012-01-07 01:33:34 +00:00
Devang Patel d803f45e41 Eliminate an error check that may not work with all asm syntax variants.
llvm-svn: 147708
2012-01-07 01:22:23 +00:00
Daniel Dunbar 600b23b225 lit/lit.TestRunner: Add an extra_substitutions argument for executeShTest --
useful for test suites which want to piggyback onto the "shtest" format style.

llvm-svn: 147684
2012-01-06 21:39:06 +00:00
Devang Patel c5dbcbe4e6 Do not hard code asm variant number.
llvm-svn: 147583
2012-01-05 00:51:28 +00:00
Jakob Stoklund Olesen bd75a417f9 Don't use enums larger than 1 << 31 for target features.
Patch by Andy Zhang!

llvm-svn: 147491
2012-01-03 23:04:28 +00:00
Craig Topper 2ba766ae84 Add disassembler support for VPERMIL2PD and VPERMIL2PS.
llvm-svn: 147368
2011-12-30 06:23:39 +00:00
Craig Topper 03a0beda88 Add FMA4 instructions to disassembler.
llvm-svn: 147367
2011-12-30 05:20:36 +00:00
Jim Grosbach ea2319112f ARM VFP assembly parsing and encoding for VCVT(float <--> fixed point).
rdar://10558523

llvm-svn: 147189
2011-12-22 22:19:05 +00:00
Bob Wilson f96715d7f0 Remove broken command to copy tblgen tool.
tblgen has been renamed to llvm-tblgen so this command has been failing,
and it's no longer needed because llvm-tblgen is already installed by default.

llvm-svn: 147187
2011-12-22 22:12:40 +00:00
Manuel Klimek 25eb0ac418 Changes the JSON parser to use the SourceMgr.
Diagnostics are now emitted via the SourceMgr and we use MemoryBuffer
for buffer management. Switched the code to make use of the trailing
'0' that MemoryBuffer guarantees where it makes sense.

llvm-svn: 147063
2011-12-21 18:16:39 +00:00
Jim Grosbach c5af54ec89 ARM NEON VLD2 assembly parsing for structure to all lanes, non-writeback.
llvm-svn: 147025
2011-12-21 00:38:54 +00:00
Manuel Klimek 860d978ef6 Fixing option for JSON benchmark broken since the change to size_t.
llvm-svn: 146970
2011-12-20 10:34:29 +00:00
Chandler Carruth e805b16e3d Fix up the CMake build for the new files added in r146960, they're
likely to stay either way that discussion ends up resolving itself.

llvm-svn: 146966
2011-12-20 08:42:11 +00:00
David Blaikie 5ca16b1030 Revert pragma clang suppressions that confuse GCC. (I'll worry about how to suppress/fix these problems properly when we figure out how to keep LLVM -Wweak-vtables clean)
llvm-svn: 146965
2011-12-20 08:22:49 +00:00
David Blaikie a379b18173 Unweaken vtables as per http://llvm.org/docs/CodingStandards.html#ll_virtual_anch
llvm-svn: 146960
2011-12-20 02:50:00 +00:00
Dan Gohman 94580ab375 Add basic generic CodeGen support for half.
llvm-svn: 146927
2011-12-20 00:02:33 +00:00
Jakob Stoklund Olesen c7b437ae34 Emit a getMatchingSuperRegClass() implementation for every target.
Use information computed while inferring new register classes to emit
accurate, table-driven implementations of getMatchingSuperRegClass().

Delete the old manual, error-prone implementations in the targets.

llvm-svn: 146873
2011-12-19 16:53:34 +00:00
Jakob Stoklund Olesen b92f557c40 Synthesize register classes for TRI::getMatchingSuperRegClass().
Teach TableGen to create the missing register classes needed for
getMatchingSuperRegClass() to return maximal results.  The function is
still not auto-generated, so it still returns inexact results.

This produces these new register classes:

ARM:
    QQPR_with_dsub_0_in_DPR_8
    QQQQPR_with_dsub_0_in_DPR_8
X86:
    GR64_with_sub_32bit_in_GR32_NOAX
    GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOSP
    GR64_with_sub_16bit_in_GR16_NOREX
    GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX
    GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX
    GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX_NOSP
    GR64_TCW64_and_GR64_with_sub_32bit_in_GR32_NOAX
    GR64_TC_and_GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_NOREX
    GR64_with_sub_32bit_in_GR32_TC
    GR64_with_sub_32bit_in_GR32_ABCD_and_GR32_NOAX
    GR64_with_sub_32bit_in_GR32_NOAX_and_GR32_TC
    GR64_with_sub_32bit_in_GR32_AD
    GR64_with_sub_32bit_in_GR32_AD_and_GR32_NOAX

The other targets in the tree are not weird enough to be affected.

llvm-svn: 146872
2011-12-19 16:53:28 +00:00
Manuel Klimek 7582bbc67c Allow for benchmarking more than 4GB of memory
llvm-svn: 146864
2011-12-19 09:56:35 +00:00
Manuel Klimek 51945952ce Adds a flag to allow specifying the memory limitations of the JSON benchmark.
llvm-svn: 146863
2011-12-19 09:32:05 +00:00
Manuel Klimek 2c899a181c Adds a JSON parser and a benchmark (json-bench) to catch performance regressions.
llvm-svn: 146735
2011-12-16 13:09:10 +00:00
Jakob Stoklund Olesen 6a5f0a1906 Extract a method. No functional change.
llvm-svn: 146713
2011-12-16 00:12:05 +00:00
Daniel Dunbar 06bb798803 build/unittests: Fix llvm-config names for gtest libraries, and bring Makefile
library names in line with those used by CMake.
 - Patch by Johannes Obermayr, with tweaks by me.

llvm-svn: 146706
2011-12-15 23:35:08 +00:00
Jakob Stoklund Olesen f94cd19374 Use the proper comparator for set_intersection.
llvm-svn: 146674
2011-12-15 19:26:23 +00:00
Jakob Stoklund Olesen c0f97e3dd4 Synthesize missing register class intersections.
The function TRI::getCommonSubClass(A, B) returns the largest common
sub-class of the register classes A and B.  This patch teaches TableGen
to synthesize sub-classes such that the answer is always maximal.

In other words, every register that is in both A and B will also be
present in getCommonSubClass(A, B).

This introduces these synthetic register classes:

ARM:
    GPRnopc_and_hGPR
    GPRnopc_and_hGPR
    hGPR_and_rGPR
    GPRnopc_and_hGPR
    GPRnopc_and_hGPR
    hGPR_and_rGPR
    tGPR_and_tcGPR
    hGPR_and_tcGPR

X86:
    GR32_NOAX_and_GR32_NOSP
    GR32_NOAX_and_GR32_NOREX
    GR64_NOSP_and_GR64_TC
    GR64_NOSP_and_GR64_TC
    GR64_NOREX_and_GR64_TC
    GR32_NOAX_and_GR32_NOSP
    GR32_NOAX_and_GR32_NOREX
    GR32_NOAX_and_GR32_NOREX_NOSP
    GR64_NOSP_and_GR64_TC
    GR64_NOREX_and_GR64_TC
    GR64_NOREX_NOSP_and_GR64_TC
    GR32_NOAX_and_GR32_NOSP
    GR32_NOAX_and_GR32_NOREX
    GR32_NOAX_and_GR32_NOREX_NOSP
    GR32_ABCD_and_GR32_NOAX
    GR32_NOAX_and_GR32_NOSP
    GR32_NOAX_and_GR32_NOREX
    GR32_NOAX_and_GR32_NOREX_NOSP
    GR32_ABCD_and_GR32_NOAX
    GR32_NOAX_and_GR32_TC
    GR32_NOAX_and_GR32_NOSP
    GR64_NOSP_and_GR64_TC
    GR32_NOAX_and_GR32_NOREX
    GR32_NOAX_and_GR32_NOREX_NOSP
    GR64_NOREX_and_GR64_TC
    GR64_NOREX_NOSP_and_GR64_TC
    GR32_ABCD_and_GR32_NOAX
    GR64_ABCD_and_GR64_TC
    GR32_NOAX_and_GR32_TC
    GR32_AD_and_GR32_NOAX

Other targets are unaffected.

llvm-svn: 146657
2011-12-15 16:48:55 +00:00
Daniel Dunbar e29ffffa48 llvm-build: Switch to using the common subdirectory list instead of
autodiscovery.

llvm-svn: 146437
2011-12-12 22:45:59 +00:00
Daniel Dunbar 8889bb08b8 LLVMBuild: Introduce a common section which currently has a list of the
subdirectories to traverse into.
 - Originally I wanted to avoid this and just autoscan, but this has one key
   flaw in that new subdirectories can not automatically trigger a rerun of the
   llvm-build tool. This is particularly a pain when switching back and forth
   between trees where one has added a subdirectory, as the dependencies will
   tend to be wrong. This will also eliminates FIXME implicitly.

llvm-svn: 146436
2011-12-12 22:45:54 +00:00
Daniel Dunbar 088f81b891 llvm-build: Don't write out the required_libraries list for "special" components, it is generated.
llvm-svn: 146435
2011-12-12 22:45:41 +00:00
Daniel Dunbar ea07f34afd llvm-build: Add sketchy support for preserving comments when using
--write-llvmbuild.

llvm-svn: 146434
2011-12-12 22:45:35 +00:00
Daniel Dunbar 27a7489a03 LLVMBuild: Remove trailing newline, which irked me.
llvm-svn: 146409
2011-12-12 19:48:00 +00:00
Jakob Stoklund Olesen 7ebc6b052f Extract a method.
llvm-svn: 146374
2011-12-12 16:16:24 +00:00
Jim Grosbach d4b8249434 ARM: NEON SHLL instruction immediate operand range checking.
llvm-svn: 146003
2011-12-07 01:07:24 +00:00
Jim Grosbach ba39592cee Extend AsmMatcher token literal matching to allow aliasing.
For example, ARM allows:
    vmov.u32 s4, #0  -> vmov.i32, #0
'u32' is a more specific designator for the 32-bit integer type specifier
and is legal for any instruction which accepts 'i32' as a datatype suffix.

We want to say,
    def : TokenAlias<".u32", ".i32">;

This works by marking the match class of 'From' as a subclass of the
match class of 'To'.

rdar://10435076

llvm-svn: 145992
2011-12-06 23:43:54 +00:00
Daniel Dunbar cda2a8985c llvm-build: Don't generate duplicate dependencies when LLVMBuild files define
multiple components.

llvm-svn: 145989
2011-12-06 23:13:42 +00:00
Evan Cheng 2a81dd4a3c First chunk of MachineInstr bundle support.
1. Added opcode BUNDLE
2. Taught MachineInstr class to deal with bundled MIs
3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs
4. Taught MachineBasicBlock methods about bundled MIs

llvm-svn: 145975
2011-12-06 22:12:01 +00:00
Jim Grosbach 1f5c5aa209 Tidy up. Fix naming convention stuff for some internal functions.
llvm-svn: 145974
2011-12-06 22:07:02 +00:00
Sebastian Pop ac35a4d0f7 use space star instead of star space
llvm-svn: 145944
2011-12-06 17:34:16 +00:00
Sebastian Pop 9aa6137d97 add missing point at the end of sentences
llvm-svn: 145943
2011-12-06 17:34:11 +00:00
Jim Grosbach 9dff9f4c41 ARM NEON VEXT aliases for data type suffices.
llvm-svn: 145726
2011-12-02 23:34:39 +00:00
Dylan Noblesmith 4393d6bd05 TableGen: fix CMake build s'more
Oops, missed another missing file from r145629.

llvm-svn: 145636
2011-12-01 21:53:39 +00:00
Anshuman Dasgupta 08ebdc1e71 Add a deterministic finite automaton based packetizer for VLIW architectures
llvm-svn: 145629
2011-12-01 21:10:21 +00:00
Jim Grosbach 8eeb353071 Replace an assert() with an actual diagnostic.
llvm-svn: 145535
2011-11-30 23:16:25 +00:00
Jim Grosbach 3ecf976ca9 ARM parsing for VLD1 two register all lanes, no writeback.
llvm-svn: 145504
2011-11-30 18:21:25 +00:00
Jim Grosbach f09b1c46cf llvm_unreachable() is not for user diagnostics....
llvm-svn: 145465
2011-11-30 01:15:55 +00:00
Jim Grosbach cd6f5e757c ARM parsing aliases for VLD1 single register all lanes.
llvm-svn: 145464
2011-11-30 01:09:44 +00:00
Daniel Dunbar 539d0a8a09 build/CMake: Finish removal of add_llvm_library_dependencies.
llvm-svn: 145420
2011-11-29 19:25:30 +00:00
NAKAMURA Takumi 0e5bae7191 lit/TestRunner.py: Try to catch ERROR_FILE_NOT_FOUND, too.
Thanks to Francois, to let me know.

llvm-svn: 145381
2011-11-29 06:40:50 +00:00
Bob Wilson b103fbf005 Install llvmCore to /usr/local. <rdar://problem/10390708>
llvm-svn: 145378
2011-11-29 06:11:56 +00:00
Daniel Dunbar 4128db91c2 llvmbuild/CMake: Update CMake output fragment to include explicit library
dependency information.

llvm-svn: 145328
2011-11-29 00:06:50 +00:00
Bill Wendling 957cc212bb Support a 'final' release candidate tag.
llvm-svn: 145243
2011-11-28 11:45:10 +00:00
NAKAMURA Takumi a0d652e71b lit/TestRunner.py: Use RemoveForce().
llvm-svn: 145223
2011-11-28 01:55:08 +00:00
NAKAMURA Takumi 57fc5adca0 lit/TestRunner.py: [Win32] Introduce WinWaitReleased(f), to wait for file handles to be released by children.
When wait() has finished, opened handles (especially writing stdout to file) might not be released immediately.
To wait for released, poll to attempt renaming.

llvm-svn: 145222
2011-11-28 01:55:01 +00:00
Craig Topper 75ffc5fbb5 Remove some unnecessary filtering checks from X86 disassembler table build.
llvm-svn: 144986
2011-11-19 05:48:20 +00:00
Daniel Dunbar 52f71220d5 llvm-build: Attempt to work around a CMake Makefile generator bug that doesn't
properly quote strings when writing the CMakeFiles/Makefile.cmake output file
(which lists the dependencies). This shows up when using CMake + MSYS Makefile
generator.

llvm-svn: 144873
2011-11-17 01:19:53 +00:00
Owen Anderson ca2f78a95b Rename MVT::untyped to MVT::Untyped to match similar nomenclature.
llvm-svn: 144747
2011-11-16 01:02:57 +00:00
Evan Cheng 7ca4b6eb5c Add vmov.f32 to materialize f32 immediate splats which cannot be handled by
integer variants. rdar://10437054

llvm-svn: 144608
2011-11-15 02:12:34 +00:00
Jim Grosbach 29cdcda80d ARM parsing datatype suffix variants for fixed-writeback VLD1/VST1 instructions.
rdar://10435076

llvm-svn: 144606
2011-11-15 01:46:57 +00:00
Jim Grosbach 7b03fbd25c Tidy up. Formatting.
llvm-svn: 144598
2011-11-15 01:05:12 +00:00
Daniel Dunbar 415ecbc34a LLVMBuild: Add info for gtest.
llvm-svn: 144445
2011-11-12 02:11:04 +00:00
Daniel Dunbar 2f39f72703 LLVMBuild: Alphabetize required_libraries lists.
llvm-svn: 144416
2011-11-11 22:59:23 +00:00
Daniel Dunbar f258ad81c0 llvm-build: Add --configure-target-def-file option.
- Can be used to generate the substitution values we currently use for the various target related .def files.

llvm-svn: 144345
2011-11-11 00:24:00 +00:00
Daniel Dunbar 6d617b48c7 LLVMBuild: Add explicit information on whether targets define an assembly printer, assembly parser, or disassembler.
llvm-svn: 144344
2011-11-11 00:23:56 +00:00
Daniel Dunbar 807c6e4e5f build/Make & CMake: Pass the appropriate --native-target and --enable-targets
options to llvm-build, so the all-targets etc. components are defined properly.

llvm-svn: 144255
2011-11-10 01:16:48 +00:00
Daniel Dunbar 233c9304a8 llvm-build: Add --native-target and --enable-targets options, and add logic to
handle defining the "magic" target related components (like native,
nativecodegen, and engine).
 - We still require these components to be in the project (currently in
   lib/Target) so that we have a place to document them and hopefully make it
   more obvious that they are "magic".

llvm-svn: 144253
2011-11-10 00:50:07 +00:00
Daniel Dunbar 79fa1e8891 llvm-build: Split out the validation logic.
llvm-svn: 144252
2011-11-10 00:49:58 +00:00
Daniel Dunbar 82219ad4dc llvm-build: Add an explicit component type to represent targets.
- Gives us a place to hang target specific metadata (like whether the target has a JIT).

llvm-svn: 144250
2011-11-10 00:49:51 +00:00
Daniel Dunbar c83a459937 llvm-build: Tidy up options.
llvm-svn: 144249
2011-11-10 00:49:42 +00:00
Owen Anderson 133ccfcc22 Remove this from the CMake build since I erased the file.
llvm-svn: 144245
2011-11-10 00:07:22 +00:00
Owen Anderson efc349af6c Remove the old-style ARM disassembler, which is no longer used.
llvm-svn: 144243
2011-11-09 23:56:06 +00:00
Craig Topper f01f1b5cb9 More AVX2 instructions and their intrinsics.
llvm-svn: 143895
2011-11-06 23:04:08 +00:00
Daniel Dunbar 0edba5c989 utils/llvm-build: Ensure output directory exists for tools which write various fragments.
llvm-svn: 143782
2011-11-05 04:07:49 +00:00
Daniel Dunbar 9057a3de5a utils/llvm-build: Add trivial quoting of slashes for CMake fragment.
llvm-svn: 143781
2011-11-05 04:07:43 +00:00
Daniel Dunbar b814ee46e8 llvm-build: Quote colons in target names, in an attempt to make msys happy.
llvm-svn: 143745
2011-11-04 23:40:11 +00:00
Daniel Dunbar e9733850be llvm-build: Add initial --write-cmake-fragment option.
llvm-svn: 143744
2011-11-04 23:10:37 +00:00
Bob Wilson 269532de25 Build llvmCore with RTTI enabled. <rdar://problem/10395761>
llvm-svn: 143714
2011-11-04 17:57:13 +00:00
Daniel Dunbar 9ef81066ad utils: Rename the "llvmbuild" script to llvm-compilers-check.
llvm-svn: 143673
2011-11-04 01:09:02 +00:00
Daniel Dunbar ab3b1804fe llvm-build: Add initial code for --write-make-fragment.
llvm-svn: 143661
2011-11-03 22:46:19 +00:00
Daniel Dunbar 9f01a0db7d utils: Remove (way) old nightly test scripts, I don't think anyone uses them and LNT has way better tools than this.
llvm-svn: 143655
2011-11-03 21:03:53 +00:00
Daniel Dunbar 3fa708098a llvm-build: Avoid followlinks keyword argument to os.walk.
- llvm-build should now be Python2.4 compatible as best I know.

llvm-svn: 143641
2011-11-03 19:45:52 +00:00
Daniel Dunbar bf9bba47a1 build: Add initial cut at LLVMBuild.txt files.
llvm-svn: 143634
2011-11-03 18:53:17 +00:00
Daniel Dunbar 453146e569 llvm-build: Update --write-llvmbuild to write out a standard LLVM style file
header.

llvm-svn: 143629
2011-11-03 17:56:31 +00:00
Daniel Dunbar 445e8f9d35 llvm-build: Add "--write-library-table" option for generating the C++ library
dependency table used by llvm-config.

llvm-svn: 143628
2011-11-03 17:56:28 +00:00
Daniel Dunbar dbbb258666 llvm-build: Add --write-llvmbuild option, which writes out the component tree.
- Useful for migrating or auto-upgrading the format schema.

llvm-svn: 143626
2011-11-03 17:56:21 +00:00
Daniel Dunbar f45369d7e8 llvm-build: Add --print-tree command line option.
llvm-svn: 143625
2011-11-03 17:56:18 +00:00
Daniel Dunbar 4897255255 llvm-build: Fill in some details w.r.t. component's parents.
llvm-svn: 143624
2011-11-03 17:56:16 +00:00
Daniel Dunbar 8844e3c0b2 llvm-build: Validate information on the loaded components and form the topological ordering among them (as well as validating that there are no cycles).
- Currently we require that all references between components (except the parent relation) fit into a DAG -- this could be relaxed later if it ever proves to be useful.

llvm-svn: 143623
2011-11-03 17:56:12 +00:00
Daniel Dunbar 84fc5ce7af llvm-build: Fill in more of component parsing to be more strict and
differentiate between strings and lists.

llvm-svn: 143622
2011-11-03 17:56:10 +00:00
Daniel Dunbar dd3fb562c4 llvm-build: Sketch code to load LLVMBuild.txt files.
llvm-svn: 143621
2011-11-03 17:56:06 +00:00
Daniel Dunbar 01b0588b42 build: Stub out llvm-build utility tool.
llvm-svn: 143620
2011-11-03 17:56:03 +00:00
Chandler Carruth 39bf89b382 The TableGen parts of the CMake build are seriously broken. This fixes
one aspect of them by having them use the (annoying, if not broken)
proper library dependency model for adding the LLVMTableGen library as
a dependency. This could manifest as a link order issue in the presence
of separate LLVM / Clang source builds with CMake and a linker that
really cares about such things.

Also, add the Support dependency to llvm-tblgen itself so that it
doesn't rely on TableGen's transitive Support dependency. A parallel
change for clang-tblgen will be forthcoming.

llvm-svn: 143531
2011-11-02 05:03:06 +00:00
Chad Rosier 800f223b12 Rename show-diagnostics to something less ambiguous.
llvm-svn: 143525
2011-11-02 00:44:16 +00:00
Bill Wendling f525e37c5d Do a relative path ln command instead of an absolute path one. Some people strangely enough have different directory layouts...
llvm-svn: 143302
2011-10-29 23:49:52 +00:00
Jim Grosbach d1f1b79b52 Allow InstAlias's to use immediate matcher patterns that xform the value.
For example,

On ARM, "mov r3, #-3" is an alias for "mvn r3, #2", so we want to use a
matcher pattern that handles the bitwise negation when mapping to t2MVNi.

llvm-svn: 143233
2011-10-28 22:32:53 +00:00
Jim Grosbach 6acb14818d Allow register classes to match a containing class in InstAliases.
If the register class in the source alias is a subclass of the register class
of the actual instruction, the alias can still match OK since the constraints
are strictly a subset of what the instruction can actually handle.

llvm-svn: 143200
2011-10-28 16:43:40 +00:00
Dan Gohman 4c9fca99c9 Remove the Alpha backend.
llvm-svn: 143164
2011-10-27 22:56:32 +00:00
Jim Grosbach 3628c64546 Delete dead code. Nothing ever instantiates this.
llvm-svn: 143153
2011-10-27 21:59:17 +00:00
Daniel Dunbar e800a9cb70 lit: Drop some unneeded code from example tests.
- Also, cleanup site.exp files in example tests.

llvm-svn: 143141
2011-10-27 20:59:19 +00:00
Dan Gohman b43c36f391 Remove the Blackfin backend.
llvm-svn: 142880
2011-10-25 00:05:42 +00:00
Dan Gohman dfc96aea90 Remove the SystemZ backend.
llvm-svn: 142878
2011-10-24 23:48:32 +00:00
Chad Rosier 522b56d9d8 Add options to enable each individual level for the show-diagnostics tool.
rdar://9683410

llvm-svn: 142856
2011-10-24 21:56:50 +00:00
Bill Wendling addcfcac5c Rename the script to indicate that this is for the TEST=simple tests.
llvm-svn: 142764
2011-10-23 20:14:06 +00:00