3b1336ceb9
Typo.
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llvm-svn: 162807
2012-08-28 23:57:47 +00:00
407d659fa5
Add comments on the literal value used.
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llvm-svn: 162805
2012-08-28 23:42:17 +00:00
710e1a594b
Explicitly update the number of nodes to be traversed
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llvm-svn: 162780
2012-08-28 19:20:29 +00:00
cc56718038
The commutative flag is already correctly set within the multiclass. If we set
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it here, then a 'register-memory' version would wrongly get the commutative
flag.
<rdar://problem/12180135>
llvm-svn: 162741
2012-08-28 07:36:46 +00:00
72f51c3986
Convert V_SETALLONES/AVX_SETALLONES/AVX2_SETALLONES to Post-RA pseudos.
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llvm-svn: 162740
2012-08-28 07:30:47 +00:00
bd509eea4a
Merge AVX_SET0PSY/AVX_SET0PDY/AVX2_SET0 into a single post-RA pseudo.
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llvm-svn: 162738
2012-08-28 07:05:28 +00:00
b7d85b6328
Fix PR12312
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- Add a target-specific DAG optimization to recognize a pattern PTEST-able.
Such a pattern is a OR'd tree with X86ISD::OR as the root node. When
X86ISD::OR node has only its flag result being used as a boolean value and
all its leaves are extracted from the same vector, it could be folded into an
X86ISD::PTEST node.
llvm-svn: 162735
2012-08-28 03:34:40 +00:00
89d6b29d16
More missing mayLoad flags on AVX multiclasses.
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llvm-svn: 162714
2012-08-28 00:02:01 +00:00
a737ef8964
Remove MMX shift intrinsic handling code that also exists in SelectionDAGBuilder.
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llvm-svn: 162661
2012-08-27 08:08:30 +00:00
5af2fed5f2
Don't allow vextractf128 to be folded with unaligned stores. We don't fold unaligned loads so shouldn't fold unaligned stores as it can cause an alignment fault to occur.
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llvm-svn: 162658
2012-08-27 07:19:59 +00:00
6d44554cd4
Fold some patterns into instruction definitons so tablegen can infer flags removing the need for an explicit 'neverHasSideEffects = 1'
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llvm-svn: 162656
2012-08-27 07:04:50 +00:00
f7828f91ee
Add HasAVX1Only predicate and use it for patterns that have an AVX1 instruction and an AVX2 instruction rather than relying on AddedComplexity.
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llvm-svn: 162654
2012-08-27 06:08:57 +00:00
228e6d4cf3
Fix integer undefined behavior due to signed left shift overflow in LLVM.
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Reviewed offline by chandlerc.
llvm-svn: 162623
2012-08-24 23:29:28 +00:00
3d91b43ad2
Add missing mayLoad flags to a large class of AVX *_Int instructions.
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llvm-svn: 162622
2012-08-24 23:29:07 +00:00
b50cf8b30f
Mark X86::RET and RETI instructions as variadic.
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There is special magic happening when returning floating point values on
the x87 stack. The RET instructions get extra f80 operands.
llvm-svn: 162592
2012-08-24 20:52:44 +00:00
8ff666fcb6
Remove more mayLoad workarounds.
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llvm-svn: 162556
2012-08-24 14:43:22 +00:00
663d160adb
Custom lower FMA intrinsics to target specific nodes and remove the patterns.
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llvm-svn: 162534
2012-08-24 04:03:22 +00:00
d3511235d1
Remove some spurious mayLoad = 0 flags.
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They were inserted to silence TableGen's warning about
redundant properties. That warning is now gone.
llvm-svn: 162517
2012-08-24 00:31:20 +00:00
df1faa0503
X86MemBarrier has unmodeled side effects.
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llvm-svn: 162514
2012-08-24 00:31:10 +00:00
7030427623
Preserve operand flags in convertToThreeAddress() by copying operands.
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No test case, this is a generalization of r160260.
llvm-svn: 162485
2012-08-23 22:36:31 +00:00
4a4634d6de
Favor FMA3 over FMA4 if both are enabled.
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llvm-svn: 162454
2012-08-23 18:14:30 +00:00
f911597494
Use a switch statement instead of a bunch of if-else checks and pull out the common function call.
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llvm-svn: 162428
2012-08-23 04:57:36 +00:00
cf172e5e28
[ms-inline asm] Avoid a false positive assertion
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Assertion failed: (Start.isValid() == End.isValid() && "Start and end should
either both be valid or both be invalid!")
when parsing inline asm. SMLoc assumes that the first char * in the source is
invalid. However, when parsing an inline asm the mnemonic is at this location.
I don't want to change SMLoc, so use a trivial workaround.
llvm-svn: 162381
2012-08-22 19:14:29 +00:00
a538d831e6
Add a getName function to MachineFunction. Use it in places that previously did getFunction()->getName(). Remove includes of Function.h that are no longer needed.
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llvm-svn: 162347
2012-08-22 06:07:19 +00:00
056dfcccb7
Don't cache the MBB in the class. Its only used by one function. Change a for loop over operands to use unsigned instead of int.
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llvm-svn: 162344
2012-08-22 05:59:59 +00:00
455bcafa3b
Mark a function as static since it doesn't use anything in the class.
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llvm-svn: 162342
2012-08-22 05:36:44 +00:00
13473857a7
Fix unaligned memory accesses when performing relocations in X86 JIT. There's
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no cost to using memcpy here: the fixed code is optimized by LLVM to perfect
machine code.
llvm-svn: 162311
2012-08-21 20:48:36 +00:00
3d4bc62a5c
[ms-inline asm] Do not report a Parser error when matching inline assembly.
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llvm-svn: 162306
2012-08-21 19:36:59 +00:00
79e766c38e
[ms-inline asm] Expose the ErrorInfo from the MatchInstructionImpl. In general,
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this is the index of the operand that failed to match.
Note: This may cause a buildbot failure due to an API mismatch in clang. Should
recover with my next commit to clang.
llvm-svn: 162295
2012-08-21 18:14:59 +00:00
bab0c76674
Fix up indentation and remove a couple else's after returns.
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llvm-svn: 162270
2012-08-21 08:29:51 +00:00
bfcfdeb563
Use uint16_t for tables of opcodes.
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llvm-svn: 162267
2012-08-21 08:23:21 +00:00
a0cabf19f8
Fix up indentation. No functional change.
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llvm-svn: 162264
2012-08-21 08:17:07 +00:00
4bc3e5a1bf
Add a couple llvm_unreachables. Add a message to several others.
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llvm-svn: 162263
2012-08-21 08:16:16 +00:00
653e759046
Replace a break with llvm_unreachable in the default case of a nested switch. Condense code a bit. No functional change.
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llvm-svn: 162261
2012-08-21 07:32:16 +00:00
384fae2f0d
Cleanup the scalar FMA3 definitions. Add patterns to fold loads with scalar forms.
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llvm-svn: 162260
2012-08-21 07:11:11 +00:00
4f3879dfa7
Merge FMA3 instructions with and without patterns into single classes using null_frag.
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llvm-svn: 162257
2012-08-21 05:56:45 +00:00
10ff96ce8c
fix a case where all operands of BUILD_VECTOR are undefined
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llvm-svn: 162214
2012-08-20 17:59:18 +00:00
b58eec4eaf
Remove FMA3 intrinsic instructions in favor of patterns.
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llvm-svn: 162194
2012-08-20 06:21:25 +00:00
37eca54912
Use correct intrinsic for 256-bit VFMSUBADDPS.
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llvm-svn: 162193
2012-08-20 06:03:04 +00:00
5122e9f194
Remove trailing white space and tab characters. No functional change.
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llvm-svn: 162192
2012-08-19 23:37:46 +00:00
178250ad87
When unsafe math is used, we can use commutative FMAX and FMIN. In some cases
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this allows for better code generation.
Added a new DAGCombine transformation to convert FMAX and FMIN to FMANC and
FMINC, which are commutative.
For example:
movaps %xmm0, %xmm1
movsd LC(%rip), %xmm0
minsd %xmm1, %xmm0
becomes:
minsd LC(%rip), %xmm0
llvm-svn: 162187
2012-08-19 13:06:16 +00:00
a136939fa9
Reapply r162160 with a fix: Optimize Arith->Trunc->SETCC sequence to allow better compare/branch code.
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llvm-svn: 162172
2012-08-18 17:53:03 +00:00
0128f9bad7
Refactor code a bit to reduce number of calls in the final compiled code. No functional change intended.
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llvm-svn: 162166
2012-08-18 06:39:34 +00:00
c324af609e
Revert r162160 because it made a few buildbots fail.
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llvm-svn: 162164
2012-08-18 05:02:36 +00:00
2cb14a5c4b
The X86 backend has a number of optimizations for SETCC nodes which use
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arithmetic instructions. However, when small data types are used, a truncate
node appears between the SETCC node and the arithmetic operation. This patch
adds support for this pattern.
Before:
xorl %esi, %edi
testb %dil, %dil
setne %al
ret
After:
xorb %dil, %sil
setne %al
ret
rdar://12081007
llvm-svn: 162160
2012-08-18 02:43:28 +00:00
31625574db
Use nested switch to select arguments to reduce calls to EmitPCMP.
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llvm-svn: 162089
2012-08-17 07:15:56 +00:00
602e1abe0d
Make ReplaceATOMIC_BINARY_64 a static function. Use a nested switch to reduce to only a single call to it thus allowing it to be inlined by the compiler.
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llvm-svn: 162088
2012-08-17 06:55:11 +00:00
af3e98347f
Patch to enable FMA on bdver2 target. Make XOP feature enable FMA4 as well.
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llvm-svn: 162012
2012-08-16 04:04:02 +00:00
426feb61b9
(no commit message)
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llvm-svn: 162010
2012-08-16 03:50:04 +00:00
06f6fe875a
minor fix of X86ISD::VSEXT_MOVL dump
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llvm-svn: 161902
2012-08-14 22:53:17 +00:00
Chad Rosier