Commit Graph

2336 Commits

Author SHA1 Message Date
Johnny Chen 0dae1cbf1c AL is an optional mnemonic extension for always, except in IT instructions.
Add printMandatoryPredicateOperand() PrintMethod for IT predicate printing.

Ref: A8.3 Conditional execution
llvm-svn: 97571
2010-03-02 17:57:15 +00:00
Johnny Chen d520eabcb9 Change some asm shift opcode strings to lowercase.
llvm-svn: 97567
2010-03-02 17:03:18 +00:00
Xerxes Ranby 09d9a690d2 fix typo add missing (
llvm-svn: 97565
2010-03-02 13:42:03 +00:00
Xerxes Ranby b1baf6583e Unbreak llvm-arm-linux buildbot and fix PR5309.
llvm-svn: 97564
2010-03-02 13:26:18 +00:00
Chris Lattner f98f124a73 Sink InstructionSelect() out of each target into SDISel, and rename it
DoInstructionSelection.  Inline "SelectRoot" into it from DAGISelHeader.
Sink some other stuff out of DAGISelHeader into SDISel.

Eliminate the various 'Indent' stuff from various targets, which dates
to when isel was recursive.

 17 files changed, 114 insertions(+), 430 deletions(-)

llvm-svn: 97555
2010-03-02 06:34:30 +00:00
Eric Christopher 118dc6a645 Only save vector registers if we've defined for the vector registers.
Fixes PR5309.

llvm-svn: 97554
2010-03-02 06:25:00 +00:00
Bill Wendling 78c5b7a76d Remove dead parameter passing.
llvm-svn: 97536
2010-03-02 01:55:18 +00:00
Johnny Chen 718ed8a6d5 Added STRHT for disassembly only and fixed a bug in AI3sthpo class where the W
bit should be set to 0 instead of 1.

llvm-svn: 97481
2010-03-01 19:22:00 +00:00
Dan Gohman 8c5d683aa9 The mayHaveSideEffects flag is no longer used.
llvm-svn: 97348
2010-02-27 23:47:46 +00:00
Johnny Chen 38e7bb6f34 Added the follwoing 32-bit Thumb instructions for disassembly only:
o Parallel addition and subtraction, signed/unsigned
o Miscellaneous operations: QADD, QDADD, QSUB, QDSUB
o Unsigned sum of absolute differences [and accumulate]: USAD8, USADA8
o Signed/Unsigned saturate: SSAT, SSAT16, USAT, USAT16
o Signed multiply accumulate long (halfwords): SMLAL<x><y>
o Signed multiply accumulate/subtract [long] (dual): SMLAD[x], SMLALD[X], SMLSD[X], SMLSLD[X]
o Signed dual multiply add/subtract [long]: SMUAD[X], SMUSD[X]

llvm-svn: 97276
2010-02-26 22:04:29 +00:00
Johnny Chen 3adff378cc Added the following 32-bit Thumb instructions for disassembly only: SMC, RFE,
and SRS.

llvm-svn: 97164
2010-02-25 20:25:24 +00:00
Johnny Chen 871e5b0926 Added the 32-bit Thumb instructions (BXJ) for disassembly only.
llvm-svn: 97163
2010-02-25 19:05:29 +00:00
Johnny Chen e285f70a42 Added the 32-bit Thumb instructions (MRS and MSR) for disassembly only.
llvm-svn: 97159
2010-02-25 18:46:43 +00:00
Johnny Chen 74cca5a989 Added the following 16-bit Thumb instructions for disassembly only: YIELD, WFE,
WFI, SEV, SETEND.

llvm-svn: 97149
2010-02-25 17:51:03 +00:00
Johnny Chen 90adefcf7e Added tNOP for disassembly only.
llvm-svn: 97105
2010-02-25 03:28:51 +00:00
Johnny Chen 57656da73f Added tSVC and tTRAP for disassembly only.
llvm-svn: 97098
2010-02-25 02:21:11 +00:00
Jakob Stoklund Olesen 63af51c1c8 Create a stack frame on ARM when
- Function uses all scratch registers AND
- Function does not use any callee saved registers AND
- Stack size is too big to address with immediate offsets.

In this case a register must be scavenged to calculate the address of a stack
object, and the scavenger needs a spare register or emergency spill slot.

llvm-svn: 97071
2010-02-24 22:43:17 +00:00
Bob Wilson ba8ac74fd9 Check for comparisons of +/- zero when optimizing less-than-or-equal and
greater-than-or-equal SELECT_CCs to NEON vmin/vmax instructions.  This is
only allowed when UnsafeFPMath is set or when at least one of the operands
is known to be nonzero.

llvm-svn: 97065
2010-02-24 22:15:53 +00:00
Johnny Chen 86ba44a4c7 Added Vector Swap (VSWPd and VSWPq) instructions for disassembly only.
A8.6.405

llvm-svn: 97052
2010-02-24 20:06:07 +00:00
Jakob Stoklund Olesen 0b94eb19e4 Stay away from str <undef> in ARMLoadStoreOpt. This pass does not understand
<undef> operands, and can cause scavenger failures when it translates
<kill,undef> to <kill>.

llvm-svn: 97046
2010-02-24 18:57:08 +00:00
Johnny Chen 03ac201ad9 Fixed typo of opcodestr, should be "vst1", not "vld1".
llvm-svn: 97044
2010-02-24 18:00:40 +00:00
Chandler Carruth f0485ed9ac Remove an unused variable. Was this intentional?
llvm-svn: 97022
2010-02-24 06:09:03 +00:00
Johnny Chen d5c472d811 Added for disassembly VST1 (multiple single elements) which stores elements to
memory from three or four registers and VST2 (multiple two-element structures)
which stores to memory from two double-spaced registers.

A8.6.391 & A8.6.393

llvm-svn: 97018
2010-02-24 02:57:20 +00:00
Jim Grosbach 2921550485 handle very large call frames when require SPAdj != 0 for Thumb1
llvm-svn: 97013
2010-02-24 02:15:43 +00:00
Jim Grosbach 6ad4bcb0da LowerCall() should always do getCopyFromReg() to reference the stack pointer.
Machine instruction selection is much happier when operands are in virtual
registers.

llvm-svn: 97012
2010-02-24 01:43:03 +00:00
Johnny Chen b14a5c52bc Added for disassembly VLD1 (multiple single elements) which loads memory into
three or four registers and VLD2 (multiple two-element structures) which loads
memory into two double-spaced registers.

A8.6.307 & A8.6.310

llvm-svn: 96980
2010-02-23 20:51:23 +00:00
Jim Grosbach 2f840382e2 Spelling. s/suppor /support /
llvm-svn: 96954
2010-02-23 17:16:27 +00:00
Johnny Chen 21dbd6f449 Added versions of VCGE, VCGT, VCLE, and VCLT NEON instructions which compare to
(immediate #0) for disassembly only.

A8.6.283, A8.6.285, A8.6.287, A8.6.290

llvm-svn: 96856
2010-02-23 01:42:58 +00:00
Johnny Chen 886915e3bb Added VCEQ (immediate #0) NEON instruction for disassembly only.
A8.6.281

llvm-svn: 96838
2010-02-23 00:33:12 +00:00
Jim Grosbach 45fceea0e4 Updated version of r96634 (which was reverted due to failing 176.gcc and
126.gcc nightly tests. These failures uncovered latent bugs that machine DCE
could remove one half of a stack adjust down/up pair, causing PEI to assert.
This update fixes that, and the tests now pass.

llvm-svn: 96822
2010-02-22 23:10:38 +00:00
Jim Grosbach 017a505716 Clean up a bit and fix for when SPAdj != 0
llvm-svn: 96818
2010-02-22 22:54:55 +00:00
Jim Grosbach 15f6ed348f The predicate index isn't fixed, so scan for it to make sure we get the proper
value.

Thumb2 uses the tADJCALLSTACK* instructions, and doesn't need t2 versions, so
remove the FIXME entry.

llvm-svn: 96817
2010-02-22 22:47:46 +00:00
Johnny Chen 5ddd4aca97 Added SEL, SXTB16, SXTAB16, UXTAB16, SMMULR, SMMLAR, SMMLSR, SMUAD, and SMUSD,
for disassembly only.

llvm-svn: 96806
2010-02-22 21:50:40 +00:00
Johnny Chen 9d4a3e2a7c Added a bunch of instructions for disassembly only:
o signed/unsigned add/subtract
o signed/unsigned halving add/subtract
o unsigned sum of absolute difference [and accumulate]
o signed/unsigned saturate
o signed multiply accumulate/subtract [long] dual

llvm-svn: 96795
2010-02-22 18:50:54 +00:00
Johnny Chen a07c9c7c56 Undo r96654. The printing of ARM shift instructions in canonical forms can be
handled in ARMInstPrinter.cpp.

And added PLD/PLDW/PLI (Preload Data/Instruction) for disassembly only.

llvm-svn: 96719
2010-02-21 04:42:01 +00:00
Bob Wilson fbc9d8d424 Revert 96634. It causes assertion failures for 126.gcc and 176.gcc in
the armv6 nightly tests.

llvm-svn: 96691
2010-02-19 18:59:53 +00:00
Johnny Chen 1ca8af9b76 Added entries for ASR, LSL, LSR, ROR, and RRX so that the disassembler prints
out the canonical form (A8.6.98) instead of the pseudo-instruction as provided
via MOVs.

DBG_ARM_DISASM=YES llvm-mc -triple=arm-unknown-unknown --disassemble
0xc0 0x00 0xa0 0xe1
Opcode=29 Name=ASR Format=ARM_FORMAT_LDMISCFRM
 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10  9  8  7  6  5  4  3  2  1  0 
-------------------------------------------------------------------------------------------------
| 1: 1: 1: 0| 0: 0: 0: 1| 1: 0: 1: 0| 0: 0: 0: 0| 0: 0: 0: 0| 0: 0: 0: 0| 1: 1: 0: 0| 0: 0: 0: 0|
-------------------------------------------------------------------------------------------------

	asr	r0, r0, #1

llvm-svn: 96654
2010-02-19 02:12:06 +00:00
Jim Grosbach aa34003f6f Radar 7636153. In the presence of large call frames, it's not sufficient
for ARM to just check if a function has a FP to determine if it's safe
to simplify the stack adjustment pseudo ops prior to eliminating frame
indices. Allow targets to override the default behavior and does so for ARM
and Thumb2.

llvm-svn: 96634
2010-02-19 00:16:24 +00:00
Johnny Chen 688a90e2d7 Added LDRD_PRE/POST & STRD_PRE/POST for disassembly only.
llvm-svn: 96619
2010-02-18 22:31:18 +00:00
Bob Wilson c6c13a3515 Use NEON vmin/vmax instructions for floating-point selects.
Radar 7461718.

llvm-svn: 96572
2010-02-18 06:05:53 +00:00
Johnny Chen 74c904589e Added LDRSBT, LDRHT, LDRSHT for disassembly only. And fixed encoding errors
of AI3ldsbpo, AI3ldhpo, and AI3ldshpo in ARMInstrFormats.td in the process.

llvm-svn: 96565
2010-02-18 03:27:42 +00:00
Johnny Chen f3d79a5025 Added for disassembly only the variants of DMB, DSB, and ISB.
llvm-svn: 96540
2010-02-18 00:19:08 +00:00
Bob Wilson cb2deb2aaf Remove the NEON N2VSInt instruction class: it's only used in one place and
since it has no pattern, there's not much point in distinguishing an "N2VS"
class for intrinsics anyway.

llvm-svn: 96525
2010-02-17 22:42:54 +00:00
Johnny Chen 1d793a5e0e Added CLREX (Clear-Exclusive) for disassembly only.
A8.6.30

llvm-svn: 96523
2010-02-17 22:37:58 +00:00
Bob Wilson 004d280d5e More cleanup for NEON:
* Use "S" abbreviation for scalar single FP registers in class and pattern
names, instead of keeping the "D" (for "double") abbreviation and tacking on
an "s" elsewhere in the name.
* Move the scalar single FP register classes and patterns to be more
consistent with other definitions in the file.
* Rename "VNEGf32d" definition to "VNEGfd" for consistency.
* Deleted the N2VDIntsPat pattern; N2VSPat is good enough.

llvm-svn: 96521
2010-02-17 22:23:11 +00:00
Johnny Chen 5454e0633e Added RFE for disassembly only.
B6.1.8 RFE Return From Exception loads the PC and the CPSR from the word at the
specified address and the following word respectively.

llvm-svn: 96519
2010-02-17 21:39:10 +00:00
Chris Lattner cb80e2527e add a note, from PR5100
llvm-svn: 96490
2010-02-17 18:42:24 +00:00
Johnny Chen 036b2f6542 Added BFI for disassembly only.
A8.6.18  BFI - Bitfield insert (Encoding A1)

llvm-svn: 96462
2010-02-17 06:31:48 +00:00
Bob Wilson 9e89907ed5 Wrap lines to 80 columns and generally try to clean up whitespace and
indentation.  No functional changes.

llvm-svn: 96418
2010-02-17 00:31:29 +00:00
Bob Wilson 37f106e18c Handle tGPR register class in a few more places. This fixes some llvm-gcc
build failures due to my fix for pr6111.

llvm-svn: 96402
2010-02-16 22:01:59 +00:00
Johnny Chen 4c444bf606 Add SMC (Secure Monitor Call) system instruction for disassembly only.
llvm-svn: 96401
2010-02-16 21:59:54 +00:00
Jim Grosbach 3e2cad3b1a 80 column cleanup
llvm-svn: 96393
2010-02-16 21:23:02 +00:00
Jim Grosbach fba7fce5be Remove trailing whitespace
llvm-svn: 96388
2010-02-16 21:07:46 +00:00
Jim Grosbach 2284ddab56 Update Thumb2 to not use CarryDefIsUnused or CarryDefIsUsed predicates, but
to have the predicate on the pattern itself instead. Support for the new
ISel. Remove definitions of CarryDefIsUnused and CarryDefIsUsed since they are
no longer used anywhere.

llvm-svn: 96384
2010-02-16 20:42:29 +00:00
Jim Grosbach 756ab53e60 Remove redundant setting of Defs. CPSR is already marked by the block level set of Defs.
llvm-svn: 96383
2010-02-16 20:35:59 +00:00
Jim Grosbach 0a334d0df9 First step in eliminating the CarryDefIsUnused and CarryDefIsUsed predicates.
They won't work with the new ISel mechanism, as Requires predicates are no
longer allowed to reference the node being selected. Moving the predicate to
the patterns instead solves the problem.

This patch handles ARM mode. Thumb2 will follow.

llvm-svn: 96381
2010-02-16 20:17:57 +00:00
Johnny Chen 46c39d4f1f Added for disassembly the following instructions:
o Store Return State (SRSW, SRS)
o Load/Store Coprocessor (LDC/STC and friends)
o MSR (immediate)

llvm-svn: 96380
2010-02-16 20:04:27 +00:00
Bob Wilson 70aa8d0745 Fix pr6111: Avoid using the LR register for the target address of an indirect
branch in ARM v4 code, since it gets clobbered by the return address before
it is used.  Instead of adding a new register class containing all the GPRs
except LR, just use the existing tGPR class.

llvm-svn: 96360
2010-02-16 17:24:15 +00:00
Bob Wilson a945c64b5a Put repeated empty pattern into the AQI instruction class.
We could almost use a multiclass for the signed/unsigned instructions, but
there are only 6 of them so I guess it's not worth it.

llvm-svn: 96297
2010-02-15 23:43:47 +00:00
Anton Korobeynikov ab663a0bfe Move TLOF implementations to libCodegen to resolve layering violation.
llvm-svn: 96288
2010-02-15 22:37:53 +00:00
Evan Cheng 5e73ff2e3a Split SelectionDAGISel::IsLegalAndProfitableToFold to
IsLegalToFold and IsProfitableToFold. The generic version of the later simply checks whether the folding candidate has a single use.

This allows the target isel routines more flexibility in deciding whether folding makes sense. The specific case we are interested in is folding constant pool loads with multiple uses.

llvm-svn: 96255
2010-02-15 19:41:07 +00:00
David Greene 0d0149f5ac Remove an assumption of default arguments. This is in anticipation of a
change to SelectionDAG build APIs.

llvm-svn: 96230
2010-02-15 16:55:24 +00:00
Johnny Chen c95a814ec3 Try to factorize the specification of saturating add/subtract operations a bit,
as suggested by Bob Wilson.

llvm-svn: 96153
2010-02-14 06:32:20 +00:00
Johnny Chen 52a6ab3ba7 Add SETEND and BXJ instructions for disassembly only.
llvm-svn: 96075
2010-02-13 02:51:09 +00:00
Evan Cheng 3b065cdb64 Teach MachineFrameInfo to track maximum alignment while stack objects are being
created. This ensures it's updated at all time. It means targets which perform
dynamic stack alignment would know whether it is required and whether frame
pointer register cannot be made available register allocation.
This is a fix for rdar://7625239. Sorry, I can't create a reasonably sized test
case.

llvm-svn: 96069
2010-02-13 01:56:41 +00:00
Johnny Chen b0208d2a06 Added a bunch of saturating add/subtract instructions for disassembly only.
llvm-svn: 96063
2010-02-13 01:21:01 +00:00
Johnny Chen 29a9103ee6 Add YIELD, WFE, WFI, and SEV instructions for disassembly only.
Plus add two formats: MiscFrm and ThumbMiscFrm.  Some of the for disassembly
only instructions are changed from Pseudo Format to MiscFrm Format.

llvm-svn: 96032
2010-02-12 22:53:19 +00:00
Evan Cheng 439bda9d3f Load / store multiple instructions cannot load / store sp. Sorry, can't come up with a reasonable test case.
llvm-svn: 96023
2010-02-12 22:17:21 +00:00
Johnny Chen dc2051c802 Add halfword multiply accumulate long SMLALBB/BT/TB/TT for disassembly only.
llvm-svn: 96019
2010-02-12 21:59:23 +00:00
Johnny Chen bdf1b9520c Add SWP (Swap) and SWPB (Swap Byte) for disassembly only.
llvm-svn: 96010
2010-02-12 20:48:24 +00:00
Johnny Chen cf20cbec49 Add CPS, MRS, MRSsys, MSR, MSRsys for disassembly only.
llvm-svn: 95999
2010-02-12 18:55:33 +00:00
Johnny Chen 905a2d7727 Added coprocessor Instructions CDP, CDP2, MCR, MCR2, MRC, MRC2, MCRR, MCRR2,
MRRC, MRRc2.  For disassembly only.

llvm-svn: 95955
2010-02-12 01:44:23 +00:00
Johnny Chen af88c0a84d Added LDRT/LDRBT/STRT/STRBT for disassembly only.
llvm-svn: 95916
2010-02-11 20:31:08 +00:00
Johnny Chen 3964059a16 Forgot to also check in this file for vcvt (floating-point <-> fixed-point, VFP).
Sorry!

llvm-svn: 95892
2010-02-11 18:47:03 +00:00
Johnny Chen 2588efd071 Added VCVT (between floating-point and fixed-point, VFP) for disassembly.
A8.6.297

llvm-svn: 95885
2010-02-11 18:17:16 +00:00
Johnny Chen f40b8e03fb Added BKPT/tBKPT (breakpoint) to the instruction table for disassembly purpose.
llvm-svn: 95884
2010-02-11 18:12:29 +00:00
Johnny Chen 9c13dfb5dd Add pseudo instruction TRAP for disassembly, which is encoded according to A5-21
as the "Permanently UNDEFINED" instruction.

llvm-svn: 95873
2010-02-11 17:14:31 +00:00
Johnny Chen c7e14704d0 Added NOP, DBG, SVC to the instruction table for disassembly purpose.
llvm-svn: 95784
2010-02-10 18:02:25 +00:00
Chris Lattner ff68a42121 print all the newlines at the end of instructions with
OutStreamer.AddBlankLine instead of textually.

llvm-svn: 95734
2010-02-10 00:36:00 +00:00
Johnny Chen 1215c774f2 Add VBIF/VBIT for disassembly only.
A8.6.279

llvm-svn: 95713
2010-02-09 23:05:23 +00:00
Johnny Chen b618f66c5f Added VMRS/VMSR for disassembly only.
A8.6.335 & A8.6.336

llvm-svn: 95703
2010-02-09 22:35:38 +00:00
Chris Lattner b06015aa69 move target-independent opcodes out of TargetInstrInfo
into TargetOpcodes.h.  #include the new TargetOpcodes.h
into MachineInstr.  Add new inline accessors (like isPHI())
to MachineInstr, and start using them throughout the 
codebase.

llvm-svn: 95687
2010-02-09 19:54:29 +00:00
Jim Grosbach f7279bd10f Radar 7417921
tMOVCCi pattern only valid for low registers, as the Thumb1 mov immediate to
register instruction only works with low registers. Allowing high registers
for the instruction resulted in the assembler choosing the wide (32-bit)
encoding for the mov, but LLVM though the instruction was only 16 bits wide,
so offset calculations for constant pools became incorrect, leading to
out of range constant pool entries.

llvm-svn: 95686
2010-02-09 19:51:37 +00:00
Johnny Chen 64e0ae8dd4 Added vcvtb/vcvtt (between half-precision and single-precision, VFP).
For disassembly only.

A8.6.300

llvm-svn: 95669
2010-02-09 17:21:56 +00:00
Chris Lattner 08297ad15d this is done, tested by CodeGen/ARM/iabs.ll
llvm-svn: 95609
2010-02-08 23:48:10 +00:00
Jim Grosbach a570d05228 tighten up eh.setjmp sequence a bit.
llvm-svn: 95603
2010-02-08 23:22:00 +00:00
Johnny Chen 9e60686a83 Add VCVTR (between floating-point and integer, VFP) for disassembly purpose.
The 'R' suffix means the to-integer operations use the rounding mode specified
by the FPSCR, encoded as Inst{7} = 0.

A8.6.295

llvm-svn: 95584
2010-02-08 22:02:41 +00:00
Johnny Chen beb1238a85 Add VCMP (VFP floating-point compare without 'E' bit set) for disassembly purpose.
llvm-svn: 95560
2010-02-08 19:41:48 +00:00
Johnny Chen c7e606f132 Added VMOVRRS/VMOVSRR to ARMInstrVFP.td for disassembly purpose.
A8.6.331 VMOV (between two ARM core registers and two single-precision registers)

llvm-svn: 95548
2010-02-08 17:26:09 +00:00
Bob Wilson 5638c36efd Handle AddrMode6 (for NEON load/stores) in Thumb2's rewriteT2FrameIndex.
Radar 7614112.

llvm-svn: 95456
2010-02-06 00:24:38 +00:00
Johnny Chen a778db9a91 VMOVRRD and VMOVDRR both have Inst{7-6} = 0b00.
llvm-svn: 95397
2010-02-05 18:04:58 +00:00
Chris Lattner 082f484074 make MachineModuleInfoMachO hold non-const MCSymbol*'s instead
of const ones.  non-const ones aren't very useful, because you can't
even, say, emit them.

llvm-svn: 95205
2010-02-03 06:18:30 +00:00
Chris Lattner 6f1f865fba print instructions through the mcstreamer.
llvm-svn: 95181
2010-02-03 01:16:28 +00:00
Chris Lattner 996ec840d0 rejigger the world so that EmitInstruction prints the \n at
the end of the instruction instead of expecting the caller to
do it.  This currently causes the asm-verbose instruction 
comments to be on the next line.

llvm-svn: 95178
2010-02-03 01:09:55 +00:00
Chris Lattner 41ad1905c9 sink handling of target-independent machine instrs (other
than DEBUG_VALUE :(  ) into the target indep AsmPrinter.cpp
file.   This allows elimination of the 
NO_ASM_WRITER_BOILERPLATE hack among other things.

llvm-svn: 95177
2010-02-03 01:00:52 +00:00
Jim Grosbach d0a2f52f8f As of r79039, we still try to eliminate the frame pointer on leaf functions,
even when -disable-fp-elim is specified.

llvm-svn: 95161
2010-02-02 23:56:14 +00:00
Evan Cheng 6f36a083ef Revert 95130.
llvm-svn: 95160
2010-02-02 23:55:14 +00:00
Chris Lattner b0d44c3807 refactor code so that LLVMTargetMachine creates the asmstreamer and
mccontext instead of having AsmPrinter do it.  This allows other 
types of MCStreamer's to be passed in.

llvm-svn: 95155
2010-02-02 23:37:42 +00:00
Chris Lattner f46359642f tidy some targets.
llvm-svn: 95146
2010-02-02 22:13:21 +00:00
Chris Lattner 8d806876c0 detemplatize ARM code emitter.
llvm-svn: 95138
2010-02-02 21:48:51 +00:00
Chris Lattner c83cfb9dfa remove dead code.
llvm-svn: 95134
2010-02-02 21:38:59 +00:00
Chris Lattner 0cd6c2a047 eliminate all the dead addSimpleCodeEmitter implementations.
eliminate random "code emitter" stuff in Alpha, except for
the JIT path.  Next up, remove the template cruft.

llvm-svn: 95131
2010-02-02 21:31:47 +00:00
Evan Cheng c1b0116ff1 Pass callsite return type to TargetLowering::LowerCall and use that to check sibcall eligibility.
llvm-svn: 95130
2010-02-02 21:29:10 +00:00
Johnny Chen 8487d65ea2 Added t2BFI (Bitfield Insert) entry for disassembler, with blank pattern field.
llvm-svn: 95112
2010-02-02 19:31:58 +00:00
Johnny Chen 5b66b31774 MOVi16 should also be marked as a UnaryDP instruction, i.e., it doesn't have a
Rn operand.

llvm-svn: 95025
2010-02-01 23:06:04 +00:00
Johnny Chen b3562f7cf6 For MVNr and MVNs, we need to set Inst{25} = 0 so as not to confuse the decoder.
llvm-svn: 94955
2010-01-31 11:22:28 +00:00
Anton Korobeynikov 25df248382 Fix a gross typo: ARMv6+ may or may not support unaligned memory operations.
Even if they are suported by the core, they can be disabled
(this is just a configuration bit inside some register).

Allow unaligned memops on darwin and conservatively disallow them otherwise.

llvm-svn: 94889
2010-01-30 14:08:12 +00:00
Johnny Chen 34a6afc68d Modified encoding bits specification for VFP instructions. In particular, the D
bit (Inst{22}) and the M bit (Inst{5}) should be left unspecified.  For binary
format instructions, Inst{6} and Inst{4} need to specified for proper decodings.

llvm-svn: 94855
2010-01-29 23:21:10 +00:00
Chris Lattner 73de5fbfc3 Give AsmPrinter the most common expected implementation of
runOnMachineFunction, and switch PPC to use EmitFunctionBody.
The two ppc asmprinters now don't heave to define 
runOnMachineFunction.

llvm-svn: 94722
2010-01-28 01:28:58 +00:00
Chris Lattner fa1f67ea38 switch ARM to EmitFunctionBody().
llvm-svn: 94719
2010-01-28 01:10:34 +00:00
Chris Lattner 94a946cac4 Remove the argument from EmitJumpTableInfo, because it doesn't need it.
Move the X86 implementation of function body emission up to 
AsmPrinter::EmitFunctionBody, which works by calling the virtual
EmitInstruction method.

llvm-svn: 94716
2010-01-28 01:02:27 +00:00
Chris Lattner 2b796241a7 Drop the argument to AsmPrinter::EmitConstantPool and make it virtual.
Overload it in the ARM backend to do nothing, since is does insane
constant pool emission.

llvm-svn: 94708
2010-01-28 00:19:24 +00:00
Chris Lattner 56db8c3008 switch ARM to use EmitFunctionHeader.
llvm-svn: 94703
2010-01-27 23:58:11 +00:00
Chris Lattner feba1e2495 eliminate the ARMFunctionInfo::Align member, using
MachineFunction::Alignment instead.

llvm-svn: 94701
2010-01-27 23:37:36 +00:00
Jeffrey Yasskin 091217be6f Kill ModuleProvider and ghost linkage by inverting the relationship between
Modules and ModuleProviders. Because the "ModuleProvider" simply materializes
GlobalValues now, and doesn't provide modules, it's renamed to
"GVMaterializer". Code that used to need a ModuleProvider to materialize
Functions can now materialize the Functions directly. Functions no longer use a
magic linkage to record that they're materializable; they simply ask the
GVMaterializer.

Because the C ABI must never change, we can't remove LLVMModuleProviderRef or
the functions that refer to it. Instead, because Module now exposes the same
functionality ModuleProvider used to, we store a Module* in any
LLVMModuleProviderRef and translate in the wrapper methods.  The bindings to
other languages still use the ModuleProvider concept.  It would probably be
worth some time to update them to follow the C++ more closely, but I don't
intend to do it.

Fixes http://llvm.org/PR5737 and http://llvm.org/PR5735.

llvm-svn: 94686
2010-01-27 20:34:15 +00:00
Jim Grosbach a3575ca846 Adjust setjmp instruction sequence to not need 32-bit alignment padding
llvm-svn: 94627
2010-01-27 00:07:20 +00:00
Evan Cheng 67a69dd2ed Eliminate target hook IsEligibleForTailCallOptimization.
Target independent isel should always pass along the "tail call" property. Change
target hook LowerCall's parameter "isTailCall" into a refernce. If the target
decides it's impossible to honor the tail call request, it should set isTailCall
to false to make target independent isel happy.

llvm-svn: 94626
2010-01-27 00:07:07 +00:00
Chris Lattner f13e5f7323 constify a method argument.
llvm-svn: 94612
2010-01-26 23:15:09 +00:00
Chris Lattner ff234e09b9 Eliminate SetDirective, and replace it with HasSetDirective.
Default HasSetDirective to true, since most targets have it.

The targets that claim to not have it probably do, or it is
spelled differently. These include Blackfin, Mips, Alpha, and
PIC16.  All of these except pic16 are normal ELF targets, so
they almost certainly have it.

llvm-svn: 94585
2010-01-26 20:40:54 +00:00
Rafael Espindola dcb03f0f6b Emit .comm alignment in bytes but .align in powers of 2 for ARM ELF.
Original patch by Sandeep Patel and updated by me.

llvm-svn: 94582
2010-01-26 20:21:43 +00:00
Chris Lattner 526f560424 don't set to the default value.
llvm-svn: 94580
2010-01-26 20:17:34 +00:00
Chris Lattner d051af7551 add a new MachineBasicBlock::getSymbol method, replacing
the AsmPrinter::GetMBBSymbol.

llvm-svn: 94515
2010-01-26 04:55:51 +00:00
Chris Lattner 170442fa12 don't bother setting the AsmPrinter::MF ivar, now that
AsmPrinter::SetupMachineFunction sets it.  Note that systemz
and msp430 didn't.  Yay for reduced inconsistency! :)

llvm-svn: 94510
2010-01-26 04:38:11 +00:00
Jim Grosbach db67493f76 Minor jump table cleanup.
llvm-svn: 94475
2010-01-25 23:50:13 +00:00
Chris Lattner 8186eecf0f fix quoting problem jim noticed!
llvm-svn: 94472
2010-01-25 23:28:03 +00:00
Chris Lattner a14ac3fd80 prep work to support a future where getJumpTableInfo will return
a null pointer for functions with no jump tables.  No functionality
change.

llvm-svn: 94469
2010-01-25 23:22:00 +00:00
Johnny Chen 5542c1edf9 Make it SP, LR, PC for GPR Register Class instead of LR, SP, PC.
llvm-svn: 94465
2010-01-25 22:54:29 +00:00
Johnny Chen ab2b1a7aeb Implemented ARMInstPrinter::printThumbS4ImmOperand().
llvm-svn: 94457
2010-01-25 22:13:10 +00:00
Johnny Chen 495ac50b4e Fixed the order of GPR RegisterClass regs to be: ..., R10, R11, R12, ...
llvm-svn: 94455
2010-01-25 21:56:35 +00:00
Chris Lattner 68d64aa28b mcize jump table symbol manipulation.
llvm-svn: 94441
2010-01-25 19:51:38 +00:00
Chris Lattner 6330d5330e sink an arm specific method out of asmprinter into the ARMAsmPrinter and
rename it to avoid shadowing.

llvm-svn: 94440
2010-01-25 19:39:52 +00:00
Jim Grosbach fa9ae6739a ARM does accept the .comm directive alignment.
llvm-svn: 94408
2010-01-25 04:59:07 +00:00
Rafael Espindola a1141dd6ab Fix PR6134.
We are not emitting alignments on Darwin for "bar". Not sure what is the
correct way to do it.

llvm-svn: 94400
2010-01-25 02:27:39 +00:00
Chris Lattner 823aed16f9 make -fno-rtti the default unless a directory builds with REQUIRES_RTTI.
llvm-svn: 94378
2010-01-24 20:43:08 +00:00
Chris Lattner b1301f7bce mcize lcomm, simplify .comm, extend both to support 64-bit sizes.
llvm-svn: 94299
2010-01-23 07:47:02 +00:00
Chris Lattner c55ea3fbcc use helpers.
llvm-svn: 94296
2010-01-23 07:00:21 +00:00
Chris Lattner 685508cf49 move the various directive enums out of the MCStreamer class
into a new MCDirectives.h file.

llvm-svn: 94294
2010-01-23 06:39:22 +00:00
Chris Lattner 7ba0661f27 Stop building RTTI information for *most* llvm libraries. Notable
missing ones are libsupport, libsystem and libvmcore.  libvmcore is
currently blocked on bugpoint, which uses EH.  Once it stops using
EH, we can switch it off.

This #if 0's out 3 unit tests, because gtest requires RTTI information.
Suggestions welcome on how to fix this.

llvm-svn: 94164
2010-01-22 06:49:46 +00:00
Chris Lattner 00646cfbd4 create a new MCParser library and move some stuff into it.
llvm-svn: 94129
2010-01-22 01:44:57 +00:00
Jim Grosbach 267430f74d Fix PR5694. The CMN instructions set the flags differently from CMP, so they
cannot be directly interchanged for comparisons against negated values.
Disable the CMN instructions for the time being.

llvm-svn: 94119
2010-01-22 00:08:13 +00:00
Chris Lattner db42c8d23d inline and radically simplify printDataDirective. It will eventually
go completely away.

llvm-svn: 93994
2010-01-20 07:33:29 +00:00
Chris Lattner 2b4364fe03 revert 93934, removing the MCAsmInfo endianness bit. I can't
stomache MCAsmInfo having this, and I found a better solution to
this layering issue.

llvm-svn: 93985
2010-01-20 06:34:14 +00:00
Bob Wilson 6a4491b8c7 Wrap some comments to 80 columns.
llvm-svn: 93940
2010-01-19 22:56:26 +00:00
Chris Lattner 003b5c8472 give MCAsmInfo a 'has little endian' bit. This is unfortunate, but
I really want clients of the streamer to be able to say "emit this
64-bit integer" and have it get broken down right by the streamer.

I may change this in the future, we'll see how it works out.

llvm-svn: 93934
2010-01-19 22:42:28 +00:00
Sean Callanan 936b0d3144 Promoted the getTok() method to MCAsmParser so that
the two token accessor functions are declared consistently.
Modified the clients of MCAsmParser to reflect this change.

llvm-svn: 93916
2010-01-19 21:44:56 +00:00
Jakob Stoklund Olesen bdc17f6840 Remove predicates when changing an add into an unpredicable mov.
Since the mov is executed unconditionally, make sure that the add didn't have
any predicate.

llvm-svn: 93909
2010-01-19 21:08:28 +00:00
Sean Callanan a83fd7d52c Propagated the parser-side Lex function's declaration to
MCAsmParser, and changed the target-specific AsmParsers
to use it.

llvm-svn: 93900
2010-01-19 20:27:46 +00:00
Chris Lattner c35681b298 Generalize mcasmstreamer data emission APIs to take an address space
identifier.  There is no way to work around it.

llvm-svn: 93896
2010-01-19 19:46:13 +00:00
Jim Grosbach 04770f2aa1 For aligned load/store instructions, it's only required to know whether a
function can support dynamic stack realignment. That's a much easier question
to answer at instruction selection stage than whether the function actually
will have dynamic alignment prologue. This allows the removal of the
stack alignment heuristic pass, and improves code quality for cases where
the heuristic would result in dynamic alignment code being generated when
it was not strictly necessary.

llvm-svn: 93885
2010-01-19 18:31:11 +00:00
Chris Lattner 00fa4b67e6 zap the ARM version of PrintGlobalVariable, which I missed.
llvm-svn: 93863
2010-01-19 06:08:15 +00:00
Chris Lattner f8a128a1a8 some cleanups
llvm-svn: 93853
2010-01-19 04:53:18 +00:00
Chris Lattner dccbb28bca add a bool for whether .lcomm takes an alignment instead of basing this on "isdarwin".
llvm-svn: 93852
2010-01-19 04:48:20 +00:00
Chris Lattner 6a160517a0 hoist handling of external globals and special globals up to common code.
This makes a similar code dead in all the other targets, I'll clean it up
in a bit.

This also moves handling of lcomm up before acquisition of a section,
since lcomm never needs a section.

llvm-svn: 93851
2010-01-19 04:39:15 +00:00
Chris Lattner e9d28b19cf move production of .reference directives for static ctor/dtor list on
darwin into common code.

llvm-svn: 93849
2010-01-19 04:34:02 +00:00
Chris Lattner 35474ca4c4 use BSSLocal classifier to identify 'lcomm' data instead of
duplicating the logic (differently) in lots of different targets.

llvm-svn: 93847
2010-01-19 04:21:20 +00:00
Chris Lattner 70f0c33ec8 now that elf weak bss symbols are handled correctly, simplify a bunch of code.
llvm-svn: 93845
2010-01-19 03:13:44 +00:00
Chris Lattner 5b585f8b1a introduce a section kind for common linkage. Use this to slightly
simplify and commonize some of the asmprinter logic for globals.

This also avoids printing the MCSection for .zerofill, which broke
the llvm-gcc build.

llvm-svn: 93843
2010-01-19 02:48:26 +00:00
Chris Lattner aa1f4fd0ed change an accessor to a predicate.
llvm-svn: 93839
2010-01-19 02:13:06 +00:00
Chris Lattner 1d371882b6 Cleanup handling of .zerofill on darwin:
1. TargetLoweringObjectFileMachO should decide if something
   goes in zerofill instead of having every target do it.
2. TargetLoweringObjectFileMachO should assign said symbols to
   the right MCSection, the asmprinters should just emit to the
   right section.
3. Since all zerofill stuff goes through mcstreamer anymore,
   MAI can have a bool "haszerofill" instead of having the textual
   directive to emit.

llvm-svn: 93838
2010-01-19 02:09:44 +00:00
Evan Cheng 6c0fb92c03 Fix r93758. Use isel patterns instead of c++ selection code to select rbit and make sure we pick different instructions for ARM vs. Thumb2.
llvm-svn: 93829
2010-01-19 00:44:15 +00:00
Jim Grosbach e7b52f2e87 Minor cleanup for jump table printing. Need a reference, not a pointer, for
printing via <<. Otherwise we just print the pointer value.

llvm-svn: 93777
2010-01-18 22:01:39 +00:00
Johnny Chen 27f000a9af The most significant encoding bit of GPR:$src or GPR:$dst was over-specified in
the various MOV (register) instructions (16-bit Thumb), including tBRIND (the
indirect branch).  Instead of '1', it should be specified as '?', because GPR
only specifies the register class, which includes both hi-and-lo registers.

llvm-svn: 93759
2010-01-18 20:15:56 +00:00
Jim Grosbach 8546ec9c14 Patch by David Conrad:
"On ARMv6T2 this turns cttz into rbit, clz instead of the 4 instruction
 sequence it is now."

llvm-svn: 93758
2010-01-18 19:58:49 +00:00
Bob Wilson 7430a98619 Emit spaces after commas in Neon register lists. This is more consistent
with the rest of the assembly output, is easier to read, and matches the
expected output for gcc's Neon tests.

llvm-svn: 93703
2010-01-18 01:24:43 +00:00
Chris Lattner c8f7717808 remove the MAI argument to MCExpr::print and switch overthing to use << when printing them.
llvm-svn: 93699
2010-01-18 00:37:40 +00:00
Chris Lattner 8b5d55ed06 now that MCSymbol::print doesn't use it's MAI argument, we can
remove it and change all the code that prints MCSymbols to use 
<< instead, which is much simpler and cleaner.

llvm-svn: 93695
2010-01-17 21:43:43 +00:00
Bob Wilson 9349437c65 The Neon "vtst" instruction takes a suffix that is the element size alone --
adding an "i" to the suffix, indicating that the elements are integers, is
accepted but not part of the standard syntax.  This helps us pass a few more
of the Neon tests from gcc.

llvm-svn: 93677
2010-01-17 06:35:17 +00:00
Bob Wilson 55d2ebda31 Fix an off-by-one error that caused the chain operand to be dropped from Neon
vector load-lane and store-lane instructions.

llvm-svn: 93673
2010-01-17 05:58:23 +00:00
Chris Lattner 555ceabe64 rename GetPrivateGlobalValueSymbolStub -> GetSymbolWithGlobalValueBase,
and add an explicit ForcePrivate argument.

Switch FunctionEHFrameInfo to be MCSymbol based instead of string based.

llvm-svn: 93646
2010-01-16 18:37:32 +00:00
Chris Lattner 94d91a5b30 eliminate uses of mangler and simplify code.
llvm-svn: 93615
2010-01-16 01:40:07 +00:00
Chris Lattner 719e908e7c MCize a bunch more stuff, eliminating a lot of uses of the mangler
and CurrentFnName.

llvm-svn: 93594
2010-01-16 00:21:18 +00:00
Chris Lattner 7fec180909 add a version of AsmPrinter::printVisibility that takes an MCSymbol.
llvm-svn: 93587
2010-01-15 23:38:51 +00:00
Chris Lattner 6394a6e285 use MCSymbol instead of getMangledName() in all cases except one.
llvm-svn: 93582
2010-01-15 23:31:55 +00:00
Chris Lattner 45400336ab mc'ize a bunch of symbol stuff, eliminating std::strings.
llvm-svn: 93578
2010-01-15 23:26:49 +00:00
Chris Lattner 91687f6e28 add a AsmPrinter::GetGlobalValueSymbol and GetExternalSymbolSymbol
helper method, use it to simplify some code.

llvm-svn: 93575
2010-01-15 23:18:17 +00:00
Jim Grosbach d1a8a7819c Update Thumb1 storeRegToStackSlot() and loadRegFromStackSlot() to properly
handle physical registers R0-R7 when described as having a non-tGPR register
class.

llvm-svn: 93564
2010-01-15 22:21:03 +00:00
Jim Grosbach 029fbd984b Name change for consistency. No functional change.
llvm-svn: 93480
2010-01-15 00:22:18 +00:00
Jim Grosbach d0860d6e02 EmitAtomicCmpSwap() custome inserter needs to delete the MI passed in. EmitAtomicBinary() already does this.
llvm-svn: 93479
2010-01-15 00:18:34 +00:00
Johnny Chen 0f45f4f849 Added 16-bit Thumb Load/Store immediate instructions with encoding bits so that
the disassembler can properly decode Load/Store register/immediate instructions.

llvm-svn: 93471
2010-01-14 22:42:17 +00:00
Chris Lattner f29c0b6880 Split the TargetAsmParser "ParseInstruction" interface in half:
the new ParseInstruction method just parses and returns a list of
target operands.  A new MatchInstruction interface is used to
turn the operand list into an MCInst.

This requires new/deleting all the operands, but it also gives 
targets the ability to use polymorphic operands if they want to. 

llvm-svn: 93469
2010-01-14 22:21:20 +00:00
Chris Lattner 77fd677111 prune #includes in TargetAsmParser.h
Pass in SMLoc of instr opcode into ParseInstruction.
Make AsmToken be a class, not a struct.

llvm-svn: 93457
2010-01-14 21:32:45 +00:00
Chris Lattner ecc8eece7d introduce MCParsedAsmOperand
llvm-svn: 93455
2010-01-14 21:21:40 +00:00
Jakob Stoklund Olesen 0ca14e4498 ARM "l" constraint for inline asm means R0-R7, also for Thumb2.
This is consistent with llvm-gcc's arm/constraints.md.

Certain instructions (e.g. CBZ, CBNZ) require a low register, even in Thumb2
mode.

llvm-svn: 93436
2010-01-14 18:19:56 +00:00
Jakob Stoklund Olesen bff090648b Don't fold insufficiently aligned ldr/str into ldm/stm instructions.
An unaligned ldr causes a trap, and is then emulated by the kernel with
awesome performance. The darwin kernel does not emulate unaligned ldm/stm
Thumb2 instructions, so don't generate them.

This fixes the miscompilation of Multisource/Applications/JM/lencod for Thumb2.

Generating unaligned ldr/str pairs from a 16-bit aligned memcpy is probably
also a bad idea, but that is beyond the scope of this patch.

llvm-svn: 93393
2010-01-14 00:54:10 +00:00
Johnny Chen b34888b6d0 Fixed a couple of places for Thumb MOV where encoding bits are underspecified.
llvm-svn: 93349
2010-01-13 21:00:26 +00:00
Jakob Stoklund Olesen fcf91ee403 Fix pasto
llvm-svn: 93342
2010-01-13 19:54:39 +00:00
Chris Lattner ede8ad45bc upgrade and MC'ize a few uses of makeNameProper.
llvm-svn: 93310
2010-01-13 08:08:33 +00:00
Chris Lattner 209aecad0c change Mangler::makeNameProper to return its result in a SmallVector
instead of returning it in an std::string.  Based on this change:

1. Change TargetLoweringObjectFileCOFF::getCOFFSection to take a StringRef
2. Change a bunch of targets to call makeNameProper with a smallstring,
   making several of them *much* more efficient.
3. Rewrite Mangler::makeNameProper to not build names and then prepend
   prefixes, not use temporary std::strings, and to avoid other crimes.

llvm-svn: 93298
2010-01-13 06:38:18 +00:00
Jakob Stoklund Olesen a94837dc24 Remove the JustSP single-register regclass.
It was only being used by instructions with the t_addrmode_sp addressing mode,
and that is pattern matched in a way that guarantees SP is used. There is
never any register allocation done from this class.

llvm-svn: 93280
2010-01-13 00:43:06 +00:00
Johnny Chen ab6e6819b2 Minor change, change the order of two "let Inst{...}" stmts within multiclass
T2I_bin_ii12rs definition.

llvm-svn: 93006
2010-01-08 17:41:33 +00:00
Jim Grosbach b907a467e2 80 column violations
llvm-svn: 92876
2010-01-06 23:54:42 +00:00
Jakob Stoklund Olesen 29a64c9575 Add Target hook to duplicate machine instructions.
Some instructions refer to unique labels, and so cannot be trivially cloned
with CloneMachineInstr.

llvm-svn: 92873
2010-01-06 23:47:07 +00:00
Jim Grosbach 5fd6feb883 Addressing mode 6 (load/store) instructions can't encode an immediate offset
for stack references.

llvm-svn: 92871
2010-01-06 23:45:18 +00:00
Johnny Chen 567945636f Undo r92785, it caused test failure.
llvm-svn: 92796
2010-01-05 22:37:28 +00:00
Johnny Chen a9f39bdbb6 Add Rt2 to the asm format string for 32-bit Thumb load/store register dual
instructions.  Thumb does not have the restriction that t2 = t+1.

llvm-svn: 92785
2010-01-05 21:51:46 +00:00
Dan Gohman ea6f91ff64 Change SelectCode's argument from SDValue to SDNode *, to make it more
clear what information these functions are actually using.

This is also a micro-optimization, as passing a SDNode * around is
simpler than passing a { SDNode *, int } by value or reference.

llvm-svn: 92564
2010-01-05 01:24:18 +00:00
Benjamin Kramer 8adc1e2263 Add missing include (for inline PATypeHolder::get).
llvm-svn: 92222
2009-12-28 12:27:56 +00:00
Bill Wendling a91b8207cc Remove dead variable.
llvm-svn: 92193
2009-12-28 01:57:39 +00:00
Bill Wendling b8d960d615 Add an "ATTRIBUTE_UNUSED" macro (and use it). It's for variables which are
mainly used in debugging and/or assert situations. It should make the compiler
and the static analyzer stop nagging us about them.

llvm-svn: 92181
2009-12-28 01:20:29 +00:00
Jakob Stoklund Olesen 398932a619 Move kill flags when the same register occurs more than once in a sequence.
llvm-svn: 92058
2009-12-23 21:34:03 +00:00