Igor Breger
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617be6e475
|
[GlobalISel][X86] G_LOAD/G_STORE vec256/512 support
Summary: mark G_LOAD/G_STORE vec256/512 legal for AVX/AVX512. Implement instruction selection.
Reviewers: zvi, guyblank
Reviewed By: zvi
Subscribers: rovka, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D33268
llvm-svn: 303617
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2017-05-23 08:23:51 +00:00 |
Igor Breger
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605b965ae5
|
[GlobalISel][X86] G_MUL legalizer/selector support.
Summary:
G_MUL legalizer/selector/regbank support.
Use only Tablegen-erated instruction selection.
This patch dealing with legal operations only.
Reviewers: zvi, guyblank
Reviewed By: guyblank
Subscribers: krytarowski, rovka, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D32698
llvm-svn: 302410
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2017-05-08 09:03:37 +00:00 |
Igor Breger
|
531a203a06
|
[GlobalISel][X86] support G_FRAME_INDEX instruction selection.
Summary:
Support G_FRAME_INDEX instruction selection.
Reviewers: zvi, rovka, ab, qcolombet
Reviewed By: ab
Subscribers: llvm-commits, dberris, kristof.beyls, eladcohen, guyblank
Differential Revision: https://reviews.llvm.org/D30980
llvm-svn: 298800
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2017-03-26 08:11:12 +00:00 |
Igor Breger
|
321cf3c650
|
[GlobalISel][X86] Support float/double and vector types.
Summary: [GlobalISel][X86] Add support for f32/f64 and vector types in RegisterBank and InstructionSelector.
Reviewers: delena, zvi
Reviewed By: zvi
Subscribers: dberris, rovka, llvm-commits, kristof.beyls
Differential Revision: https://reviews.llvm.org/D30533
llvm-svn: 296856
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2017-03-03 08:06:46 +00:00 |
Igor Breger
|
b4442f34cd
|
[X86][GlobalISel] Add general-purpose Register Bank
Summary:
[X86][GlobalISel] Add general-purpose Register Bank.
Add trivial handling of G_ADD legalization .
Add Regestry Bank selection for COPY and G_ADD instructions
Reviewers: rovka, zvi, ab, t.p.northover, qcolombet
Reviewed By: qcolombet
Subscribers: qcolombet, mgorny, dberris, kristof.beyls, llvm-commits
Differential Revision: https://reviews.llvm.org/D29771
llvm-svn: 294723
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2017-02-10 07:05:56 +00:00 |