Commit Graph

577 Commits

Author SHA1 Message Date
Tim Northover d157e19562 ARM: use ABI-specified alignment for byval parameters.
When passing a type with large alignment byval, we were specifying the type's
alignment rather than the alignment that the backend is actually capable of
producing (ABIAlign).

This would be OK (if odd) assuming the backend dealt with it prooperly,
unfortunately it doesn't and trying to pass types with "byval align 16" can
cause it to set fp incorrectly and trash the stack during the prologue. I'll be
fixing that in a separate patch, but Clang should still be emitting IR that's
as close to its intent as possible.

rdar://20059039

llvm-svn: 231706
2015-03-09 21:40:42 +00:00
Reid Kleckner 533bd17268 Fix test/CodeGen/builtins.c for platforms that don't lower sjlj
Opt in Win64 to supporting sjlj lowering. We have the backend lowering,
so I think this was just an oversight because WinX86_64TargetCodeGenInfo
doesn't inherit from X86_64TargetCodeGenInfo.

llvm-svn: 231280
2015-03-04 19:24:16 +00:00
Benjamin Kramer 83b1bf3a27 CodeGen: Fix passing of classes with only one AVX vector member in AVX registers
isSingleElementStruct was a bit too tight in its definition of struct
so we got a mismatch between classify() and the actual code generation.
To make matters worse the code in GetByteVectorType still defaulted to
<2 x double> if it encountered a type it didn't know, making this a
silent miscompilation (PR22753).

Completely remove the "preferred type" stuff from GetByteVectorType and
make it fail an assertion if someone tries to use it with a type not
suitable for a vector register.

llvm-svn: 230971
2015-03-02 16:09:24 +00:00
Benjamin Kramer 39ccabe500 Replace loop with equivalent ArrayRef function. NFC.
llvm-svn: 230949
2015-03-02 11:57:06 +00:00
Peter Collingbourne 69b004d987 UBSan: Use the correct function prologue for x32.
llvm-svn: 230571
2015-02-25 23:18:42 +00:00
Tim Northover bc784d1caa ARM: Simplify PCS handling.
The backend should now be able to handle all AAPCS rules based on argument
type, which means Clang no longer has to duplicate the register-counting logic
and the CodeGen can be significantly simplified.

llvm-svn: 230349
2015-02-24 17:22:40 +00:00
Michael Kuperstein 4f818708a8 [WinX86_64 ABI] Treat C99 _Complex as a struct
MSVC does not support C99 _Complex.
ICC, however, does support it on windows x86_64, and treats it, for purposes of parameter passing, as equivalent to a struct containing two fields (for the real and imaginary part). 

Differential Revision: http://reviews.llvm.org/D7825

llvm-svn: 230315
2015-02-24 09:35:58 +00:00
Joerg Sonnenberger 096feeb741 Only lower __builtin_setjmp / __builtin_longjmp to
llvm.eh.sjlj.setjmp / llvm.eh.sjlj.longjmp, if the backend is known to
support them outside the Exception Handling context. The default
handling in LLVM codegen doesn't work and will create incorrect code.
The ARM backend on the other hand will assert if the intrinsics are
used.

llvm-svn: 230255
2015-02-23 20:23:47 +00:00
Sanjay Patel eb2af4e8b1 x86-64 ABI: unwrap single element structs / arrays of 256-bit vectors to pass and return in registers
This is a patch for PR22563 ( http://llvm.org/bugs/show_bug.cgi?id=22563 ).

We were not correctly unwrapping a single 256-bit AVX vector that was defined as an array of 1 inside a struct.

We would generate a <4 x float> param/return value instead of <8 x float> and lose half of the vector.

Differential Revision: http://reviews.llvm.org/D7614

llvm-svn: 229408
2015-02-16 17:26:51 +00:00
Michael Kuperstein f0e4ccffc5 Fix quoting of #pragma comment for MS compat, clang part.
For #pragma comment(linker, ...) MSVC expects the comment string to be quoted, but for #pragma comment(lib, ...) the compiler itself quotes the library name.
Since this distinction disappears by the time the directive reaches the backend, move quoting for the "lib" version to the frontend.

Differential Revision: http://reviews.llvm.org/D7653

llvm-svn: 229376
2015-02-16 11:57:43 +00:00
Saleem Abdulrasool 71d1dd1e0c CodeGen: create a WindowsARMTargetCodeGenInfo
Create a new TargetCodeGenInfo for Windows on ARM to permit annotating the
functions with stack-probe-size (for /Gs and -mstack-probe-support) for
generating the stack probe necessary for Windows targets.  This will be used by
the backend when lowering the frame to generate the stack probe appropriately.

llvm-svn: 227641
2015-01-30 23:29:19 +00:00
Derek Schuff 71658bd15e Remove NaClX86_64TargetCodeGenInfo and NaClARMTargetCodeGenInfo
Summary:
They just existed before to use NaCl's custom ABIInfos; now that those are gone,
the custom TargetCodeGenInfos are no longer needed either.

Test Plan: don't break the existing tests

Reviewers: jvoung

Subscribers: jfb, cfe-commits

Differential Revision: http://reviews.llvm.org/D7234

llvm-svn: 227406
2015-01-29 00:47:04 +00:00
Derek Schuff 3970a7ec9b Remove support for pnaclcall attribute
Summary:
It was used for interoperability with PNaCl's calling conventions, but
it's no longer needed.

Also Remove NaCl*ABIInfo which just existed to delegate to either the portable
or native ABIInfo, and remove checkCallingConvention which was now a no-op
override.

Reviewers: jvoung

Subscribers: jfb, llvm-commits

Differential Revision: http://reviews.llvm.org/D7206

llvm-svn: 227362
2015-01-28 20:24:52 +00:00
Alex Rosenberg 12207fab78 Begin to teach clang about the PS4.
llvm-svn: 227194
2015-01-27 14:47:44 +00:00
Hans Wennborg 77dc236605 Implement command line options for stack probe space
This code adds the -mstack-probe-size command line option and implements the /Gs
compiler switch for clang-cl.

This should fix http://llvm.org/bugs/show_bug.cgi?id=21896

Patch by Andrew H!

Differential Revision: http://reviews.llvm.org/D6685

llvm-svn: 226601
2015-01-20 19:45:50 +00:00
Daniel Sanders 998c910262 [mips] Handle transparent unions correctly.
Summary:
This fixes MultiSource/Applications/lemon on big-endian N32 by correcting the
handling of the argument to wait(). glibc defines it as a transparent union of
void* and int*. Such unions are passed according to the rules of the first
member so the argument must be passed as if it were a void* (sign extended from
i32 to i64) and not as a union (shifted to the upper bits of an i64).

wait() already behaves correctly on big-endian O32 and N64 since the union is
already the same size as an argument slot.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D6963

llvm-svn: 225981
2015-01-14 12:00:12 +00:00
Chandler Carruth 0d9593ddec [cleanup] Re-sort *all* #include lines with llvm/utils/sort_includes.py
Sorry for the noise, I managed to miss a bunch of recent regressions of
include orderings here. This should actually sort all the includes for
Clang. Again, no functionality changed, this is just a mechanical
cleanup that I try to run periodically to keep the #include lines as
regular as possible across the project.

llvm-svn: 225979
2015-01-14 11:29:14 +00:00
Daniel Sanders cdcb580d4e [mips] Fix va_arg() for pointer types on big-endian N32.
Summary:
The Mips ABI's treat pointers in the same way as integers. They are
sign-extended to 32-bit for O32, and 64-bit for N32/N64. This doesn't matter
for O32 and N64 where pointers are already the correct width but it does matter
for big-endian N32, where pointers are 32-bit and need promoting.

The caller side is already passing pointers correctly. This patch corrects the
callee.

Reviewers: vmedic, atanasyan

Reviewed By: atanasyan

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D6812

llvm-svn: 225782
2015-01-13 10:47:00 +00:00
Tom Stellard d8e38a3206 R600: Handle amdgcn triple
For now there is no difference between amdgcn and r600.

llvm-svn: 225294
2015-01-06 20:34:47 +00:00
Peter Collingbourne f770683f14 Implement the __builtin_call_with_static_chain GNU extension.
The extension has the following syntax:

  __builtin_call_with_static_chain(Call, Chain)
  where Call must be a function call expression and Chain must be of pointer type

This extension performs a function call Call with a static chain pointer
Chain passed to the callee in a designated register. This is useful for
calling foreign language functions whose ABI uses static chain pointers
(e.g. to implement closures).

Differential Revision: http://reviews.llvm.org/D6332

llvm-svn: 224167
2014-12-12 23:41:25 +00:00
Duncan P. N. Exon Smith fb49491477 IR: Update clang for Metadata/Value split in r223802
Match LLVM API changes from r223802.

llvm-svn: 223803
2014-12-09 18:39:32 +00:00
Matt Arsenault 43fae6c855 Add attributes for AMDGPU register limits.
This is a performance hint that can be applied to kernels
to attempt to limit the number of used registers.

llvm-svn: 223384
2014-12-04 20:38:18 +00:00
Anton Korobeynikov d90dd7977e Fix invalid calling convention used for libcalls on ARM.
ARM ABI specifies that all the libcalls use soft FP ABI 
(even hard FP binaries). These days clang emits _mulsc3 / _muldc3
calls with default (C) calling convention which would be translated
into AAPCS_VFP LLVM calling and thus the result of complex
multiplication will be bogus.

Introduce a way for a target to specify explicitly calling
convention for libcalls. Right now this is temporary correctness
fix. Ultimately, we'll end with intrinsic for complex 
multiplication and all calling convention decisions for libcalls
will be put into backend.

llvm-svn: 223123
2014-12-02 16:04:58 +00:00
Reid Kleckner ee7cf84c8f Use nullptr to silence -Wsentinel when self-hosting on Windows
Richard rejected my Sema change to interpret an integer literal zero in
a varargs context as a null pointer, so -Wsentinel sees an integer
literal zero and fires off a warning. Only CodeGen currently knows that
it promotes integer literal zeroes in this context to pointer size on
Windows.  I didn't want to teach -Wsentinel about that compatibility
hack. Therefore, I'm migrating to C++11 nullptr.

llvm-svn: 223079
2014-12-01 22:02:27 +00:00
Tim Northover b047bfae32 AArch64: simplify PCS mapping.
Now that LLVM can count the registers needed to implement AAPCS rules, we don't
need to duplicate that logic here. This means we can drop the explicit padding
and also use more natural types in many cases (e.g. "struct { float arr[3]; }"
used to end up as "[2 x double]" to avoid holes on the stack.

The one wrinkle is that AAPCS va_arg was also using the register counting
machinery. But the local replacement isn't too bad.

llvm-svn: 222904
2014-11-27 21:02:49 +00:00
Reid Kleckner 2918fefd1c Remove unnecessary environment switch
All supported environments on x86 Windows return structs in EAX:EDX.
This removes code added in r204978 that had to get updated in r222680.
We should now have the same behavior we had before r204978.

llvm-svn: 222697
2014-11-24 22:05:42 +00:00
Saleem Abdulrasool aca550fdb5 CodeGen: make i686-windows-itanium more similar to msvc
The itanium environment follows the system calling convention for structures.
Pass small aggregates via registers.

llvm-svn: 222680
2014-11-24 20:14:29 +00:00
Saleem Abdulrasool ec5c624550 CodeGen: tweak struct ABI handling
Cygwin and MinGW fail to conform to the underlying system's structure passing
ABI.  Make the check more precise to ensure that we correctly generate code for
the itanium environment.

llvm-svn: 222626
2014-11-23 02:16:24 +00:00
Daniel Sanders 59229dcb29 Allow EmitVAArg() to promote types and use this to fix some N32/N64 vararg issues for Mips.
Summary:
With this patch, passing a va_list to another function and reading 10 int's from
it works correctly on a big-endian target.

Based on a pair of patches by David Chisnall, one of which I've reworked
for the current trunk.

Reviewers: theraven, atanasyan

Reviewed By: theraven, atanasyan

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D6248

llvm-svn: 222339
2014-11-19 10:01:35 +00:00
Reid Kleckner b1be683074 Fix IRGen for passing transparent unions
We have had a test for this for a long time with a FIXME saying what we
should be doing. This just does it.

Fixes PR21573.

llvm-svn: 222074
2014-11-15 01:41:41 +00:00
David Blaikie 1cbb971c2d Remove some redundant virtual specifiers on overriden functions.
llvm-svn: 222024
2014-11-14 19:09:44 +00:00
Tim Northover 5a1558ec31 ARM ABI: simplify decisions on whether args can be expanded.
Homogeneous aggregates on AAPCS_VFP ARM need to be passed *without* being
flattened (e.g. [2 x float] rather than "float, float") for various weird ABI
reasons. However, this isn't the case for anything else; further, we know at
the ABIArgInfo::getDirect callsites whether this flattening is allowed.

So, we can get more unified ARM code, with a simpler Clang, by just using that
knowledge directly.

llvm-svn: 221559
2014-11-07 22:30:50 +00:00
Roman Divacky 8a12d84264 Implement vaarg lowering for ppc32. Lowering of scalars and aggregates
is supported. Complex numbers are not.

llvm-svn: 221170
2014-11-03 18:32:54 +00:00
NAKAMURA Takumi 8c89496d47 clang/lib/CodeGen/TargetInfo.cpp: Fix a couple of warnings. [-Winconsistent-missing-override]
llvm-svn: 221039
2014-11-01 01:32:27 +00:00
Reid Kleckner 80944df6f4 Implement IRGen for the x86 vectorcall convention
The most complex aspect of the convention is the handling of homogeneous
vector and floating point aggregates.  Reuse the homogeneous aggregate
classification code that we use on PPC64 and ARM for this.

This convention also has a C mangling, and we apparently implement that
in both Clang and LLVM.

Reviewed By: majnemer

Differential Revision: http://reviews.llvm.org/D6063

llvm-svn: 221006
2014-10-31 22:00:51 +00:00
Reid Kleckner e9f6a717dd Fix ARM HVA classification of classes with non-virtual bases
Reuse the PPC64 HVA detection algorithm for ARM and AArch64. This is a
nice code deduplication, since they are roughly identical. A few virtual
method extension points are needed to understand how big an HVA can be
and what element types it can have for a given architecture.

Also make the record expansion code work in the presence of non-virtual
bases.

Reviewed By: uweigand, asl

Differential Revision: http://reviews.llvm.org/D6045

llvm-svn: 220972
2014-10-31 17:10:41 +00:00
Eli Bendersky 95338a09c0 Pass aggregates on the stack without splitting in NVPTX.
Following the NVVM IR specifications, arguments of aggregate type should be
passed on the stack without splitting (byval).

http://reviews.llvm.org/D6020

Patch by Jacques Pienaar.

llvm-svn: 220854
2014-10-29 13:43:21 +00:00
Ulrich Weigand a094f0428b [PowerPC ABI] Bug 21398 - Consider C++ base classes in HA classification
As discussed in bug 21398, PowerPC ABI code needs to consider C++ base
classes when classifying a class as homogeneous aggregate (or not) for
ABI purposes.

llvm-svn: 220852
2014-10-29 13:23:20 +00:00
Daniel Sanders aa1b35590f [mips] Mark aggregate arguments passed in registers with the inreg attribute
Summary:
This allows us to easily identify them in the backend which in turn allows us
to handle them correctly for big-endian targets (where they must be shifted
into the upper bits of the register).

Depends on D5961

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: cfe-commits, theraven

Differential Revision: http://reviews.llvm.org/D5962

llvm-svn: 220566
2014-10-24 15:30:16 +00:00
Daniel Sanders 5b445b3844 [mips] Promote all integral/enumeration types to the GPR width
Summary:
Ensure all integral/enumeration types are appropriately annotated with
signext/zeroext. In particular, i32 now has these attributes when using the
N32/N64 ABI. This paves the way for accurately representing the way the
N32/N64 ABI's promotes integer arguments to i64.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: cfe-commits, theraven

Differential Revision: http://reviews.llvm.org/D5961

llvm-svn: 220563
2014-10-24 14:42:42 +00:00
David Majnemer ed68407c46 CodeGen: Update for LLVM API change
Callers of DataLayout::RoundUpAlignment should switch to
RoundUpToAlignment.

llvm-svn: 220188
2014-10-20 06:13:36 +00:00
Hal Finkel 92e31a5ead Add getOpenMPSimdDefaultAlignment for PowerPC
When the aligned clause of an OpenMP simd pragma is not provided with an
explicit alignment, a target-dependent default must be used. This adds such a
default of PPC targets.

This will become slightly more complicated when BG/Q support is added (because
then it will depend on the type). For now, 16 is a correct value for all
systems, and covers Altivec and VSX vectors.

llvm-svn: 218994
2014-10-03 17:45:20 +00:00
Jan Wen Voung 01c21e8f45 [x32/NaCl] Check if method pointers straddle an eightbyte to classify Hi
Summary:
Currently, with struct my_struct { int x; method_ptr y; };
a call to foo(my_struct s) may end up dropping the last 4 bytes
of the method pointer for x86_64 NaCl and x32.

When checking Has64BitPointers, also check if the method pointer
straddles an eightbyte boundary and classify Hi as well as Lo if needed.

Test Plan: test/CodeGenCXX/x86_64-arguments-nacl-x32.cpp

Reviewers: dschuff, pavel.v.chupin

Subscribers: jfb

Differential Revision: http://reviews.llvm.org/D5555

llvm-svn: 218889
2014-10-02 16:56:57 +00:00
Alexander Musman 09184fedc0 [OPENMP] Codegen of the ‘aligned’ clause for the ‘omp simd’ directive.
Differential Revision: http://reviews.llvm.org/D5499

llvm-svn: 218660
2014-09-30 05:29:28 +00:00
Alexey Samsonov 34625dda07 Introduce CGFunctionInfo::getNumRequiredArgs(). NFC.
Save the callers from necessity to special-case on variadic functions.

llvm-svn: 218625
2014-09-29 21:21:48 +00:00
Reid Kleckner 739aa12b79 Revert "Don't use comdats for initializers on platforms that don't support it"
On further investigation, COMDATs should work with .ctors, and the issue
I was hitting probably reproduces with .init_array.

This reverts commit r218287.

llvm-svn: 218313
2014-09-23 16:20:01 +00:00
Reid Kleckner 6c03130542 Don't use comdats for initializers on platforms that don't support it
In particular, pre-.init_array ELF uses the .ctors section mechanism.
MinGW COFF also uses .ctors, now that I think about it. Therefore,
restrict this optimization to the two platforms that are currently known
to work: ELF with .init_array and COFF with .CRT$XCU.

llvm-svn: 218287
2014-09-23 00:00:14 +00:00
Daniel Sanders 8d36a61f52 [mips] Correct alignment of vectors passed in varargs for the O32 ABI.
Summary:
Vectors are normally 16-byte aligned, however the O32 ABI enforces a
maximum alignment of 8-bytes since the base of the stack is 8-byte aligned.
Previously, this was enforced on the caller side, but not on the callee side.

This fixes the output of OpenCL's printf when given vectors.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: llvm-commits, pekka.jaaskelainen

Differential Revision: http://reviews.llvm.org/D5433

llvm-svn: 218248
2014-09-22 13:27:06 +00:00
Rafael Espindola 9f834735cd Don't use the third field of llvm.global_ctors for MachO.
The field is defined as:

If the third field is present, non-null, and points to a global variable or function, the initializer function will only run if the associated data from the current module is not discarded.

And without COMDATs we can't implement that.

llvm-svn: 218097
2014-09-19 01:54:22 +00:00
Rafael Espindola 5b6fa2f85a Revert "Put more stuff in the comdat used for variables with static init."
This reverts commit r218089.
It looks like it was causing issues on COFF.

llvm-svn: 218094
2014-09-19 01:28:16 +00:00
Rafael Espindola c0ce9eca0b Put more stuff in the comdat used for variables with static init.
Clang can already handle

-------------------------------------------
struct S {
  static const int x;
};
template<typename T> struct U {
  static const int k;
};
template<typename T> const int U<T>::k = T::x;

const int S::x = 42;
extern const int *f();
const int *g() { return &U<S>::k; }
int main() {
  return *f() + U<S>::k;
}

const int *f() { return &U<S>::k; }
-------------------------------------------

since r217264 which puts the .inint_array section in the same COMDAT
as the variable.

This patch allows the linker to more easily delete some dead code and data by
putting the guard variable and init function in the same COMDAT.

llvm-svn: 218089
2014-09-18 23:41:44 +00:00
Reid Kleckner 9b3e3dfc54 MS inline asm: Allow __asm blocks to set a return value
If control falls off the end of a function after an __asm block, MSVC
assumes that the inline assembly filled the EAX and possibly EDX
registers with an appropriate return value. This functionality is used
in inline functions returning 64-bit integers in system headers, so we
need some amount of compatibility.

This is implemented in Clang by adding extra output constraints to every
inline asm block, and storing the resulting output registers into the
return value slot. If we see an asm block somewhere in the function
body, we emit a normal epilogue instead of marking the end of the
function with a return type unreachable.

Normal returns in functions not using this functionality will overwrite
the return value slot, and in most cases LLVM should be able to
eliminate the dead stores.

Fixes PR17201.

Reviewed By: majnemer

Differential Revision: http://reviews.llvm.org/D5177

llvm-svn: 217187
2014-09-04 20:04:38 +00:00
Daniel Sanders 00a56ffb8d Fix double full-stop that was accidentally added in r217160.
llvm-svn: 217161
2014-09-04 15:07:43 +00:00
Daniel Sanders e5018b6c00 [mips] Mark aggregates returned in registers with the 'inreg' attribute.
Summary:
This allows us to easily find them in the backend after the aggregates have
been lowered to other types. This is important on big-endian targets using
the N32/N64 ABI's since these ABI's must shift small structures into the
upper bits of the register.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D5005

llvm-svn: 217160
2014-09-04 15:05:39 +00:00
Daniel Sanders ed39f58390 [mips] Zero-sized structs cannot be ignored in MipsABIInfo::classifyReturnType() for O32
Summary:
They are returned indirectly which causes the other arguments to move to
the next argument slot.

With this, utils/ABITest does not discover any failing cases in the first
500 attempts on big/little endian for O32. Previously some of these failed.
Also tested N32/N64 little endian (big endian has other known issues) with
no issues.

Reviewers: atanasyan

Reviewed By: atanasyan

Subscribers: atanasyan, cfe-commits

Differential Revision: http://reviews.llvm.org/D4811

llvm-svn: 217147
2014-09-04 13:28:14 +00:00
Oliver Stannard ed8ecc8429 Allow __fp16 as a function arg or return type for AArch64
ACLE 2.0 allows __fp16 to be used as a function argument or return
type. This enables this for AArch64.

This also fixes an existing bug that causes clang to not allow
homogeneous floating-point aggregates with a base type of __fp16. This
is valid for AAPCS64, but not for AAPCS-VFP.

llvm-svn: 216558
2014-08-27 16:31:57 +00:00
Oliver Stannard 2bfdc5b517 Move some ARM-specific code from CGCall.cpp to TargetInfo.cpp
This tidies up some ARM-specific code added by r208417 to move it out
of the target-independent parts of clang into TargetInfo.cpp. This
also has the advantage that we can now flatten struct arguments to
variadic AAPCS functions.

llvm-svn: 216535
2014-08-27 10:43:15 +00:00
Julien Lerouge 10dcff81be Re-apply r216491 (Win64 ABI shouldn't extend integer type arguments.)
This time though, preserve the extension for bool types since that's compatible
with what MSVC expects.

See http://reviews.llvm.org/D4380

llvm-svn: 216507
2014-08-27 00:36:55 +00:00
Julien Lerouge e8d34fa172 Revert 216491, it breaks CodeGenCXX/microsoft-abi-member-pointers.cpp
llvm-svn: 216496
2014-08-26 22:11:53 +00:00
Julien Lerouge 0056256b55 Win64 ABI shouldn't extend integer type arguments.
Summary:
MSVC doesn't extend integer types smaller than 64bit, so to preserve
binary compatibility, clang shouldn't either.

For example, the following C code built with MSVC:

unsigned test(unsigned v);
unsigned foobar(unsigned short);
int main() { return test(0xffffffff) + foobar(28); }

Produces the following:

  0000000000000004: B9 FF FF FF FF     mov         ecx,0FFFFFFFFh
  0000000000000009: E8 00 00 00 00     call        test
  000000000000000E: 89 44 24 20        mov         dword ptr [rsp+20h],eax
  0000000000000012: 66 B9 1C 00        mov         cx,1Ch
  0000000000000016: E8 00 00 00 00     call        foobar

And as you can see, when setting up the call to foobar, only cx is overwritten.

If foobar is compiled with clang, then the zero extension added by clang means
the rest of the register, which contains garbage, could be used.

For example if foobar is:

unsigned foobar(unsigned short v) {
    return v;
}

Compiled with clang -fomit-frame-pointer -O3 gives the following assembly:

foobar:
  0000000000000000: 89 C8              mov         eax,ecx
  0000000000000002: C3                 ret

And that function would return garbage because the 16 most significant bits of
ecx still contain garbage from the first call.

With this change, the code for that function is now:

foobar:
  0000000000000000: 0F B7 C1           movzx       eax,cx
  0000000000000003: C3                 ret

Reviewers: chapuni, rnk

Reviewed By: rnk

Subscribers: majnemer, cfe-commits

Differential Revision: http://reviews.llvm.org/D4380

llvm-svn: 216491
2014-08-26 21:52:27 +00:00
Hans Wennborg a302cd9a5e Range'ify some for loops over RecordDecl::fields()
No functionality change.

llvm-svn: 216183
2014-08-21 16:06:57 +00:00
Rafael Espindola 764837431a Delete support for AuroraUX.
auroraux.org is not resolving.

llvm-svn: 215644
2014-08-14 15:14:51 +00:00
Daniel Sanders 2ef3cdd3d5 Revert r214497: [mips] Defer va_arg expansion to the backend.
It appears that the backend does not handle all cases that were handled by clang.
In particular, it does not handle structs as used in
SingleSource/UnitTests/2003-05-07-VarArgs.

llvm-svn: 214512
2014-08-01 13:26:28 +00:00
Daniel Sanders cd8ba86990 [mips] Defer va_arg expansion to the backend.
Summary:
This patch causes clang to emit va_arg instructions to the backend instead of
expanding them into an implementation itself. The backend already implements
va_arg since this is necessary for NaCl so this patch is removing redundant
code.

Together with the llvm patch (D4556) that accounts for the effect of endianness
on the expansion of va_arg, this fixes PR19612.

Depends on D4556

Reviewers: sstankovic, dsanders

Reviewed By: dsanders

Subscribers: rnk, cfe-commits

Differential Revision: http://reviews.llvm.org/D4742

llvm-svn: 214497
2014-08-01 10:29:21 +00:00
Ulrich Weigand 8afad61a93 [PowerPC] Support ELFv1/ELFv2 ABI selection via -mabi= option
While Clang now supports both ELFv1 and ELFv2 ABIs, their use is currently
hard-coded via the target triple: powerpc64-linux is always ELFv1, while
powerpc64le-linux is always ELFv2.

These are of course the most common scenarios, but in principle it is
possible to support the ELFv2 ABI on big-endian or the ELFv1 ABI on
little-endian systems (and GCC does support that), and there are some
special use cases for that (e.g. certain Linux kernel versions could
only be built using ELFv1 on LE).

This patch implements the Clang side of supporting this, based on the
LLVM commit 214072.  The command line options -mabi=elfv1 or -mabi=elfv2
select the desired ABI if present.  (If not, Clang uses the same default
rules as now.)

Specifically, the patch implements the following changes based on the
presence of the -mabi= option:

In the driver:
- Pass the appropiate -target-abi flag to the back-end
- Select the correct dynamic loader version (/lib64/ld64.so.[12])

In the preprocessor:
- Define _CALL_ELF to the appropriate value (1 or 2)

In the compiler back-end:
- Select the correct ABI in TargetInfo.cpp
- Select the desired ABI for LLVM via feature (elfv1/elfv2)

llvm-svn: 214074
2014-07-28 13:17:52 +00:00
Reid Kleckner 852361d217 MS ABI: Ensure 'this' is first for byval+sret methods
Previously we were building up the inalloca struct in the usual pattern
of return type followed by arguments.  However, on Windows, 'this'
always precedes the 'sret' parameter, so we need to insert it into the
struct first as a special case.

llvm-svn: 213990
2014-07-26 00:12:26 +00:00
Tim Northover 40956e64f2 AArch64: update Clang for merged arm64/aarch64 triples.
The main subtlety here is that the Darwin tools still need to be given "-arch
arm64" rather than "-arch aarch64". Fortunately this already goes via a custom
function to handle weird edge-cases in other architectures, and it tested.

I removed a few arm64_be tests because that really isn't an interesting thing
to worry about. No-one using big-endian is also referring to the target as
arm64 (at least as far as toolchains go). Mostly they date from when arm64 was
a separate target and we *did* need a parallel name simply to test it at all.
Now aarch64_be is sufficient.

llvm-svn: 213744
2014-07-23 12:32:58 +00:00
Ulrich Weigand 601957fa23 [PowerPC] Optimize passing certain aggregates by value
In addition to enabling ELFv2 homogeneous aggregate handling,
LLVM support to pass array types directly also enables a performance
enhancement.  We can now pass (non-homogeneous) aggregates that fit
fully in registers as direct integer arrays, using an element type
to encode the alignment requirement (that would otherwise go to the
"byval align" field).

This is preferable since "byval" forces the back-end to write the
aggregate out to the stack, even if it could be passed fully in
registers.  This is particularly annoying on ELFv2, if there is
no parameter save area available, since we then need to allocate
space on the callee's stack just to hold those aggregates.

Note that to implement this optimization, this patch does not attempt
to fully anticipate register allocation rules as (defined in the
ABI and) implemented in the back-end.  Instead, the patch is simply
passing *any* aggregate passed by value using the array mechanism
if its size is up to 64 bytes.   This means that some of those will
end up being passed in stack slots anyway, but the generated code
shouldn't be any worse either.  (*Large* aggregates remain passed
using "byval" to enable optimized copying via memcpy etc.)

llvm-svn: 213495
2014-07-21 00:56:36 +00:00
Ulrich Weigand b712237da6 [PowerPC] Support the ELFv2 ABI
This patch implements clang support for the PowerPC ELFv2 ABI.
Together with a series of companion patches in LLVM, this makes
clang/LLVM fully usable on powerpc64le-linux.

Most of the ELFv2 ABI changes are fully implemented on the LLVM side.
On the clang side, we only need to implement some changes in how
aggregate types are passed by value.   Specifically, we need to:
- pass (and return) "homogeneous" floating-point or vector aggregates in
  FPRs and VRs (this is similar to the ARM homogeneous aggregate ABI)
- return aggregates of up to 16 bytes in one or two GPRs

The second piece is trivial to implement in any case.  To implement
the first piece, this patch makes use of infrastructure recently
enabled in the LLVM PowerPC back-end to support passing array types
directly, where the array element type encodes properties needed to
handle homogeneous aggregates correctly.

Specifically, the array element type encodes:
- whether the parameter should be passed in FPRs, VRs, or just
  GPRs/stack slots  (for float / vector / integer element types,
  respectively)
- what the alignment requirements of the parameter are when passed in
  GPRs/stack slots  (8 for float / 16 for vector / the element type
  size for integer element types) -- this corresponds to the
  "byval align" field

With this support in place, the clang part simply needs to *detect*
whether an aggregate type implements a float / vector homogeneous
aggregate as defined by the ELFv2 ABI, and if so, pass/return it
as array type using the appropriate float / vector element type.

llvm-svn: 213494
2014-07-21 00:48:09 +00:00
Oliver Stannard e022851f3b [ARM] Fix AAPCS regression caused by r211898
r211898 introduced a regression where a large struct, which would
normally be passed ByVal, was causing padding to be inserted to
prevent the backend from using some GPRs, in order to follow the
AAPCS. However, the type of the argument was not being set correctly,
so the backend cannot align 8-byte aligned struct types on the stack.

The fix is to not insert the padding arguments when the argument is
being passed ByVal.

llvm-svn: 213359
2014-07-18 09:09:31 +00:00
Ulrich Weigand 581badce4b [PowerPC] ABI support for aligned by-value aggregates
This patch adds support for respecting the ABI and type alignment
of aggregates passed by value.  Currently, all aggregates are aligned
at 8 bytes in the parameter save area.  This is incorrect for two
reasons:

- Aggregates that need alignment of 16 bytes or more should be aligned
  at 16 bytes in the parameter save area.  This is implemented by
  using an appropriate "byval align" attribute in the IR.

- Aggregates that need alignment beyond 16 bytes need to be dynamically
  realigned by the caller.  This is implemented by setting the Realign
  flag of the ABIArgInfo::getIndirect call.

In addition, when expanding a va_arg call accessing a type that is
aligned at 16 bytes in the argument save area (either one of the
aggregate types as above, or a vector type which is already aligned
at 16 bytes), code needs to align the va_list pointer accordingly.

Reviewed by Hal Finkel.

llvm-svn: 212743
2014-07-10 17:20:07 +00:00
Ulrich Weigand f4eba98853 [PowerPC] ABI support for non-Altivec vector types
This patch adds support for passing arguments of non-Altivec vector type
(i.e. defined via attribute ((vector_size (...)))) on powerpc64-linux.

While such types are not mentioned in the formal ABI document, this
patch implements a calling convention compatible with GCC:

- Vectors of size < 16 bytes are passed in a GPR
- Vectors of size > 16 bytes are passed via reference

Note that vector types with a number of elements that is not a power
of 2 are not supported by GCC, so there is no pre-existing ABI to
follow.  We choose to pass those (of size < 16) as if widened to the
next power of two, so they might end up in a vector register or
in a GPR.  (Sizes > 16 are always passed via reference as well.)

Reviewed by Hal Finkel.

llvm-svn: 212734
2014-07-10 16:39:01 +00:00
Reid Kleckner 677539d0af MS ABI: Fix __fastcall methods that return structs
The sret paramater consumes the register after the implicit 'this'
parameter, as with other calling conventions.

Fixes PR20278, which turned out to be very easy.

llvm-svn: 212669
2014-07-10 01:58:55 +00:00
Alp Toker 9907f08e61 Fix 'source-level' hyphenations
llvm-svn: 212621
2014-07-09 14:06:35 +00:00
Richard Sandiford dcb8d9cc80 Move misplaced x86_32 ABI code
r184166 added an X86_32 function in the middle of the SystemZ code.
The SystemZ port had been added only a couple of weeks earlier and
the original patch probably predated that.

No behavioral change intended.

llvm-svn: 212524
2014-07-08 11:10:34 +00:00
Christian Pirker c3d3217525 ARMEB: Fix function result return for composite types
Reviewed at http://reviews.llvm.org/D4364

llvm-svn: 212261
2014-07-03 09:28:12 +00:00
Oliver Stannard 3f32b9be7f [ARM] Fix AAPCS non-compliance caused by very large structs
This is a fix to the code in clang which inserts padding arguments to
ensure that the ARM backend can emit AAPCS-VFP compliant code. This code
needs to track the number of registers which have been allocated in order
to do this. When passing a very large struct (>64 bytes) by value, clang
emits IR which takes a pointer to the struct, but the backend converts this
back to passing the struct in registers and on the stack. The bug was that
this was being considered by clang to only use one register, meaning that
there were situations in which padding arguments were incorrectly emitted
by clang.

llvm-svn: 211898
2014-06-27 13:59:27 +00:00
Rafael Espindola 0a500af186 Correctly Load Mixed FP-GP Variadic Arguments for x86-64.
According to the x86-64 ABI, structures with both floating point and
integer members are split between floating-point and general purpose
registers, and consecutive 32-bit floats can be packed into a single
floating point register.

In the case of variadic functions these are stored to memory and the position
recorded in the va_list. This was already correctly implemented in
llvm.va_start.

The problem is that the code in clang for implementing va_arg was reading
floating point registers from the wrong location.

Patch by Thomas Jablin.

Fixes PR20018.

llvm-svn: 211626
2014-06-24 20:01:50 +00:00
Ulrich Weigand bebc55b13b [PowerPC] Fix small argument stack slot offset for LE
When small arguments (structures < 8 bytes or "float") are passed in a
stack slot in the ppc64 SVR4 ABI, they must reside in the least
significant part of that slot.  On BE, this means that an offset needs
to be added to the stack address of the parameter, but on LE, the least
significant part of the slot has the same address as the slot itself.

For the most part, this is handled in the LLVM back-end, where I just
fixed the LE case in commit r211368.

However, there is one piece of the clang front-end that is also aware of
these stack-slot offsets: PPC64_SVR4_ABIInfo::EmitVAArg.  This patch
updates that routine to take endianness into account.

llvm-svn: 211370
2014-06-20 16:37:40 +00:00
Alp Toker 4925ba7ffe StringRefize TargetInfo::getABI()
llvm-svn: 210402
2014-06-07 23:30:42 +00:00
Robert Lytton 6adb20f720 XCore target: Fix 'typestring' binding qualifier to the array and not the type
Differential Revision: http://reviews.llvm.org/D3949

llvm-svn: 210250
2014-06-05 09:06:21 +00:00
Tim Northover 573cbee543 AArch64/ARM64: rename ARM64 components to AArch64
This keeps Clang consistent with backend naming conventions.

llvm-svn: 209579
2014-05-24 12:52:07 +00:00
Tim Northover 25e8a6754e AArch64/ARM64: update Clang after AArch64 removal.
A few (mostly CodeGen) parts of Clang were tightly coupled to the
AArch64 backend. Now that it's gone, they will not even compile.

I've also deduplicated RUN lines in many of the AArch64 tests. This
might improve "make check-all" time noticably: some of those NEON
tests were monsters.

llvm-svn: 209578
2014-05-24 12:51:25 +00:00
Craig Topper 8a13c4180e [C++11] Use 'nullptr'. CodeGen edition.
llvm-svn: 209272
2014-05-21 05:09:00 +00:00
Robert Lytton db8c1cb02c XCore target: sort typestring enum fields alphabetically
llvm-svn: 209196
2014-05-20 07:19:33 +00:00
Oliver Stannard a3afc69b94 ARM: PCS non-compliance when struct is padded to avoid register/stack split, and requires internal padding
When we were padding a struct to avoid splitting it between registers and
the stack, we were throwing away the type which the argument should be coerced
to.

llvm-svn: 209122
2014-05-19 13:10:05 +00:00
Rafael Espindola 234405bd0f Update for llvm api change.
llvm-svn: 209077
2014-05-17 21:30:14 +00:00
Rafael Espindola 6172277e9f Update for llvm api change.
llvm-svn: 209074
2014-05-17 19:58:16 +00:00
Saleem Abdulrasool b9081f4490 CodeGen: remove MinGW and Cygwin legacy entries
These are now treated as environments.  Remove references to these enumeration
values in order to clean up the unused enumeration entries in LLVM.  The target
normalisation prior to tool invocation should ensure that the old values
continue to function properly.

llvm-svn: 209068
2014-05-17 15:46:59 +00:00
Rafael Espindola b2633b9793 Update for llvm api change.
Now that llvm cannot represent alias cycles, we have to diagnose erros just
before trying to close the cycle. This degrades the errors a bit. The real
solution is what it was before: if we want to provide good errors for these
cases, we have to be able to find a clang level decl given a mangled name
and produce the error from Sema.

llvm-svn: 209008
2014-05-16 19:35:48 +00:00
Rafael Espindola 9750ce7ebd Update for llvm API change.
llvm-svn: 208984
2014-05-16 13:34:28 +00:00
Reid Kleckner 40ca913727 Push record return type classification into CGCXXABI
In the Microsoft C++ ABI, instance methods always return records
indirectly via the second hidden parameter.  This was implemented in
X86_32ABIInfo, but not WinX86_64ABIInfo.

Rather than exposing a handful of boolean methods in the CGCXXABI
interface, we can expose a single method that applies C++ ABI return
value classification rules.

llvm-svn: 208733
2014-05-13 22:05:45 +00:00
Reid Kleckner 37abaca3c2 MS ABI: Pass 'sret' as the second parameter of instance methods
Summary:
MSVC always passes 'sret' after 'this', unlike GCC.  This required
changing a number of places in Clang that assumed the sret parameter was
always first in LLVM IR.

This fixes win64 MSVC ABI compatibility for methods returning structs.

Reviewers: rsmith, majnemer

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D3618

llvm-svn: 208458
2014-05-09 22:46:15 +00:00
James Molloy 6f244b6f78 Reapply r208417 (olista01 'ARM: HFAs must be passed in consecutive registers'). Bots are now pacified.
llvm-svn: 208425
2014-05-09 16:21:39 +00:00
James Molloy 1aa0d5f3b2 Revert r208417 (olista01 'ARM: HFAs must be passed in consecutive registers'). This is a followon commit from r208413 which broke the LLVM bots.
llvm-svn: 208422
2014-05-09 16:17:09 +00:00
Oliver Stannard 19f3b4f2ce ARM: HFAs must be passed in consecutive registers
This is the clang counterpart to 208413, which ensures that Homogeneous
Floating-point Aggregates are passed in consecutive registers on ARM.

llvm-svn: 208417
2014-05-09 15:14:56 +00:00
Rafael Espindola 8dcd6e767b Replace virtual with override.
llvm-svn: 208324
2014-05-08 15:01:48 +00:00
James Molloy 467be60748 [ARM64-BE] Correctly deal with single element HFAs in varargs.
Just because the first "if" didn't fire, doesn't mean we can not have
an HFA in the "else" clause.

llvm-svn: 208216
2014-05-07 14:45:55 +00:00
Oliver Stannard 39d26c98c5 ARM: Fix assertion caused by passing bitfield struct using ABIArgInfo::getExpandWithPadding
In cases where a struct must, according to the AAPCS, not be split between
general purpose and floating point registers, we use
ABIArgInfo::getExpandWithPadding to add the padding arguments. However,
ExpandWithPadding does not work if the struct contains bitfields, so we
instead must use ABIArgInfo::getDirect.

llvm-svn: 208185
2014-05-07 10:39:12 +00:00
Robert Lytton d263f14a0f XCore target: fix initialization bug found by MSan Bot.
llvm-svn: 208072
2014-05-06 09:38:54 +00:00
Robert Lytton 844aeeb15a XCore target: Add TypeString meta data to IR output.
This includes the addition of the virtual function:
	TargetCodeGenInfo::EmitTargetMD()

llvm-svn: 207832
2014-05-02 09:33:20 +00:00
Reid Kleckner ec87fece21 Remove unused variable that I missed in my rush to fix the bots
llvm-svn: 207820
2014-05-02 01:17:12 +00:00
Reid Kleckner 7f5f0f3f6e Win64: Use ConvertType instead of checking the MS inheritance
dependent-type-member-pointer.cpp is failing on a win64 bot because
-fms-extensions is not enabled.  Use ConvertType rather than relying on
the inheritance attributes.  It's less code, but probably slower.

llvm-svn: 207819
2014-05-02 01:14:59 +00:00
Reid Kleckner 9005f41837 Win64: Pass member pointers larger than 8 bytes by reference
The Win64 ABI docs on MSDN say that arguments bigger than 8 bytes are
passed by reference.  Prior to this change, we were only applying this
logic to RecordType arguments.  This affects both the Itanium and
Microsoft C++ ABIs.

Reviewers: majnemer

Differential Revision: http://reviews.llvm.org/D3587

llvm-svn: 207817
2014-05-02 00:51:20 +00:00
James Molloy 7f4ba53ef0 [ARM64] Add a missed case label for arm64_be, and enable the aarch64-varargs test for arm64_be.
This ensures that r203917 (cpirker "AArch64_be varargs processing for ARM ABI") is ported to ARM64.

llvm-svn: 206961
2014-04-23 10:26:08 +00:00
Bob Wilson 373af73ad4 ARM64: Do not expand variadic HFA/HVA arguments with the Darwin ABI.
Unlike the standard AAPCS64 ABI, variadic arguments are always passed on the
stack with the Darwin ABI, and this was not being considered when deciding
whether to expand HFA/HVA arguments in a call. An HFA argument with a "float"
base type was being expanded into separate "float" arguments, each of which
was then extended to a double, resulting in a serious mismatch from what is
expected by the va_arg implementation. <rdar://problem/15777067>

llvm-svn: 206729
2014-04-21 01:23:39 +00:00
Bob Wilson 3abf169549 Fix a comment typo.
llvm-svn: 206728
2014-04-21 01:23:36 +00:00
Tim Northover 4dab69815c ARM64: make sure the caller is expected to extend in AAPCS.
This is one of those DarwinPCS differences. It'd been caught in
arguments, but not return values.

llvm-svn: 206594
2014-04-18 13:46:08 +00:00
Tim Northover 07f1624aa2 ARM64: make sure HFAs on the stack get properly aligned.
Another AAPCS bug, part of PR19432.

llvm-svn: 206580
2014-04-18 10:47:44 +00:00
Tim Northover 5ffc092700 ARM64: remove holes from *all* HFAs on the stack.
My first attempt to make sure HFAs were contiguous was in the block dealing
with padding registers, which meant it only triggered on the first stack-based
HFA. This should extend it to the rest as well.

Another part of PR19432.

llvm-svn: 206456
2014-04-17 10:20:38 +00:00
Eli Bendersky e1627b43f9 Replace push_back()s by initializer list for shorter and cleaner code.
llvm-svn: 206304
2014-04-15 17:19:26 +00:00
Eli Bendersky e06a2c4f90 Add support for CUDA __launch_bounds__ attribute to CodeGen.
Sema does have a CUDALaunchBoundsAttr, but CodeGen was doing nothing with it.
This change translates CUDALaunchBoundsAttr to maxntidx and minctasm
metadata, which NVPTX then translates to the correct PTX directives.

Patch by Manjunath Kudlur.

llvm-svn: 206302
2014-04-15 16:57:05 +00:00
Tim Northover c801b4a2aa ARM64: track alignment padding registers on AAPCS targets
This implements clause C.8 of the AAPCS in the front-end, so that Clang
accurately knows when the registers run out and it has to insert padding before
the stack objects begin.

PR19432.

llvm-svn: 206296
2014-04-15 14:55:11 +00:00
Reid Kleckner d378a71b4e inalloca: Pad the struct *after* inserting each arg
This ensures that the overall struct size will be a multiple of 4, as
required by the ABI.

llvm-svn: 205981
2014-04-10 19:09:43 +00:00
Tim Northover a2ee433c8d ARM64: initial clang support commit.
This adds Clang support for the ARM64 backend. There are definitely
still some rough edges, so please bring up any issues you see with
this patch.

As with the LLVM commit though, we think it'll be more useful for
merging with AArch64 from within the tree.

llvm-svn: 205100
2014-03-29 15:09:45 +00:00
Christian Pirker f01cd6f57b Add ARM big endian Target (armeb, thumbeb)
Reviewed at http://llvm-reviews.chandlerc.com/D3096

llvm-svn: 205008
2014-03-28 14:40:46 +00:00
Saleem Abdulrasool 377066a5f5 Use the new Windows environment for target detection
This follows the LLVM change to canonicalise the Windows target triple
spellings.  Rather than treating each Windows environment as a single entity,
the environments are now modelled properly as an environment.  This is a
mechanical change to convert the triple use to reflect that change.

llvm-svn: 204978
2014-03-27 22:50:18 +00:00
Aaron Ballman ec47bc2bae [C++11] Replacing CGFunctionInfo arg iterators with iterator_range arguments(). Updating all of the usages of the iterators with range-based for loops.
llvm-svn: 204068
2014-03-17 18:10:01 +00:00
Christian Pirker f5164229f3 AArch64_be varargs processing for ARM ABI
llvm-svn: 203917
2014-03-14 11:51:06 +00:00
Aaron Ballman 574705ed7f [C++11] Replacing CXXRecordDecl iterators bases_begin() and bases_end() with iterator_range bases(). Updating all of the usages of the iterators with range-based for loops.
llvm-svn: 203803
2014-03-13 15:41:46 +00:00
Oliver Stannard 7c3c09e23f ARM: Correct alignment of structs passed as byval pointer
When a struct has bitfields overlapping with other members
(as required by the AAPCS), clang uses a packed struct to
represent this. If such a struct is large enough for clang to
pass it as a byval pointer (>64 bytes), we need to set the
alignment of the argument to match the original type.

llvm-svn: 203660
2014-03-12 14:02:50 +00:00
Craig Topper 4f12f10de4 [C++11] Add 'override' keyword to virtual methods that override their base class.
llvm-svn: 203643
2014-03-12 06:41:41 +00:00
Aaron Ballman e8a8baef44 [C++11] Replacing RecordDecl iterators field_begin() and field_end() with iterator_range fields(). Updating all of the usages of the iterators with range-based for loops.
llvm-svn: 203355
2014-03-08 20:12:42 +00:00
Robert Lytton d21e2d76fc correct consitency of XCore caps
llvm-svn: 202711
2014-03-03 13:45:29 +00:00
Christian Pirker 9b019ae899 Add AArch64 big endian Target (aarch64_be)
llvm-svn: 202151
2014-02-25 13:51:00 +00:00
Reid Kleckner fab1e89de9 MS ABI: Return sret parameters when using inalloca
Previously the X86 backend would look for the sret attribute and handle
this for us.  inalloca takes that all away, so we have to do the return
ourselves now.

llvm-svn: 202097
2014-02-25 00:59:14 +00:00
Roman Divacky f02c9944c8 Implement getDwarfEHStackPointer() and initDwarfEHRegSizeTable() for sparcv9.
llvm-svn: 202059
2014-02-24 18:46:27 +00:00
Oliver Stannard 405bdeddd1 AAPCS: Do not split structs after CPRC allocated on stack
According to the AAPCS, we can split structs between GPRs and the stack,
except for when an argument has already been allocated on the stack. This
can occur when a large number of floating-point arguments fill up the VFP
registers, and are alllocated on the stack before the general-purpose argument
registers are full.

llvm-svn: 201137
2014-02-11 09:25:50 +00:00
Oliver Stannard 5e8558fce0 Fix AAPCS compliance for HFAs containing doubles and long doubles
An HFA is defined as a struct containing floating point values of the
same machine type. In the 32-bit ABI, double and long double have the
same machine type, so a struct with a mixture of these types must be an
HFA (assuming it meets the other criteria).

llvm-svn: 200971
2014-02-07 11:25:57 +00:00
Reid Kleckner 314ef7bafd [ms-cxxabi] Use inalloca on win32 when passing non-trivial C++ objects
When a non-trivial parameter is present, clang now gathers up all the
parameters that lack inreg and puts them into a packed struct.  MSVC
always aligns each parameter to 4 bytes and no more, so this is a pretty
simple struct to lay out.

On win64, non-trivial records are passed indirectly.  Prior to this
change, clang was incorrectly using byval on win64.

I'm able to self-host a working clang with this change and additional
LLVM patches.

Reviewers: rsmith

Differential Revision: http://llvm-reviews.chandlerc.com/D2636

llvm-svn: 200597
2014-02-01 00:04:45 +00:00
Reid Kleckner 4982b82b73 [ms-cxxabi] Use x86_cdeclmethodcc for __cdecl methods on win32
This fixes PR15768, where the sret parameter and the 'this' parameter
are in the wrong order.

Instance methods compiled by MSVC never return records in registers,
they always return indirectly through an sret pointer.  That sret
pointer always comes after the 'this' parameter, for both __cdecl and
__thiscall methods.

Unfortunately, the same is true for other calling conventions, so we'll
have to change the overall approach here relatively soon.

Reviewers: rsmith

Differential Revision: http://llvm-reviews.chandlerc.com/D2664

llvm-svn: 200587
2014-01-31 22:54:50 +00:00
Amara Emerson 9dc7878ac5 [ARM] Fix AAPCS-VFP non-compliance when returning HFA from variadic functions.
Arguments and return values must always be marshalled as for the base
AAPCS when the callee is a variadic function.

Patch by Oliver Stannard!

llvm-svn: 200307
2014-01-28 10:56:36 +00:00
Reid Kleckner 661f35b0c5 Refactor ABI argument lowering a little
Currently it tracks the number of free registers, but soon it will track
stack offsets for inalloca lowering.

No functional change.

llvm-svn: 199532
2014-01-18 01:12:41 +00:00
Jakob Stoklund Olesen b81eb3eb51 SPARC passes non-trivial C++ objects indirectly like everybody else.
llvm-svn: 199037
2014-01-12 06:54:56 +00:00
Aaron Ballman 36a18ffef1 Hosting a call to getAttr so that we don't call it multiple times for the same attribute. Also removes a hasAttr that's not required. No functional changes intended.
llvm-svn: 197675
2013-12-19 13:16:35 +00:00
Aaron Ballman 9ead1243a5 Replacing calls to getAttr with calls to hasAttr for clarity. No functional change intended -- this only replaces Boolean uses of getAttr.
llvm-svn: 197648
2013-12-19 02:39:40 +00:00
Joerg Sonnenberger d75a1f8761 Support EABIHF environment on ARM.
llvm-svn: 197406
2013-12-16 19:16:04 +00:00
Joerg Sonnenberger 0c1652dabd GNUEABIHF is the same as GNUEABI for anything not float/double related,
so use the same exception size as GNUEABI does.

llvm-svn: 197404
2013-12-16 18:30:28 +00:00
Joerg Sonnenberger 782e6aab1f Replace use of Triple::getEnvironmentName with the simpler
Triple::getEnvironment.

llvm-svn: 197181
2013-12-12 21:29:27 +00:00
Alp Toker d473363876 Correct hyphenations in comments and assert messages
This patch tries to avoid unrelated changes other than fixing a few
hyphen-related ambiguities in nearby lines.

llvm-svn: 196466
2013-12-05 04:47:09 +00:00
Richard Sandiford cdd86884a4 [SystemZ] Fix handling of pass-by-pointer arguments
I'd misunderstood getIndirect() to mean that the argument should be passed
as a pointer at the ABI level, with the ByVal argument choosing caller-copy
semantics over no-caller-copy (callee-copy-on-write) semantics.  But
getIndirect(x) actually means that x is passed by pointer at the IR
level but (at least on all other targets I looked at) directly at the
ABI level.  getIndirect(x, false) selects a pointer to a caller-made
copy, which is what SystemZ was aiming for.

This fixes a miscompilation of c-index-test.  Structure arguments were being
passed by pointer, but no copy was being made, so a write in the callee
stomped over a caller's local variable.

llvm-svn: 196370
2013-12-04 09:59:57 +00:00
Justin Holewinski f9329ff650 [NVPTX] Update ABI handling
For PTX, we want the target to handle struct returns directly.

llvm-svn: 195268
2013-11-20 20:35:34 +00:00
Akira Hatanaka c4baedd71d [mips] Partially revert r193640. Stack alignment should not be determined by
the floating point register mode.

llvm-svn: 194426
2013-11-11 22:10:46 +00:00
Rui Ueyama 727025a5e1 Use StringRef::endswith_lower. No functionality change.
llvm-svn: 193788
2013-10-31 19:12:53 +00:00
Mark Lacey a8e7df3602 Add CodeGenABITypes.h for use in LLDB.
CodeGenABITypes is a wrapper built on top of CodeGenModule that exposes
some of the functionality of CodeGenTypes (held by CodeGenModule),
specifically methods that determine the LLVM types appropriate for
function argument and return values.

I addition to CodeGenABITypes.h, CGFunctionInfo.h is introduced, and the
definitions of ABIArgInfo, RequiredArgs, and CGFunctionInfo are moved
into this new header from the private headers ABIInfo.h and CGCall.h.

Exposing this functionality is one part of making it possible for LLDB
to determine the actual ABI locations of function arguments and return
values, making it possible for it to determine this for any supported
target without hard-coding ABI knowledge in the LLDB code.

llvm-svn: 193717
2013-10-30 21:53:58 +00:00
Akira Hatanaka 618b29813a [mips] Align the stack to 16-bytes for -mfp64.
llvm-svn: 193640
2013-10-29 19:00:35 +00:00
Akira Hatanaka ddd6634340 [mips] Use the distance between the current argument's starting address and
the previous argument's ending address to compute the type of the padding
argument.

No intended functionality change.

llvm-svn: 193638
2013-10-29 18:41:15 +00:00
Peter Collingbourne b453cd64a7 Implement function type checker for the undefined behavior sanitizer.
This uses function prefix data to store function type information at the
function pointer.

Differential Revision: http://llvm-reviews.chandlerc.com/D1338

llvm-svn: 193058
2013-10-20 21:29:19 +00:00
Andy Gibbs d9ba47271d Fixed "ArgSize may be used uninitialised" error when compiling with gcc.
llvm-svn: 192570
2013-10-14 07:02:04 +00:00
Robert Lytton 2d1969584a XCore : Fix bug in XCoreABIInfo::EmitVAArg()
Incorrect handling of 'double' and 'long long int'

llvm-svn: 192436
2013-10-11 10:29:34 +00:00