Commit Graph

273715 Commits

Author SHA1 Message Date
Reid Kleckner ddf413f3e1 Really fix llvm-rc include-paths.test
llvm-svn: 315515
2017-10-11 21:27:54 +00:00
Reid Kleckner ade90cbd79 Attempt to fix failing llvm-rc include-paths.text
llvm-svn: 315514
2017-10-11 21:25:03 +00:00
Reid Kleckner 9cdd4df81a [codeview] Implement FPO data assembler directives
Summary:
This adds a set of new directives that describe 32-bit x86 prologues.
The directives are limited and do not expose the full complexity of
codeview FPO data. They are merely a convenience for the compiler to
generate more readable assembly so we don't need to generate tons of
labels in CodeGen. If our prologue emission changes in the future, we
can change the set of available directives to suit our needs. These are
modelled after the .seh_ directives, which use a different format that
interacts with exception handling.

The directives are:
  .cv_fpo_proc _foo
  .cv_fpo_pushreg ebp/ebx/etc
  .cv_fpo_setframe ebp/esi/etc
  .cv_fpo_stackalloc 200
  .cv_fpo_endprologue
  .cv_fpo_endproc
  .cv_fpo_data _foo

I tried to follow the implementation of ARM EHABI CFI directives by
sinking most directives out of MCStreamer and into X86TargetStreamer.
This helps avoid polluting non-X86 code with WinCOFF specific logic.

I used cdb to confirm that this can show locals in parent CSRs in a few
cases, most importantly the one where we use ESI as a frame pointer,
i.e. the one in http://crbug.com/756153#c28

Once we have cdb integration in debuginfo-tests, we can add integration
tests there.

Reviewers: majnemer, hans

Subscribers: aemerson, mgorny, kristof.beyls, llvm-commits, hiraditya

Differential Revision: https://reviews.llvm.org/D38776

llvm-svn: 315513
2017-10-11 21:24:33 +00:00
Evgeniy Stepanov 1961c6cb2c Disable TSan tests on Android.
They never passed. This change excludes them from 'check-all'.

llvm-svn: 315512
2017-10-11 21:22:45 +00:00
Evgeniy Stepanov 3747b826c4 Disable profile tests on Android.
They never actually worked, but this way they are not included in "check-all".

llvm-svn: 315511
2017-10-11 21:22:32 +00:00
Krzysztof Parzyszek c4a9a8d8e0 [Hexagon] Make sure that new-value jump is packetized with producer
llvm-svn: 315510
2017-10-11 21:20:43 +00:00
Kostya Kortchinsky 6a45f9ce82 [sanitizer] Move the errno/ENOMEM allocator checks logic to separate .cc
Summary:
This is a new attempt at D38706, which had 2 issues.

The first one was that it broke TSan, because `sanitizer_errno.h` was not
directly included in `tsan_mman.cc`. This fixes the include.

The second one was that it broke the nolibc build, because `__errno_location`
couldn't be found. This adds the new .cc to the libcdep list instead of the
base one.

Reviewers: alekseyshl

Reviewed By: alekseyshl

Subscribers: kubamracek, mgorny, llvm-commits

Differential Revision: https://reviews.llvm.org/D38743

llvm-svn: 315509
2017-10-11 21:20:04 +00:00
George Karpenkov c928e1f595 [Analyzer] Support bodyfarming libstdc++ implementation of std::call_once.
Differential Revision: https://reviews.llvm.org/D38810

llvm-svn: 315508
2017-10-11 20:53:01 +00:00
Evgeniy Stepanov 450ae592b4 [ubsan] Support ubsan-minimal tests on Android.
llvm-svn: 315507
2017-10-11 20:46:13 +00:00
Matt Morehouse 319b7716a8 [clang-fuzzer] Build with newer protobuf-mutator.
llvm-svn: 315506
2017-10-11 20:45:10 +00:00
Craig Topper 705b969f80 [X86] Add Knights Mill CPU to cpu_indicator support to match libgcc.
llvm-svn: 315505
2017-10-11 20:35:43 +00:00
Vlad Tsyrklevich 89c3c8c403 Reland 'Classify llvm-cfi-verify.'
Summary: Move llvm-cfi-verify into a class in preparation for CFI analysis to come.

Reviewers: vlad.tsyrklevich

Reviewed By: vlad.tsyrklevich

Subscribers: mgorny, llvm-commits, pcc, kcc

Differential Revision: https://reviews.llvm.org/D38379

llvm-svn: 315504
2017-10-11 20:35:01 +00:00
Kostya Serebryany 75480e3871 [libFuzzer] disable use_feature_frequency as it degrades some of the benchmarks too much :(
llvm-svn: 315503
2017-10-11 20:31:01 +00:00
Florian Hahn e52abba277 [MachineCombiner] Fix initialisation of LastUpdate for incremental update.
Summary:
Fixes a bogus iterator resulting from the removal of a block's first instruction at the point that incremental update is enabled.

Patch by Paul Walker.

Reviewers: fhahn, Gerolf, efriedma, MatzeB

Reviewed By: fhahn

Subscribers: aemerson, javed.absar, llvm-commits

Differential Revision: https://reviews.llvm.org/D38734

llvm-svn: 315502
2017-10-11 20:25:58 +00:00
Zachary Turner f22a25e69d Fix incorrect integer literal suffix.
llvm-svn: 315501
2017-10-11 20:23:38 +00:00
Lei Huang 263dc4ef3a [PowerPC] Utilize DQ-Form instructions for spill/restore and fix FrameIndex elimination to only use `lis/addi` if necessary.
Currently we produce a bunch of unnecessary code when emitting the
prologue/epilogue for spills/restores.  Namely, if the load from stack
slot/store to stack slot instruction is an X-Form instruction, we will
always produce an LIS/ORI sequence for the stack offset.

Furthermore, we have not exploited the P9 vector D-Form loads/stores for this
purpose.

This patch address both issues.

Specifying the D-Form load as the instruction to use for stack spills/reloads
should be safe because:

1. The stack should be aligned according to the ABI
2. If the stack isn't aligned, PPCRegisterInfo::eliminateFrameIndex() will
   check for the offset being a multiple of 16 and will convert it to an
   X-Form instruction if it isn't.

Differential Revision : https://reviews.llvm.org/D38758

llvm-svn: 315500
2017-10-11 20:20:58 +00:00
Zachary Turner fa0ca6cbd0 [llvm-rc] Use proper search algorithm for finding resources.
Previously we would only look in the current directory for a
resource, which might not be the same as the directory of the
rc file.  Furthermore, MSVC rc supports a /I option, and can
also look in the system environment.  This patch adds support
for this search algorithm.

Differential Revision: https://reviews.llvm.org/D38740

llvm-svn: 315499
2017-10-11 20:12:09 +00:00
Martin Storsjo 210d9f43a3 Support DWARF unwinding on i386 windows
In practice, with code built with clang, there are still unresolved
issues with DW_CFA_GNU_args_size though.

Differential Revision: https://reviews.llvm.org/D38679

llvm-svn: 315498
2017-10-11 20:06:18 +00:00
Martin Storsjo b03f480c8d [docs] Mention that linux/arm64 is supported with DWARF
llvm-svn: 315497
2017-10-11 20:06:07 +00:00
Ted Woodward 2ecfd62938 Remove default case from switch.
Add case to handle new event lldb::eBreakpointEventTypeAutoContinueChanged.

llvm-svn: 315496
2017-10-11 19:38:35 +00:00
Rui Ueyama 4092016b7b Return early if it fails to parse a hex string.
This patch doesn't change the behavior of the program because it
would eventually return None at end of the function. But it is
better to return None early if we know it will eventually happen.

llvm-svn: 315495
2017-10-11 19:30:39 +00:00
Petr Hosek c530f497b8 Revert "[sanitizer] Introduce ReservedAddressRange to sanitizer_common"
This reverts commit r315493 which is failing to build on sanitizer-windows.

llvm-svn: 315494
2017-10-11 19:29:14 +00:00
Petr Hosek 2bd0123afc [sanitizer] Introduce ReservedAddressRange to sanitizer_common
In Fuchsia, MmapNoAccess/MmapFixedOrDie are implemented using a global
VMAR, which means that MmapNoAccess can only be called once. This works
for the sanitizer allocator but *not* for the Scudo allocator.

Hence, this changeset introduces a new ReservedAddressRange object to
serve as the new API for these calls. In this changeset, the object
still calls into the old Mmap implementations.

The next changeset two changesets will convert the sanitizer and scudo
allocators to use the new APIs, respectively. (ReservedAddressRange will
replace the SecondaryHeader in Scudo.)

Finally, a last changeset will update the Fuchsia implementation.

Patch by Julia Hansbrough

Differential Revision: https://reviews.llvm.org/D38759

llvm-svn: 315493
2017-10-11 19:17:35 +00:00
George Karpenkov 734cad8790 [Analyzer] Fix introduced regression: properly check for nullable attribute.
llvm-svn: 315492
2017-10-11 19:13:15 +00:00
Daniel Neilson 5acfd1dd78 [SCEV] Properly handle the case of a non-constant start with a zero accum in ScalarEvolution::createAddRecFromPHIWithCastsImpl
Summary:
 This patch fixes an error in the patch to ScalarEvolution::createAddRecFromPHIWithCastsImpl
made in D37265. In that patch we handle the cases where the either the start or accum values can be
zero after truncation. But, we assume that the start value must be a constant if the accum is
zero. This is clearly an erroneous assumption. This change removes that assumption.

Reviewers: sanjoy, dorit, mkazantsev

Reviewed By: sanjoy

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38814

llvm-svn: 315491
2017-10-11 19:05:14 +00:00
Kostya Serebryany 198d385a77 [libFuzzer] make -use_feature_frequency less aggressive and enable by default
llvm-svn: 315490
2017-10-11 19:01:35 +00:00
George Karpenkov 7d36cd7223 [Analyzer] Remove dead code from testing scripts
Differential Revision: https://reviews.llvm.org/D38488

llvm-svn: 315489
2017-10-11 18:42:39 +00:00
George Karpenkov ead0162801 [Analyzer] Assume that string-like const globals are non-nil.
Differential Revision: https://reviews.llvm.org/D38764

llvm-svn: 315488
2017-10-11 18:39:40 +00:00
Davide Italiano db710f28e6 [ELF] Try to not emit weird diagnostics on undefined symbols.
Fixes PR34872.

Differential Revision:  https://reviews.llvm.org/D38712

llvm-svn: 315487
2017-10-11 18:37:24 +00:00
Matt Morehouse 6c108b363e [clang-fuzzer] Allow linking with any fuzzing engine.
Summary:
Makes clang-[proto-]fuzzer compatible with flags specified by OSS-Fuzz.

https://llvm.org/pr34314

Reviewers: vitalybuka, kcc

Reviewed By: kcc

Subscribers: cfe-commits, mgorny

Differential Revision: https://reviews.llvm.org/D38812

llvm-svn: 315486
2017-10-11 18:29:24 +00:00
Sanjay Patel 6c0aef77aa [x86] avoid infinite loop from SoftenFloatOperand (PR34866)
Legalization of fp128 assumes things that we should have asserts for,
so that's another potential improvement.

Differential Revision: https://reviews.llvm.org/D38771

llvm-svn: 315485
2017-10-11 18:24:21 +00:00
Jake Ehrlich f03384dce7 Reland "[llvm-objcopy] Add support for --strip-sections to remove all section headers leaving only program headers and loadable segment data"
ubsan caught an issue I made where I was converting a null pointer to a
reference.

elf utils implements a particularly extreme form of stripping that I'd
like to support. eu-strip has an option called "strip-sections" that
removes all section headers and leaves only program headers and the
segment data. I have implemented this option partly as a test but mainly
because in Fuchsia we would like to use this option to minimize the size
of our executables. The other strip options that are on my list include
--strip-all and --strip-debug. This is a preliminary implementation that
I'd like to start using in Fuchsia builds if possible. This change
implements such a stripping option for llvm-objcopy

Differential Revision: https://reviews.llvm.org/D38335

llvm-svn: 315484
2017-10-11 18:09:18 +00:00
Rafael Espindola 3500f5e3bf Convert the last uses of ErrorOr in include/llvm/Object.
llvm-svn: 315483
2017-10-11 18:07:18 +00:00
Lei Huang f9c7f7fed4 [NFC] update test case so checks are not order dependent when not needed
llvm-svn: 315482
2017-10-11 18:04:41 +00:00
Rafael Espindola 57332e97b4 Remove unused include.
llvm-svn: 315481
2017-10-11 17:35:48 +00:00
Rafael Espindola f340467495 Convert the last uses of ErrorOr in COFF.h.
llvm-svn: 315480
2017-10-11 17:33:11 +00:00
Evgeniy Stepanov b751082d56 [asan] Tweak test output to diagnose buildbot failures.
llvm-svn: 315479
2017-10-11 17:32:38 +00:00
Rafael Espindola 329886556a Update for llvm change.
llvm-svn: 315478
2017-10-11 17:23:29 +00:00
Rafael Espindola 748949257a Convert a few ErrorOr to Expected.
llvm-svn: 315477
2017-10-11 17:23:15 +00:00
Vivek Pandya 9590658fb8 [NFC] Convert OptimizationRemarkEmitter old emit() calls to new closure
parameterized emit() calls

Summary: This is not functional change to adopt new emit() API added in r313691.

Reviewed By: anemet

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38285

llvm-svn: 315476
2017-10-11 17:12:59 +00:00
Rafael Espindola 87867988f9 Convert a couple of ErrorOr to Expected. NFC.
llvm-svn: 315475
2017-10-11 17:05:24 +00:00
Rafael Espindola 0f7be968cc Remove an unused include.
llvm-svn: 315474
2017-10-11 16:58:32 +00:00
Rafael Espindola 1a0e5a1933 Convert an ErrorOr to Expected.
getRelocationAddend should never be called on non SHT_RELA sections,
but changing that requires changing RelocVisitor.h.

llvm-svn: 315473
2017-10-11 16:56:33 +00:00
Krzysztof Parzyszek bf626195df [Hexagon] Handle non-immediate operands to A2_addi in getIncrementValue
llvm-svn: 315472
2017-10-11 16:15:31 +00:00
Simon Pilgrim 7db366630c Spelling mistake in comment. NFCI.
llvm-svn: 315471
2017-10-11 16:10:05 +00:00
Craig Topper 189576f80e [X86] Correct type for argument to clflushopt intrinsic.
Summary: According to Intel docs this should take void const *. We had char*. The lack of const is the main issue.

Reviewers: RKSimon, zvi, igorb

Reviewed By: igorb

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38782

llvm-svn: 315470
2017-10-11 16:06:08 +00:00
Craig Topper 3dc22bba47 [X86] Remove MVT::i1 handling code from LowerTRUNCATE
Summary: I don't think this is necessary with i1 being illegal now.

Reviewers: RKSimon, zvi, guyblank

Reviewed By: RKSimon

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D38784

llvm-svn: 315469
2017-10-11 16:05:05 +00:00
Krzysztof Parzyszek 12bdcab59c [Pipeliner] Fix offset value for instrs dependent on post-inc load/stores
The software pipeliner and the packetizer try to break dependence
between the post-increment instruction and the dependent memory
instructions by changing the base register and the offset value.
However, in some cases, the existing logic didn't work properly
and created incorrect offset value.

Patch by Jyotsna Verma.

llvm-svn: 315468
2017-10-11 15:59:51 +00:00
Alexey Bataev 3a03a7f636 [OPENMP] Remove extra if, NFC.
llvm-svn: 315467
2017-10-11 15:56:38 +00:00
Krzysztof Parzyszek 8f174dde92 [Pipeliner] Improve serialization order for post-increments
The pipeliner is generating a serial sequence that causes poor
register allocation when a post-increment instruction appears
prior to the use of the post-increment register. This occurs when
there is a circular set of dependences involved with a sequence
of instructions in the same cycle. In this case, there is no
serialization of the parallel semantics that will not cause an
additional register to be allocated.

This patch fixes the problem by changing the instructions so that
the post-increment instruction is used by the subsequent
instruction, which enables the register allocator to make a
better decision and not require another register.

Patch by Brendon Cahoon.

llvm-svn: 315466
2017-10-11 15:51:44 +00:00