db18938355
If a brcond condition is promoted, make sure to zero extend it, even if not
...
expanded into BR_CC.
llvm-svn: 31932
2006-11-27 04:39:56 +00:00
6c38f0bb07
For PR950:
...
The long awaited CAST patch. This introduces 12 new instructions into LLVM
to replace the cast instruction. Corresponding changes throughout LLVM are
provided. This passes llvm-test, llvm/test, and SPEC CPUINT2000 with the
exception of 175.vpr which fails only on a slight floating point output
difference.
llvm-svn: 31931
2006-11-27 01:05:10 +00:00
3750ae25a0
Removed #include <iostream> and replace with llvm_* streams.
...
llvm-svn: 31927
2006-11-26 10:52:51 +00:00
4ae401074c
Remove #include <iostream> and use llvm_* streams instead.
...
llvm-svn: 31925
2006-11-26 10:17:54 +00:00
8f13b5c43e
Replace #include <iostream> with llvm_* streams.
...
llvm-svn: 31924
2006-11-26 10:02:32 +00:00
5dbf43c983
Removed #include <iostream> and replaced with llvm_* streams.
...
llvm-svn: 31923
2006-11-26 09:46:52 +00:00
a7459ca813
Removed #include <iostream> and used the llvm_cerr/DOUT streams instead.
...
llvm-svn: 31922
2006-11-26 09:17:06 +00:00
24cdf575e7
fix storing bools to mem and unordered FP ops
...
llvm-svn: 31920
2006-11-26 04:34:26 +00:00
aa5c220665
Make the absolute/relative tolerance information easier to read/understand.
...
llvm-svn: 31908
2006-11-25 08:38:44 +00:00
6968c497de
Add newline at end of file.
...
llvm-svn: 31902
2006-11-25 05:41:02 +00:00
09b7e4d3ab
Update to new predicate simplifier VRP design. Fixes PR966 and PR967.
...
Remove predicate simplifier from default gcc3 pipeline. New design is too
slow to enable by default.
Add new testcases for problems encountered in development.
llvm-svn: 31895
2006-11-22 23:49:16 +00:00
ec45a4c88c
This xform is handled by FoldOpIntoPhi in visitCastInst in a more elegant way.
...
llvm-svn: 31889
2006-11-21 17:05:13 +00:00
5b96cdebb0
Refactored *GVRequiresExtraLoad() to Subtarget method.
...
llvm-svn: 31887
2006-11-21 00:01:06 +00:00
ec5dbccdcf
in ppc64-mode, don't allocate the 32-bit version of r13 either.
...
llvm-svn: 31884
2006-11-20 20:48:05 +00:00
d7f53cdaec
Global label not handled correctly.
...
llvm-svn: 31883
2006-11-20 20:29:06 +00:00
ac36360348
r13 is the thread pointer on darwin/ppc64, don't allocate it.
...
llvm-svn: 31882
2006-11-20 19:33:51 +00:00
3e96211bc8
Fix codegen for x86-64 on systems (like ppc or i386) that don't have 64-bit
...
features autodetected. This fixes PR1010 and Regression/CodeGen/X86/xmm-r64.ll
on non-x86-64 hosts.
llvm-svn: 31879
2006-11-20 18:16:05 +00:00
3676a994ca
Fix PR1011 and CodeGen/Generic/2006-11-20-DAGCombineCrash.ll
...
llvm-svn: 31878
2006-11-20 18:05:46 +00:00
539df43e4b
setOperand should not zap the operand list or add implicit operands to an
...
instruction. Doing so breaks the FP stackifier, the alpha branch selector
the sparc fpmover.
This fixes PR1012 and CodeGen/X86/fp-stack-compare.ll
llvm-svn: 31876
2006-11-20 17:57:22 +00:00
37d080b11d
We should perform extra load for dllimported calls
...
llvm-svn: 31874
2006-11-20 10:46:14 +00:00
d9436b6837
For PR950:
...
First in a series of patches to convert SetCondInst into ICmpInst and
FCmpInst using only two opcodes and having the instructions contain their
predicate value. Nothing uses these classes yet. More patches to follow.
llvm-svn: 31867
2006-11-20 01:22:35 +00:00
9f4448a26e
For PR950:
...
Retain the signedness of the old integer types in a new TypeInfo structure
so that it can be used in the grammar to implement auto-upgrade of things
that depended on signedness of types. This doesn't implement any new
functionality in the AsmParser, its just plumbing for future changes.
llvm-svn: 31866
2006-11-19 23:07:00 +00:00
ea017f66f7
Don't transform in another bad case: if the block is empty, it should be
...
simplified before we do this xform so that our cost model is accurate.
llvm-svn: 31864
2006-11-18 22:25:39 +00:00
56ec81ff73
Fix another case we *don't* want to do this xform.
...
llvm-svn: 31861
2006-11-18 21:56:39 +00:00
ace542fa6c
Implement operator<< for machine basic blocks to make it easier to dump them.
...
llvm-svn: 31857
2006-11-18 21:47:36 +00:00
7acdc17fe4
make the previous change more aggressive, moving any block with no fallthrough.
...
This speeds up yacr2 by 7% on a core2.
llvm-svn: 31856
2006-11-18 21:30:35 +00:00
47ce26158f
Minor code layout tweak: if we have something like this:
...
if (cond) goto BB2
BB1:
...
return;
BB2:
...
Move BB1 to the end of the function so that the code falls through in the
non-return case. This has the effect of moving assert (and other no-return
call) bodies and return blocks out of loops.
llvm-svn: 31855
2006-11-18 20:47:54 +00:00
95adf8f1da
Do not convert massive blocks on phi nodes into select statements. Instead
...
only do these transformations if there are a small number of phi's.
This speeds up Ptrdist/ks from 2.35s to 2.19s on my mac pro.
llvm-svn: 31853
2006-11-18 19:19:36 +00:00
ceeed00be7
Have ConstantExprs upgrade opcodes the same way as instructions.
...
llvm-svn: 31841
2006-11-18 04:37:19 +00:00
2cca385fbb
on ppc64, float arguments take 8-byte stack slots not 4-byte stack slots.
...
Also, valist should create a pointer RC reg class value, not a GPRC value.
llvm-svn: 31840
2006-11-18 01:57:19 +00:00
572e238c14
make sure to safe LR8 in the right stack slot for PPC64
...
llvm-svn: 31839
2006-11-18 01:34:43 +00:00
9ca15c8914
Pretty print 'rldicr r2, r2, 2, 61' as 'sldi r2, r2, 2'.
...
llvm-svn: 31838
2006-11-18 01:23:56 +00:00
542dfd5510
Rewrite the branch selector to be correct in the face of large functions.
...
The algorithm it used before wasn't 100% correct, we now use an iterative
expansion model. This fixes assembler errors when compiling 403.gcc with
tail merging enabled.
Change the way the branch selector works overall: Now, the isel generates
PPC::BCC instructions (as it used to) directly, and these BCC instructions
are emitted to the output or jitted directly if branches don't need
expansion. Only if branches need expansion are instructions rewritten
and created. This should make branch select faster, and eliminates the
Bxx instructions from the .td file.
llvm-svn: 31837
2006-11-18 00:32:03 +00:00
33fc1d45e5
add encoding for BCC, after finally wrestling strange ppc/tblgen endianness
...
issues to the ground.
llvm-svn: 31836
2006-11-17 23:53:28 +00:00
be9377a1e3
convert PPC::BCC to use the 'pred' operand instead of separate predicate
...
value and CR reg #. This requires swapping the order of these everywhere
that touches BCC and requires us to write custom matching logic for
PPCcondbranch :(
llvm-svn: 31835
2006-11-17 22:37:34 +00:00
e0263794f4
rename PPC::COND_BRANCH to PPC::BCC
...
llvm-svn: 31834
2006-11-17 22:14:47 +00:00
8c6a41ea12
start using PPC predicates more consistently.
...
llvm-svn: 31833
2006-11-17 22:10:59 +00:00
9e8093ae20
For unsigned 8-bit division. Use movzbw to set the lower 8 bits of AX while
...
clearing the upper 8-bits instead of issuing two instructions. This also
eliminates the need to target the AH register which can be problematic on
x86-64.
llvm-svn: 31832
2006-11-17 22:10:14 +00:00
de5fa025ab
Hopefully a good crack at making debugging work on intel -disable-fp-elim.
...
llvm-svn: 31830
2006-11-17 21:19:15 +00:00
73106b5e2a
Assert unhandled case.
...
llvm-svn: 31828
2006-11-17 18:49:39 +00:00
1823346b3e
1. Ignore the -disable-fp-elim when the routine is a leaf.
...
2. Offsets on 64-bit stores are still in bytes.
llvm-svn: 31824
2006-11-17 16:09:31 +00:00
91542a4f2d
Typo. Fix the nightly tests.
...
llvm-svn: 31823
2006-11-17 14:06:41 +00:00
da0add3fd0
Fixing the ENABLE_OPTIMIZED=1 DISABLE_ASSERTIONS=1 build.
...
llvm-svn: 31822
2006-11-17 13:07:55 +00:00
9594f3a196
Moved definition of llvm_ostream wrappers to the Streams.cpp file.
...
llvm-svn: 31819
2006-11-17 09:54:47 +00:00
3315869498
Added wrappers for the std::cerr/std::cout objects. The wrappers will
...
soon replace all uses of those objects.
llvm-svn: 31817
2006-11-17 09:51:22 +00:00
9b04e3b875
Needed <iostream> for now.
...
llvm-svn: 31816
2006-11-17 09:44:28 +00:00
4479c92da5
Needs the iostream include.
...
llvm-svn: 31815
2006-11-17 09:38:03 +00:00
6a462f1e99
Removed iostream #includes. Replaced std::cerr with DOUT.
...
llvm-svn: 31814
2006-11-17 08:03:48 +00:00
c8e81b8d48
Removed even more std::cerr and #include <iostream> things.
...
llvm-svn: 31813
2006-11-17 07:52:03 +00:00
4b1a04ac62
Replaced DEBUG(std::cerr with DOUT.
...
llvm-svn: 31812
2006-11-17 07:36:54 +00:00
fc9063e9cd
Replace DEBUG(std::cerr with DOUT. Removed some iostream #includes.
...
llvm-svn: 31811
2006-11-17 07:33:59 +00:00
3216551491
Removed unneeded <iostream> #include.
...
llvm-svn: 31810
2006-11-17 07:10:51 +00:00
21eba2da26
If an indvar with a variable stride is used by the exit condition, go ahead
...
and handle it like constant stride vars. This fixes some bad codegen in
variable stride cases. For example, it compiles this:
void foo(int k, int i) {
for (k=i+i; k <= 8192; k+=i)
flags2[k] = 0;
}
to:
LBB1_1: #bb.preheader
movl %eax, %ecx
addl %ecx, %ecx
movl L_flags2$non_lazy_ptr, %edx
LBB1_2: #bb
movb $0, (%edx,%ecx)
addl %eax, %ecx
cmpl $8192, %ecx
jle LBB1_2 #bb
LBB1_5: #return
ret
or (if the array is local and we are in dynamic-nonpic or static mode):
LBB3_2: #bb
movb $0, _flags2(%ecx)
addl %eax, %ecx
cmpl $8192, %ecx
jle LBB3_2 #bb
and:
lis r2, ha16(L_flags2$non_lazy_ptr)
lwz r2, lo16(L_flags2$non_lazy_ptr)(r2)
slwi r3, r4, 1
LBB1_2: ;bb
li r5, 0
add r6, r4, r3
stbx r5, r2, r3
cmpwi cr0, r6, 8192
bgt cr0, LBB1_5 ;return
instead of:
leal (%eax,%eax,2), %ecx
movl %eax, %edx
addl %edx, %edx
addl L_flags2$non_lazy_ptr, %edx
xorl %esi, %esi
LBB1_2: #bb
movb $0, (%edx,%esi)
movl %eax, %edi
addl %esi, %edi
addl %ecx, %esi
cmpl $8192, %esi
jg LBB1_5 #return
and:
lis r2, ha16(L_flags2$non_lazy_ptr)
lwz r2, lo16(L_flags2$non_lazy_ptr)(r2)
mulli r3, r4, 3
slwi r5, r4, 1
li r6, 0
add r2, r2, r5
LBB1_2: ;bb
li r5, 0
add r7, r3, r6
stbx r5, r2, r6
add r6, r4, r6
cmpwi cr0, r7, 8192
ble cr0, LBB1_2 ;bb
This speeds up Benchmarks/Shootout/sieve from 8.533s to 6.464s and
implements LoopStrengthReduce/var_stride_used_by_compare.ll
llvm-svn: 31809
2006-11-17 06:17:33 +00:00
9d46fcd59c
More removal of std::cerr and DEBUG, replacing with DOUT instead.
...
llvm-svn: 31806
2006-11-17 02:09:07 +00:00
3b7261b18e
implement a todo: change a map into a vector
...
llvm-svn: 31805
2006-11-17 01:52:23 +00:00
d108b9a60d
Replace std::cerr uses of the "DEBUG" macro with "DOUT" instead. Removes
...
a #include of iostream.
llvm-svn: 31800
2006-11-17 00:50:36 +00:00
be1a4d80b3
fix typo
...
llvm-svn: 31799
2006-11-17 00:49:36 +00:00
d7fda04420
Added "DOUT" macro. This is used as a replacement for the std::cerr
...
stream. It centralizes the use of std::cerr so that static c'tor/d'tors
aren't scattered around all over the place. The way to use it is like this:
DOUT << "This is a status line: " << Var << "\n";
If "-debug" is specified, it will print. Otherwise, it'll not print. If
NDEBUG is defined, the DOUT does nothing.
llvm-svn: 31798
2006-11-17 00:49:12 +00:00
a715288b40
implicit_def_vrrc doesn't generate code.
...
llvm-svn: 31797
2006-11-16 23:49:52 +00:00
572dc9cb4e
Correct instructions for moving data between GR64 and SSE registers; also correct load i64 / store i64 from v2i64.
...
llvm-svn: 31795
2006-11-16 23:33:25 +00:00
7ae482c52a
Fix a potential bug: MOVPDI2DI, etc. are not copy instructions.
...
llvm-svn: 31794
2006-11-16 23:22:26 +00:00
48850c10c0
This is a general clean up of the PowerPC ABI. Address several problems and
...
bugs including making sure that the TOS links back to the previous frame,
that the maximum call frame size is not included twice when using frame
pointers, no longer growing the frame on calls, double storing of SP and
a cleaner/faster dynamic alloca.
llvm-svn: 31792
2006-11-16 22:43:37 +00:00
30055b9208
fix a regression that I introduced. stdu should scale the offset by 4
...
before printing it.
llvm-svn: 31791
2006-11-16 21:45:30 +00:00
c5e769710e
Align stubs on 4 byte boundary. This fixes 447.dealII.
...
llvm-svn: 31790
2006-11-16 20:13:34 +00:00
8969ebca44
*** empty log message ***
...
llvm-svn: 31789
2006-11-16 20:11:33 +00:00
e03ca9b0b4
Allow target to specify alignment for function stub.
...
llvm-svn: 31788
2006-11-16 20:04:54 +00:00
9fd73b8a7f
Match MachineCodeEmitter changes.
...
llvm-svn: 31787
2006-11-16 20:04:04 +00:00
96d7386006
add a statistic
...
llvm-svn: 31785
2006-11-16 18:13:49 +00:00
d811cc6818
Don't recompute getNumOperands for each iteration.
...
llvm-svn: 31783
2006-11-16 07:35:18 +00:00
c7969fd1e7
Added a new method "CreateNewLiveInterval" which, given a list of
...
LiveRanges, creates a new LiveInterval from them. The LiveRanges should
have existed already in another LiveInterval, but removed.
llvm-svn: 31780
2006-11-16 02:41:50 +00:00
a7ff5162b0
fix broken encoding
...
llvm-svn: 31778
2006-11-16 01:01:28 +00:00
e0a70388c2
enable the branch folding pass for the JIT.
...
llvm-svn: 31777
2006-11-16 01:00:07 +00:00
e742d9a4b7
add ppc64 r+i stores with update.
...
llvm-svn: 31776
2006-11-16 00:57:19 +00:00
6f5840c409
add patterns for ppc32 preinc stores. ppc64 next.
...
llvm-svn: 31775
2006-11-16 00:41:37 +00:00
3a494989a6
switch these back to the 'bad old way'
...
llvm-svn: 31774
2006-11-16 00:33:34 +00:00
f64da389f8
Fix an incorrectly inverted condition.
...
llvm-svn: 31773
2006-11-16 00:08:20 +00:00
b4e911d15a
Fix ppc64 epilog bug.
...
llvm-svn: 31771
2006-11-15 23:35:30 +00:00
5771156be0
Stop using isTwoAddress, switching to operand constraints instead.
...
Tell the codegen emitter that specific operands are not to be encoded, fixing
JIT regressions w.r.t. pre-inc loads and stores (e.g. lwzu, which we generate
even when general preinc loads are not enabled).
llvm-svn: 31770
2006-11-15 23:24:18 +00:00
5c23899c7d
add a new field needed by the code emitter generator.
...
llvm-svn: 31768
2006-11-15 22:55:04 +00:00
dc2c8748a7
Properly transfer kill / dead info.
...
llvm-svn: 31765
2006-11-15 20:58:11 +00:00
bbbcac39e6
Kill / dead info has been moved to MI's.
...
llvm-svn: 31764
2006-11-15 20:56:39 +00:00
c57819d4a3
commuteInstruction should propagate kill / dead info.
...
llvm-svn: 31763
2006-11-15 20:56:03 +00:00
0ffff1c629
Match live variable changes.
...
llvm-svn: 31762
2006-11-15 20:55:15 +00:00
ebb0357b4c
Minor updates.
...
llvm-svn: 31761
2006-11-15 20:54:29 +00:00
12ea213de9
A register def can be partially dead when the whole register has use(s) but a subreg does not.
...
llvm-svn: 31760
2006-11-15 20:54:11 +00:00
70ec52896e
Do away with kill / dead maps. Move kill / dead info onto MI's.
...
llvm-svn: 31759
2006-11-15 20:51:59 +00:00
474b5b7c95
fix ldu/stu jit encoding. Swith 64-bit preinc load instrs to use memri
...
addrmodes.
llvm-svn: 31757
2006-11-15 19:55:13 +00:00
9f3083eef0
Add run(Function &F) support in FunctionPassManager_New
...
llvm-svn: 31756
2006-11-15 19:39:54 +00:00
2775aba51d
Simplify IntrinsicLowering and clarify that it is only for use by the
...
CBE and interpreter.
llvm-svn: 31755
2006-11-15 18:00:10 +00:00
60c2a0154a
Remove unneeded forward decls
...
llvm-svn: 31754
2006-11-15 17:53:13 +00:00
30d08801ef
remove dead #include
...
llvm-svn: 31753
2006-11-15 17:51:15 +00:00
0e117c7e9d
Fix the PPC regressions last night
...
llvm-svn: 31752
2006-11-15 17:40:51 +00:00
e3a63d136d
Fix a gcc 4.2 warning.
...
llvm-svn: 31751
2006-11-15 04:53:24 +00:00
1396961e85
Switch loads over to use memri as the operand instead of a reg/imm operand
...
pair for cleanliness. Add instructions for PPC32 preinc-stores with commented
out patterns. More improvement is needed to enable the patterns, but we're
getting close.
llvm-svn: 31749
2006-11-15 02:43:19 +00:00
4a3fa4ff26
Tidy up marking of last analysis user pass.
...
llvm-svn: 31746
2006-11-15 01:48:14 +00:00
ff631ae600
Add doInitialization and doFinalization support in FunctionManager_New.
...
llvm-svn: 31745
2006-11-15 01:27:05 +00:00
42add710fa
Do not derive CommonPassManagerImpl from Pass.
...
Now BasicBlockPassManager_New is a FunctionPass,
FunctionPassManager_New is a ModulePass
llvm-svn: 31744
2006-11-15 01:11:27 +00:00
07f4f58945
Copy initializeAnalysisImpl() implementation from PassManagerT.
...
Update LastUser to recursively walk required transitive set.
llvm-svn: 31741
2006-11-14 21:49:36 +00:00
cf772f7eca
Revert. This wasn't meant to be checked in.
...
llvm-svn: 31737
2006-11-14 19:20:33 +00:00
e79a451475
group load and store instructions together. No functionality change.
...
llvm-svn: 31736
2006-11-14 19:19:53 +00:00
58e8bed48e
Fix predicates for unindexed stores so they don't accidentally match indexed
...
stores.
llvm-svn: 31735
2006-11-14 19:13:39 +00:00
44dbdbe5cf
Rework PPC64 calls. Now we have a LR8/CTR8 register which the PPC64 calls
...
clobber. This allows LR8 to be save/restored correctly as a 64-bit quantity,
instead of handling it as a 32-bit quantity. This unbreaks ppc64 codegen when
the code is actually located above the 4G boundary.
llvm-svn: 31734
2006-11-14 18:44:47 +00:00
b542925b22
remove a ton of custom selection logic no longer needed
...
llvm-svn: 31733
2006-11-14 18:43:11 +00:00
4916acbd0f
it would be nice of ctlz were lowered to bsf etc.
...
llvm-svn: 31730
2006-11-14 08:08:46 +00:00
f05d69ae72
implement InstCombine/shift-simplify.ll by transforming:
...
(X >> Z) op (Y >> Z) -> (X op Y) >> Z
for all shifts and all ops={and/or/xor}.
llvm-svn: 31729
2006-11-14 07:46:50 +00:00
d12a4bf799
implement InstCombine/and-compare.ll:test1. This compiles:
...
typedef struct { unsigned prefix : 4; unsigned code : 4; unsigned unsigned_p : 4; } tree_common;
int foo(tree_common *a, tree_common *b) { return a->code == b->code; }
into:
_foo:
movl 4(%esp), %eax
movl 8(%esp), %ecx
movl (%eax), %eax
xorl (%ecx), %eax
# TRUNCATE movb %al, %al
shrb $4, %al
testb %al, %al
sete %al
movzbl %al, %eax
ret
instead of:
_foo:
movl 8(%esp), %eax
movb (%eax), %al
shrb $4, %al
movl 4(%esp), %ecx
movb (%ecx), %cl
shrb $4, %cl
cmpb %al, %cl
sete %al
movzbl %al, %eax
ret
saving one cycle by eliminating a shift.
llvm-svn: 31727
2006-11-14 06:06:06 +00:00
97ff46b3cc
lower "X = seteq Y, Z" to '(shr (ctlz (xor Y, Z)), 5)' instead of
...
'(shr (ctlz (sub Y, Z)), 5)'.
The use of xor better exposes the operation to bit-twiddling logic in the
dag combiner. For example, this:
typedef struct {
unsigned prefix : 4;
unsigned code : 4;
unsigned unsigned_p : 4;
} tree_common;
int foo(tree_common *a, tree_common *b) {
return a->code == b->code;
}
Now compiles to:
_foo:
lwz r2, 0(r4)
lwz r3, 0(r3)
xor r2, r3, r2
rlwinm r2, r2, 28, 28, 31
cntlzw r2, r2
srwi r3, r2, 5
blr
instead of:
_foo:
lbz r2, 3(r4)
lbz r3, 3(r3)
srwi r2, r2, 4
srwi r3, r3, 4
subf r2, r2, r3
cntlzw r2, r2
srwi r3, r2, 5
blr
saving a cycle.
llvm-svn: 31725
2006-11-14 05:28:08 +00:00
0ad1e3845b
A shim over other AA impls to catch incorrect uses
...
llvm-svn: 31724
2006-11-14 05:21:04 +00:00
1b89a7bcc1
Discard code that supported old bytecode formats. This makes the Bytecode
...
Reader code much easier to read and maintain. Backwards compatibility from
version 5 format has been retained. Older formats will produce an error.
llvm-svn: 31723
2006-11-14 04:47:22 +00:00
ca1892699c
Implement removeDeadPasses().
...
llvm-svn: 31722
2006-11-14 03:05:08 +00:00
3f0832a3b5
Keep track of Last user of analysis phase.
...
llvm-svn: 31721
2006-11-14 02:54:23 +00:00
f60b5d9676
Use std::map to map AnalysisID and Pass.
...
llvm-svn: 31720
2006-11-14 01:59:59 +00:00
6dc22332bf
add a note
...
llvm-svn: 31719
2006-11-14 01:57:53 +00:00
683712583a
minor tweaks, reject vector preinc.
...
llvm-svn: 31717
2006-11-14 01:38:31 +00:00
050ec72ae4
Manage analysis passes during run.
...
llvm-svn: 31716
2006-11-14 01:23:29 +00:00
dafa4ddc46
Update comments.
...
llvm-svn: 31713
2006-11-14 00:03:04 +00:00
dbd3d294e6
Matches MachineInstr changes.
...
llvm-svn: 31712
2006-11-13 23:36:35 +00:00
77af6ac5e8
- Let MachineInstr ctors add implicit def and use operands. Other operands
...
will be inserted before these operands. If the opcode changes (by
setOpcode), the implicit operands are updated as well.
- Added IsKill, IsDead fields to MachineOperand in preparation for changes
that move kill / dead info to MachineInstr's.
llvm-svn: 31711
2006-11-13 23:34:06 +00:00
7086844634
Update PassManagerImpl_New::analysisCurrentlyAvailable to check all
...
managed passmanagers.
llvm-svn: 31710
2006-11-13 22:53:19 +00:00
ebba970a6d
Check currently available anlysis in active managers.
...
llvm-svn: 31709
2006-11-13 22:40:09 +00:00
1121e50f7e
teach the g5 hazard recognizer about update loads. This fixes
...
Ptrdist/anagram among others.
llvm-svn: 31708
2006-11-13 20:11:06 +00:00
5c833df633
remove redundant code
...
llvm-svn: 31697
2006-11-13 01:10:12 +00:00
0df2ada9d4
Cute example from Chris Lattner.
...
llvm-svn: 31696
2006-11-13 00:23:28 +00:00
ad75361d42
Initialize some pointers to quiet the compiler (when doing build_gcc
...
builds).
llvm-svn: 31694
2006-11-12 11:10:39 +00:00
1dfc6110ff
Make sure stack link is set in 64-bit.
...
llvm-svn: 31690
2006-11-11 22:22:07 +00:00
06d8e0fa3b
Remvoe a do-nothing else block.
...
llvm-svn: 31687
2006-11-11 20:27:49 +00:00
2230144a75
Make an assert comment match the tested assertion.
...
llvm-svn: 31686
2006-11-11 20:07:59 +00:00
0d550cc56c
implement proper PPC64 prolog/epilog codegen.
...
llvm-svn: 31684
2006-11-11 19:05:28 +00:00
75db664f44
For PR998:
...
Fix an infinite loop in the Linker and a few other assorted link problems.
Patch contributed by Scott Michel. Thanks, Scott!
llvm-svn: 31680
2006-11-11 11:54:25 +00:00
66c502b54a
Running with frame pointers prevented debugging, external probes and
...
potentially some system calls/exception handling from working. TOS must always
link to previous frame. This is a short term workaround until alloca scheme is
reworked.
llvm-svn: 31677
2006-11-11 10:21:58 +00:00
db04c958a5
Add implicit use / def operands to created MI's.
...
llvm-svn: 31676
2006-11-11 10:21:44 +00:00
979bbf48d5
Add methods to add implicit def use operands to a MI.
...
llvm-svn: 31675
2006-11-11 10:20:02 +00:00
a36cdcfaf8
Add all implicit defs to FP_REG_KILL mi.
...
llvm-svn: 31674
2006-11-11 07:19:36 +00:00
c5102bfc7c
allow the offset of a preinc'd load to be the low-part of a global. This
...
produces this clever code:
_millisecs:
lis r2, ha16(_Time.1182)
lwzu r3, lo16(_Time.1182)(r2)
lwz r2, 4(r2)
addic r4, r2, 1
addze r3, r3
blr
instead of this:
_millisecs:
lis r2, ha16(_Time.1182)
la r3, lo16(_Time.1182)(r2)
lwz r2, lo16(_Time.1182)(r2)
lwz r3, 4(r3)
addic r4, r3, 1
addze r3, r2
blr
for:
long %millisecs() {
%tmp = load long* %Time.1182 ; <long> [#uses=1]
%tmp1 = add long %tmp, 1 ; <long> [#uses=1]
ret long %tmp1
}
llvm-svn: 31673
2006-11-11 04:53:30 +00:00
2ff632c54b
Mark operands as symbol lo instead of imm32 so that they print lo(x) around
...
globals.
llvm-svn: 31672
2006-11-11 04:51:36 +00:00
1a6eaa49fe
Implement schedulePasses().
...
llvm-svn: 31671
2006-11-11 02:22:31 +00:00
db789fb8f2
Implement PassManagerImpl_New::add().
...
Just add pass into the pass manager queue without processing analysis.
llvm-svn: 31670
2006-11-11 02:06:21 +00:00
90b05e0bc3
While adding pass into the manager, process Analysis only if it is
...
required to do so.
llvm-svn: 31669
2006-11-11 02:04:19 +00:00
2efbad4a72
Remove dead code.
...
llvm-svn: 31668
2006-11-11 01:56:39 +00:00
8cad70de14
Code refactoring. Move common code into CommonPassManagerImpl :)
...
llvm-svn: 31667
2006-11-11 01:51:02 +00:00
a98445962d
Move CommonPassManagerImpl from PassManager.h to PassManager.cpp
...
llvm-svn: 31666
2006-11-11 01:31:05 +00:00
349170f5da
Remove analysis that is not preserved by the pass from AvailableAnalysis.
...
llvm-svn: 31665
2006-11-11 01:24:55 +00:00
643676c1f5
Keep track if analysis made available by the pass.
...
llvm-svn: 31664
2006-11-11 01:10:19 +00:00
a0a8003f59
disallow preinc of a frameindex. This is not profitable and causes 2-addr
...
pass to explode. This fixes a bunch of llc-beta failures on ppc last night.
llvm-svn: 31661
2006-11-11 01:00:15 +00:00
eabc15c1d8
reduce indentation by using early exits. No functionality change.
...
llvm-svn: 31660
2006-11-11 00:56:29 +00:00
6c9f548704
Keep track of analysis required by the passes. Force use of new pass
...
manager if a pass does not preserve analysis that is used by other
passes.
llvm-svn: 31659
2006-11-11 00:42:16 +00:00
ffad2166e1
move big chunks of code out-of-line, no functionality change.
...
llvm-svn: 31658
2006-11-11 00:39:41 +00:00
b314b155ed
ppc64 doesn't have lwau, don't attempt to form it.
...
llvm-svn: 31656
2006-11-11 00:08:42 +00:00
c9fa36d706
implement preinc support for r+i loads on ppc64
...
llvm-svn: 31654
2006-11-10 23:58:45 +00:00
d4dee405cb
Fix InstCombine/2006-11-10-ashr-miscompile.ll a miscompilation introduced
...
by the shr -> [al]shr patch. This was reduced from 176.gcc.
llvm-svn: 31653
2006-11-10 23:38:52 +00:00
915026cdc3
Add a note.
...
llvm-svn: 31650
2006-11-10 22:09:17 +00:00
5b725a71a9
These are done.
...
llvm-svn: 31649
2006-11-10 22:03:35 +00:00
49683ba236
Don't dag combine floating point select to max and min intrinsics. Those
...
take v4f32 / v2f64 operands and may end up causing larger spills / restores.
Added X86 specific nodes X86ISD::FMAX, X86ISD::FMIN instead.
This fixes PR996.
llvm-svn: 31645
2006-11-10 21:43:37 +00:00
4eac5f59e6
Fix a dag combiner bug exposed by my recent instcombine patch. This fixes
...
CodeGen/Generic/2006-11-10-DAGCombineMiscompile.ll and PPC gsm/toast
llvm-svn: 31644
2006-11-10 21:37:15 +00:00
0ed477969f
s/PassManagerAnalysisHelper/CommonPassManagerImpl
...
Inherit CommonPassManagerImpl from Pass.
llvm-svn: 31642
2006-11-10 21:33:13 +00:00
fb44822a98
Fix a bug in SelectScalarSSELoad. Since the load is wrapped in a
...
SCALAR_TO_VECTOR, even if the hasOneUse() check pass we may end up folding
the load into two instructions. Make sure we check the SCALAR_TO_VECTOR
has only one use as well.
llvm-svn: 31641
2006-11-10 21:23:04 +00:00
6c8656a6b1
dform 8/9 are identical to dform 1
...
llvm-svn: 31637
2006-11-10 17:51:02 +00:00
286357480c
Fix a potential bug.
...
llvm-svn: 31634
2006-11-10 09:13:37 +00:00
8c9c6d71ed
Add implicit def / use operands to MachineInstr.
...
llvm-svn: 31633
2006-11-10 08:43:01 +00:00
13440b025c
When forming a pre-indexed store, make sure ptr isn't the same or is a pred of value being stored. It would cause a cycle.
...
llvm-svn: 31631
2006-11-10 08:28:11 +00:00
d5e604dbb2
commentate
...
llvm-svn: 31627
2006-11-10 04:41:34 +00:00
ce6455489a
add an initial cut at preinc loads for ppc32. This is broken for ppc64
...
(because the 64-bit reg target versions aren't implemented yet), doesn't
support r+r addr modes, and doesn't handle stores, but it works otherwise. :)
This is disabled unless -enable-ppc-preinc is passed to llc for now.
llvm-svn: 31621
2006-11-10 02:08:47 +00:00
cd436327f1
add note about ugly codegen with preinc
...
llvm-svn: 31617
2006-11-10 01:33:53 +00:00
14140059f0
Use TargetInstrInfo::getNumOperands() instead of MachineInstr::getNumOperands(). In preparation for implicit reg def/use changes.
...
llvm-svn: 31616
2006-11-10 01:28:43 +00:00
b9c91c265c
Fixing PR990: http://llvm.org/PR990 .
...
This should unbreak csretcc on Linux & mingw targets. Several tests from
llvm-test should be also restored (fftbench, bigfib).
llvm-svn: 31613
2006-11-10 00:48:11 +00:00
4e03cb1945
add a note about viterbi
...
llvm-svn: 31612
2006-11-10 00:23:26 +00:00
82928ca290
second patch to fix PR992/993.
...
llvm-svn: 31610
2006-11-09 23:36:08 +00:00
924f4fee8b
Minimal patch to fix PR992/PR993
...
llvm-svn: 31608
2006-11-09 23:17:45 +00:00
5fdbe55979
if lazy compilation is disabled, print an error message and abort if
...
lazy compilation is ever attempted
llvm-svn: 31602
2006-11-09 19:32:13 +00:00
87aee74ccb
init ivar
...
llvm-svn: 31601
2006-11-09 19:31:15 +00:00
36a8fbf771
PPC supports i32 / i64 pre-inc load / store.
...
llvm-svn: 31599
2006-11-09 19:11:50 +00:00
6878378390
Don't attempt expensive pre-/post- indexed dag combine if target does not support them.
...
llvm-svn: 31598
2006-11-09 19:10:46 +00:00
d550248f2c
Add a mechanism to specify whether a target supports a particular indexed load / store.
...
llvm-svn: 31597
2006-11-09 18:56:43 +00:00
c034f14fbe
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
...
llvm-svn: 31596
2006-11-09 18:44:21 +00:00
b15000736c
Rename ISD::MemOpAddrMode to ISD::MemIndexedMode
...
llvm-svn: 31595
2006-11-09 17:55:04 +00:00
f1606b80f1
Allows debugging llc self hosted.
...
llvm-svn: 31594
2006-11-09 16:32:26 +00:00
97f89b11b3
Merging dwarf info to a single compile unit.
...
llvm-svn: 31593
2006-11-09 14:52:14 +00:00
5f7ab1b964
implement load effective address similar to the alpha backend
...
remove lea_addri and the now unused memri addressing mode
llvm-svn: 31592
2006-11-09 13:58:55 +00:00
1b9633d7f0
silence warnings
...
llvm-svn: 31587
2006-11-09 05:18:12 +00:00
6e2c15c158
Teach ShrinkDemandedConstant how to handle X+C. This implements:
...
add.ll:test33, add.ll:test34, shift-sra.ll:test2
llvm-svn: 31586
2006-11-09 05:12:27 +00:00
b58e06bc9e
getPostIndexedAddressParts change: passes in load/store instead of its loaded / stored VT.
...
llvm-svn: 31584
2006-11-09 04:29:46 +00:00
1698c2999c
Remove M_2_ADDR_FLAG.
...
llvm-svn: 31583
2006-11-09 02:22:54 +00:00
c9a4cdc9c9
Added indexed store node and patfrag's.
...
llvm-svn: 31576
2006-11-08 23:02:11 +00:00
c4ecf9ff47
Bump the bytecode version number to 7. Implement upgrade of version 6 and
...
version 6 bytecode.
llvm-svn: 31573
2006-11-08 21:27:54 +00:00
3b3b786f03
Use movl+xchgl instead of pushl+popl.
...
llvm-svn: 31572
2006-11-08 20:35:37 +00:00
6cd0909da7
Match tblegen changes.
...
llvm-svn: 31571
2006-11-08 20:34:28 +00:00
85e54223cd
Match more post-indexed ops.
...
llvm-svn: 31569
2006-11-08 20:27:27 +00:00
4f218d56f5
reenable factoring of GEP expressions, being more precise about the
...
case that it bad to do.
llvm-svn: 31563
2006-11-08 19:42:28 +00:00
cd62f11227
make this code more efficient by not creating a phi node we are just going to
...
delete in the first place. This also makes it simpler.
llvm-svn: 31562
2006-11-08 19:29:23 +00:00
61feeb90f9
Remove redundant <cmath>.
...
llvm-svn: 31561
2006-11-08 19:16:44 +00:00
a3acfca920
disable this factoring optzn for GEPs for now, this severely pessimizes some
...
loops.
llvm-svn: 31560
2006-11-08 18:49:31 +00:00
708cb60588
initial implementation of addressing mode 2
...
TODO: fix lea_addri
llvm-svn: 31552
2006-11-08 17:07:32 +00:00
8ea2e68493
Include llvm/Support/DataTypes.h to define intptr_t.
...
This fixes the build on OpenBSD and potentially other systems.
llvm-svn: 31550
2006-11-08 15:04:35 +00:00
62bbc9ef58
Now can re-enable debug label folding.
...
llvm-svn: 31549
2006-11-08 14:17:45 +00:00
4e12f86a1b
Split FunctionPassManager_New into FunctionPassManager_New and FunctionPassManagerImpl_New.
...
FunctionPassManagerImpl_New implements the pass manager.
FunctionPassManager_New is the public interface.
llvm-svn: 31547
2006-11-08 10:44:40 +00:00
376fefafb2
Split PassManager_New into PassManager_New and PassManagerImpl_New.
...
PassManagerImpl_New implements the pass manager.
PassManager_New is the public interface.
llvm-svn: 31546
2006-11-08 10:29:57 +00:00
ca58e3532f
Move BasicBlockPassManager_New, FunctionPassManager_New and
...
ModulePassManager_New class declarations from PassManager.h
to PassManager.cpp
llvm-svn: 31545
2006-11-08 10:05:38 +00:00
0303cb9b33
- When performing pre-/post- indexed load/store transformation, do not worry
...
about whether the new base ptr would be live below the load/store. Let two
address pass split it back to non-indexed ops.
- Minor tweaks / fixes.
llvm-svn: 31544
2006-11-08 08:30:28 +00:00
6072435756
Fixed a minor bug preventing some pre-indexed load / store transformation.
...
llvm-svn: 31543
2006-11-08 06:56:05 +00:00
fdff938a7e
For PR950:
...
This patch converts the old SHR instruction into two instructions,
AShr (Arithmetic) and LShr (Logical). The Shr instructions now are not
dependent on the sign of their operands.
llvm-svn: 31542
2006-11-08 06:47:33 +00:00
Chris Lattner