Commit Graph

375067 Commits

Author SHA1 Message Date
Javier Setoain aece4e2793 [mlir][ArmSVE][RFC] Add an ArmSVE dialect
This revision starts an Arm-specific ArmSVE dialect discussed in the discourse RFC thread:

https://llvm.discourse.group/t/rfc-vector-dialects-neon-and-sve/2284

Reviewed By: rriddle

Differential Revision: https://reviews.llvm.org/D92172
2020-12-14 21:35:01 +00:00
Matt Arsenault 2e0e03c6a0 OpaquePtr: Require byval on x86_intrcc parameter 0
Currently the backend special cases x86_intrcc and treats the first
parameter as byval. Make the IR require byval for this parameter to
remove this special case, and avoid the dependence on the pointee
element type.

Fixes bug 46672.

I'm not sure the IR is enforcing all the calling convention
constraints. clang seems to ignore the attribute for empty parameter
lists, but the IR tolerates it.
2020-12-14 16:34:37 -05:00
Matt Arsenault ef4da3c2ba clang: Add byval on x86_intrcc parameter 0
This will allow removing the special case treatment of the parameter
and avoid depending on the pointer's element type.
2020-12-14 16:34:37 -05:00
Louis Dionne 7ad49aec12 [libc++] Split allocator_traits and pointer_traits out of <memory>
In addition to making the code a lot easier to grasp by localizing many
helper functions to the only file where they are actually needed, this
will allow creating helper functions that depend on allocator_traits
outside of <memory>.

This is done as part of implementing array support in allocate_shared,
which requires non-trivial array initialization algorithms that would be
better to keep out of <memory> for sanity. It's also a first step towards
splitting up our monolithic headers into finer grained ones, which will
make it easier to reuse functionality across the library. For example,
it's just weird that we had to define `addressof` inside <type_traits>
to avoid circular dependencies -- instead it's better to implement those
in true helper headers.

Differential Revision: https://reviews.llvm.org/D93074
2020-12-14 16:13:57 -05:00
Zequan Wu b6b522c4db [NFC] cleanup cg-profile emission on TargetLowerinng
Differential Revision: https://reviews.llvm.org/D93150
2020-12-14 13:07:44 -08:00
Hafiz Abid Qadeer 670686ad8e Add initial support for multilibs in Baremetal toolchain.
This patch add support of riscv multilibs in the Baremetal toolchain. It is
a bit different to what is done in GNU.cpp as we are not iterating a
GNU sysroot to find the multilibs. This is intended for an llvm only
toolchain. We are not checking for the presence of any runtime bits to
enable a specific multilib.

I have structured the patch so that other targets for which
there is no multilibs support yet in Baremetal.cpp (e.g. arm-none-eabi)
will not be affected. Patch also allows some multilibs reuse.

Long term, I would like to go in the direction of data-driven specification of
multilib directories and flags.

Reviewed By: jroelofs

Differential Revision: https://reviews.llvm.org/D93138
2020-12-14 20:49:45 +00:00
Guozhi Wei d50d7c37a1 [MBP] Prevent rotating a chain contains entry block
The entry block should always be the first BB in a function.
So we should not rotate a chain contains the entry block.

Differential Revision: https://reviews.llvm.org/D92882
2020-12-14 12:48:55 -08:00
Philip Reames f5fe8493e5 [LAA] Relax restrictions on early exits in loop structure
his is a preparation patch for supporting multiple exits in the loop vectorizer, by itself it should be mostly NFC. This patch moves the loop structure checks from LAA to their respective consumers (where duplicates don't already exist).  Moving the checks does end up changing some of the optimization warnings and debug output slightly, but nothing that appears to be a regression.

Why do this? Well, after auditing the code, I can't actually find anything in LAA itself which relies on having all instructions within a loop execute an equal number of times. This patch simply makes this explicit so that if one consumer - say LV in the near future (hopefully) - wants to handle a broader class of loops, it can do so.

Differential Revision: https://reviews.llvm.org/D92066
2020-12-14 12:44:01 -08:00
River Riddle 6af2c4ca9b [mlir] Change the internal representation of FrozenRewritePatternList to use shared_ptr
This will allow for caching pattern lists across multiple pass instances, such as when multithreading. This is an extremely important invariant for PDL patterns, which are compiled at runtime when the FrozenRewritePatternList is built.

Differential Revision: https://reviews.llvm.org/D93146
2020-12-14 12:32:44 -08:00
Christian Sigg 6f271e921b [mlir] Remove methods from mlir::OpState that just forward to mlir::Operation.
All call sites have been converted in previous changes.

Reviewed By: mehdi_amini

Differential Revision: https://reviews.llvm.org/D93176
2020-12-14 21:26:14 +01:00
Michael Kruse 2aa4335806 [flang] Fix copy elision assumption.
Before this patch, the Restorer depended on copy elision to happen.
Without copy elision, the function ScopedSet calls the move constructor
before its dtor. The dtor will prematurely restore the reference to the
original value.

Instead of relying the compiler to not use the Restorer's copy
constructor, delete its copy and assign operators. Hence, callers cannot
move or copy a Restorer object anymore, and have to explicitly provide
the reset state. ScopedSet avoids calling move/copy operations by
relying on unnamed return value optimization, which is mandatory in
C++17.

Reviewed By: klausler

Differential Revision: https://reviews.llvm.org/D88797
2020-12-14 14:07:05 -06:00
River Riddle 6bc9439f59 [mlir][OpAsmParser] Add support for parsing integer literals without going through IntegerAttr
Some operations use integer literals as part of their custom format that don't necessarily map to an internal IntegerAttr. This revision exposes the same `parseInteger` functions as the DialectAsmParser to allow for these operations to parse integer literals without incurring the otherwise unnecessary roundtrip through IntegerAttr.

Differential Revision: https://reviews.llvm.org/D93152
2020-12-14 12:00:43 -08:00
River Riddle c234b65cef [mlir][OpFormat] Add support for emitting newlines from the custom format of an operation
This revision adds a new `printNewline` hook to OpAsmPrinter that allows for printing a newline within the custom format of an operation, that is then indented to the start of the operation. Support for the declarative assembly format is also added, in the form of a `\n` literal.

Differential Revision: https://reviews.llvm.org/D93151
2020-12-14 12:00:43 -08:00
Artem Belevich 0936655bac [CUDA] Do not diagnose host/device variable access in dependent types.
`isCUDADeviceBuiltinSurfaceType()`/`isCUDADeviceBuiltinTextureType()` do not
work on dependent types as they rely on specific type attributes.

Differential Revision: https://reviews.llvm.org/D92893
2020-12-14 11:53:18 -08:00
Sanjay Patel 9c1765acab [VectorCombine] add test for load with offset; NFC 2020-12-14 14:40:06 -05:00
Reid Kleckner 55fc64bce0 [Hexagon] Tweak _MSC_VER workaround version
My bot runs VS 2019, but it could not compile this code.

Message:
[55/2465] Building CXX object lib\Target\Hexagon\CMakeFiles\LLVMHexagonCodeGen.dir\HexagonVectorCombine.cpp.obj
FAILED: lib/Target/Hexagon/CMakeFiles/LLVMHexagonCodeGen.dir/HexagonVectorCombine.cpp.obj
...
C:\Program Files (x86)\Microsoft Visual Studio\2019\Professional\VC\Tools\MSVC\14.23.28105\include\map(71): error C2976: 'std::map': too few template arguments
C:\Program Files (x86)\Microsoft Visual Studio\2019\Professional\VC\Tools\MSVC\14.23.28105\include\map(71): note: see declaration of 'std::map'

The version in the path, 14.23, corresponds to _MSC_VER 1923, so raise
the version floor to 1924.

I have not tested with versions between 1924 and 1928 (latest), but the
latest works with the variadic version.
2020-12-14 11:26:36 -08:00
Alina Sbirlea 5a2d954671 [NFC] Remove stray comment. 2020-12-14 11:19:17 -08:00
Christian Sigg a1eb154421 [flang] Use mlir::OpState::operator->() to get to methods of mlir::Operation.
This is a preparation step to remove those methods from OpState.

Reviewed By: ftynse

Differential Revision: https://reviews.llvm.org/D93194
2020-12-14 20:04:53 +01:00
Craig Topper 045304701b [RISCV] Move vtype decoding and printing from RISCVInstPrinter to RISCVBaseInfo. Share with the assembly parser's debug output
This moves the vtype decoding and printing to RISCVBaseInfo. This keeps all of
the decoding code in the same area as the encoding code. This will make it
easier to change the decoding for the 1.0 spec in the future.

We're now sharing the printing with the debug output for operands in the
assembler. This also fixes that debug output to include the tail and mask
agnostic bits. Since the printing code works on the vtype immediate value, we
now encode the immediate during parsing and store just the immediate in the
operand.
2020-12-14 10:50:26 -08:00
Kuba Mracek f276c00898 [sanitizer] Restrict querying VM size on Darwin only to iOS devices
We currently do this for SANITIZER_IOS, which includes devices *and* simulators. This change opts out the check for simulators to unify the behavior with macOS, because VM size is really a property of the host OS, and not the simulator.

<rdar://problem/72129387>

Differential Revision: https://reviews.llvm.org/D93140
2020-12-14 10:48:48 -08:00
Thomas Raoux 8955e9f6b7 [mlir][linalg] Fix bug in elementwise vectorization
Fix a bug causing to pick the wrong vector size to broadcast to when the source
vectors have different ranks.

Differential Revision: https://reviews.llvm.org/D93118
2020-12-14 10:44:36 -08:00
Jonas Paulsson 653b97690f [SystemZ] Improve handling of backchain offset.
- New function SDValue getBackchainAddress() used by
  lowerDYNAMIC_STACKALLOC() and lowerSTACKRESTORE() to properly handle the
  backchain offset also with packed-stack.

- Make a common function getBackchainOffset() for the computation of the
  backchain offset and use in some places (NFC).

Review: Ulrich Weigand

Differential Revision: https://reviews.llvm.org/D93171
2020-12-14 12:39:38 -06:00
Sylvain Audi 5f53d28fa6 Revert "[clang-scan-deps] Support clang-cl"
Reverting, as it breaks build on mac.

This reverts commit 640ad76911.
2020-12-14 13:32:38 -05:00
Arthur Eubanks e814013932 [Wasm][LTO][NPM] Use NPM for LTO with ENABLE_EXPERIMENTAL_NEW_PASS_MANAGER
Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D92867
2020-12-14 10:15:13 -08:00
Michael Liao 1fd1f638b6 [amdgpu] Fix a crash case when `V_CNDMASK` could be simplified.
- Once an instruction is simplified, foldable candidates from it should
  be invalidated or skipped as the operand index is no longer valid.

Differential Revision: https://reviews.llvm.org/D93174
2020-12-14 13:08:13 -05:00
Roman Lebedev cae2d871c0
[NFCI][Thumb2] Regenerate MVE tests i missed in 59560e8589 2020-12-14 21:01:00 +03:00
Tony 90b951dd68 [NFC] Remove trailing whitespace in llvm/CMakeLists.txt
Differential Revision: https://reviews.llvm.org/D93234
2020-12-14 17:48:16 +00:00
Cameron Desrochers d784845de1 [TableGen] Fixed 64-bit filters being sliced to 32 bits in FixedLenDecoderEmitter
When using the FixedLenDecoderEmitter, llvm-tblgen emits tables with (OPC_ExtractField, OPC_ExtractFilterValue) opcode sequences to match the contiguous fixed bits of a given instruction's encoding. This encoding is represented in a 64-bit integer. However, the filter values were represented in a 32-bit integer. As such, instructions with fixed 64-bit encodings resulted in a table with an OPC_ExtractField for all 64 bits, followed by an OPC_ExtractFilterValue containing just the low 32 bits of their encoding, causing the filter never to match.

The exact point at which the slicing occurred was during the map insertion at line 630.

Differential Revision: https://reviews.llvm.org/D92423
2020-12-14 12:42:35 -05:00
LemonBoy 92c6141ce6 lld/ELF: Parse MSP430 BFD/emulation names
Follow the naming set by TI's own GCC-based toolchain.
Also, force the `osabi` field to `ELFOSABI_STANDALONE`, this matches GNU LD's output (the patching is done in `elf32_msp430_post_process_headers`).

Reviewed By: MaskRay

Differential Revision: https://reviews.llvm.org/D92931
2020-12-14 09:38:12 -08:00
Nemanja Ivanovic bfdc19e778 [PowerPC] Restore stack ptr from frame ptr with setjmp
If a function happens to:

- call setjmp
- do a 16-byte stack allocation
- call a function that sets up a stack frame and longjmp's back

The stack pointer that is restores by setjmp will no longer point to a valid
back chain. According to the ABI, stack accesses in such a function are to be
frame pointer based - so it is an error (quite obviously) to restore the stack
from the back chain.
We already restore the stack from the frame pointer when there are calls to
fast_cc functions. We just need to also do that when there are calls to setjmp.
This patch simply does that.

This was pointed out by the Julia team.

Differential revision: https://reviews.llvm.org/D92906
2020-12-14 11:34:16 -06:00
ergawy ecab63894b [MLIR][SPIRV] Refactoring serialization and deserialization
This commit splits SPIR-V's serialization and deserialization code
into separate libraries. The motiviation being that the serializer
is used more often the deserializer and therefore lumping them
together unnecessarily increases binary size for the most common
case.

This commit also moves these libraries into the Target/ directory
to follow MLIR convention.

Reviewed By: antiagainst

Differential Revision: https://reviews.llvm.org/D91548
2020-12-14 12:28:16 -05:00
Gabor Marton 68f53960e1 [ASTImporter] Fix import of a typedef that has an attribute
The import of a typedefs with an attribute uses clang::Decl::setAttrs().
But that needs the ASTContext which we can get only from the
TranslationUnitDecl. But we can get the TUDecl only thourgh the
DeclContext, which is not set by the time of the setAttrs call.

Fix: import the attributes only after the DC is surely imported.
Btw, having the attribute import initiated from GetImportedOrCreateDecl was
fundamentally flawed. Now that is implicitly fixed.

Differential Revision: https://reviews.llvm.org/D92962
2020-12-14 18:27:05 +01:00
Roman Lebedev 59560e8589
[SimplifyCFG] FoldBranchToCommonDest(): temporairly put back restrictions on liveout uses of bonus instructions (PR48450)
Even though d38205144f was mostly a correct
fix for the external non-PHI users, it's not a *generally* correct fix,
because the 'placeholder' values in those trivial PHI's we create
shouldn't be *always* 'undef', but the PHI itself for the backedges,
else we end up with wrong value, as the `@pr48450_2` test shows.

But we can't just do that, because we can't check that the PHI
can be it's own incoming value when coming from certain predecessor,
because we don't have a dominator tree.

So until we can address this correctness problem properly,
ensure that we don't perform the transformation
if there are such problematic external uses.

Making dominator tree available there is going to be involved,
since `-simplifycfg` pass currently does not preserve/update domtree...
2020-12-14 20:14:31 +03:00
Roman Lebedev e8360a8e1e
[NFC][SimplifyCFG] FoldBranchToCommonDest(): pull out 'common successor' into a variable
Makes it easier to use it elsewhere
2020-12-14 20:14:31 +03:00
Roman Lebedev effbbdec6e
[NFC][SimplifyCFG] Add another miscompiled test for PR48450 2020-12-14 20:14:31 +03:00
Arthur O'Dwyer 3c8e31e17b [libc++] ADL-proof <functional> by adding _VSTD:: qualification on calls.
- std::reference_wrapper
- std::function
- std::mem_fn

While I'm here, remove _VSTD:: qualification from calls to `declval`
because it takes no arguments and thus isn't susceptible to ADL.

Differential Revision: https://reviews.llvm.org/D92884
2020-12-14 12:08:34 -05:00
Arthur O'Dwyer be4c657b01 [libc++] Consistently replace `::new(__p) T` with `::new ((void*)__p) T`. NFCI.
Everywhere, normalize the whitespace to `::new (EXPR) T`.
Everywhere, normalize the spelling of the cast to `(void*)EXPR`.

Without the cast to `(void*)`, the expression triggers ADL on GCC.
(I think this is a GCC bug: https://gcc.gnu.org/bugzilla/show_bug.cgi?id=98249)
Even if it doesn't trigger ADL, it still seems incorrect to use any argument
that's not exactly `(void*)` because that opens the possibility of overload
resolution picking a user-defined overload of `operator new`, which would be
wrong.

Differential Revision: https://reviews.llvm.org/D93153
2020-12-14 12:08:34 -05:00
Sylvain Audi 640ad76911 [clang-scan-deps] Support clang-cl
clang-scan-deps contains some command line parsing and modifications.
This patch adds support for clang-cl command options.

Differential Revision: https://reviews.llvm.org/D92191
2020-12-14 12:06:05 -05:00
Siva Chandra Reddy 9ad2091e78 [libc][Obvious] Include <fenv.h> from DummyFenv.h. 2020-12-14 08:51:54 -08:00
Stanislav Mekhanoshin 87d7757bbe [SLP] Control maximum vectorization factor from TTI
D82227 has added a proper check to limit PHI vectorization to the
maximum vector register size. That unfortunately resulted in at
least a couple of regressions on SystemZ and x86.

This change reverts PHI handling from D82227 and replaces it with
a more general check in SLPVectorizerPass::tryToVectorizeList().
Moved to tryToVectorizeList() it allows to restart vectorization
if initial chunk fails.

However, this function is more general and handles not only PHI
but everything which SLP handles. If vectorization factor would
be limited to maximum vector register size it would limit much
more vectorization than before leading to further regressions.
Therefore a new TTI callback getMaximumVF() is added with the
default 0 to preserve current behavior and limit nothing. Then
targets can decide what is better for them.

The callback gets ElementSize just like a similar getMinimumVF()
function and the main opcode of the chain. The latter is to avoid
regressions at least on the AMDGPU. We can have loads and stores
up to 128 bit wide, and <2 x 16> bit vector math on some
subtargets, where the rest shall not be vectorized. I.e. we need
to differentiate based on the element size and operation itself.

Differential Revision: https://reviews.llvm.org/D92059
2020-12-14 08:49:40 -08:00
Raul Tambre c21df2a79c Revert "Re-apply "[CMake][compiler-rt][AArch64] Avoid preprocessing LSE builtins separately""
This reverts commit 03ebe1937192c247c4a7b8ec19dde2cf9845c914.

It's still breaking bots, e.g. http://green.lab.llvm.org/green/job/clang-stage1-RA/17027/console although it doesn't change any actual code.
The compile errors don't make much sense either. Revert for now.

Differential Revision: https://reviews.llvm.org/D93228
2020-12-14 18:43:55 +02:00
Jay Foad 07e92e6b60 [AMDGPU] Make use of HasSMemRealTime predicate. NFC.
We have this subtarget feature so it makes sense to use it here. This is
NFC because it's always defined by default on GFX8+.

Differential Revision: https://reviews.llvm.org/D93202
2020-12-14 16:34:57 +00:00
Kazushi (Jam) Marukawa aefedb1707 [VE] Add logical mask intrinsic instructions
Add andm, orm, xorm, eqvm, nndm, negm, pcvm, lzvm, and tovm intrinsic
instructions, a few pseudo instructions to expand logical intrinsic
using VM512, a mechnism to expand such pseudo instructions, and
regression tests.  Also, assign vector mask types and vector mask
register classes correctly.  This is required to use VM512 registers
as function arguments.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D93093
2020-12-15 01:34:31 +09:00
Simon Pilgrim 5f5a2547c1 [X86] LowerBUILD_VECTOR - track zero/nonzero elements with APInt masks. NFCI.
Prep work for undef/zero 'upper elements' handling as proposed in D92645.
2020-12-14 16:28:45 +00:00
Marek Kurdej 59c72a7012 [libc++] [P1164] Add tests for create_directories. NFC.
That's a follow-up patch after D92769.

Reviewed By: ldionne, #libc

Differential Revision: https://reviews.llvm.org/D93026
2020-12-14 17:27:18 +01:00
Kazushi (Jam) Marukawa c9213e1b29 [VE] Correct addRegisterClass calls
Correct addRegisterClass calls for vector mask registers.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D93212
2020-12-15 01:16:56 +09:00
Andrzej Warzynski 6bbbe4a574 [flang][driver] Fix a small bug (auto vs auto&)
This bug hasn't affected us yet as our usage is too basic, i.e. we don't
rely on the defaults provided by `SetDefaultFortranOpts` just yet. This
will change shortly.
2020-12-14 16:10:07 +00:00
diggerlin 15f2d4f198 [AIX] Fixed "comparison of unsigned expression >= 0 is always true" gcc warnings.
Summary:

fixed a  Fixed "comparison of unsigned expression >= 0 is always true" gcc warnings.
http://lab.llvm.org:8011/#/builders/5/builds/2407/steps/2/logs/stdio

the error caused by patch https://reviews.llvm.org/D92398
2020-12-14 11:08:40 -05:00
Markus Lavin 2a6782bb9f Reland [DebugInfo] Improve dbg preservation in LSR.
Use SCEV to salvage additional @llvm.dbg.value that have turned into
referencing undef after transformation (and traditional
salvageDebugInfo).  Before rewrite (but after introduction of new
induction variables) use SCEV to compute an equivalent set of values for
each @llvm.dbg.value in the loop body (among the loop header PHI-nodes).
After rewrite (and dead PHI elimination) update those @llvm.dbg.value
now referencing undef by picking a remaining value from its equivalence
set.  Allow match with offset by inserting compensation code in the
DIExpression.

Fixes : PR38815

Differential Revision: https://reviews.llvm.org/D87494
2020-12-14 16:15:18 +01:00
Arthur O'Dwyer 2664f5d436 generate_header_tests.py: Sort the header files ASCIIbetically.
Otherwise they come out in random (inode?) order.

Also `chmod +x` the generator, and re-run it. Somehow on Marek's
machine it produced \r\n line endings?! Open all files with
`newline='\n'` so that (if the Python3 docs are correct)
that won't happen again.

Differential Revision: https://reviews.llvm.org/D93137
2020-12-14 09:56:07 -05:00