Commit Graph

375067 Commits

Author SHA1 Message Date
Nathan James 8acb5f2723
[clang][driver][NFC] Use StringRef instead of std::string 2020-12-15 16:19:12 +00:00
Paul Walker 632f4d2747 [NFC] Fix a few SVEInstrInfo related stylistic issues. 2020-12-15 16:10:38 +00:00
Tres Popp 73c580405f [mlir] Add std op for X raised to the power of Y
Proposal:
https://llvm.discourse.group/t/rfc-standard-add-powop-to-std-dialect/2377

Differential Revision: https://reviews.llvm.org/D93119
2020-12-15 17:06:26 +01:00
David Green 6cc3d80a84 [ARM] Match dual lane vmovs from insert_vector_elt
MVE has a dual lane vector move instruction, capable of moving two
general purpose registers into lanes of a vector register. They look
like one of:
  vmov q0[2], q0[0], r2, r0
  vmov q0[3], q0[1], r3, r1
They only accept these lane indices though (and only insert into an
i32), either moving lanes 1 and 3, or 0 and 2.

This patch adds some tablegen patterns for them, selecting from vector
inserts elements. Because the insert_elements are know to be
canonicalized to ascending order there are several patterns that we need
to select. These lane indices are:

3 2 1 0    -> vmovqrr 31; vmovqrr 20
3 2 1      -> vmovqrr 31; vmov 2
3 1        -> vmovqrr 31
2 1 0      -> vmovqrr 20; vmov 1
2 0        -> vmovqrr 20

With the top one being the most common. All other potential patterns of
lane indices will be matched by a combination of these and the
individual vmov pattern already present. This does mean that we are
selecting several machine instructions at once due to the need to
re-arrange the inserts, but in this case there is nothing else that will
attempt to match an insert_vector_elt node.

Differential Revision: https://reviews.llvm.org/D92553
2020-12-15 15:58:52 +00:00
Quentin Chateau bda7d0af97 [clangd] Improve goToDefinition on auto and dectype
locateSymbolAt (used in goToDeclaration) follows the
deduced type instead of failing to locate the declaration.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D92977
2020-12-15 16:32:22 +01:00
Ulrich Weigand ebef92169c [SystemZ] Remove most hard-coded R1D instances for sibcalls
Indirect sibling calls need to use %r1 to hold the target address.
This is currently hard-coded in many places.  This is not only
unnecessary, but makes future changes in this area difficult.

This patch now encodes the target address as operand without
hard coding a register in most places throughout the MI back-end.
Code generation still always uses %r1, but this is now decided
solely in one place in SystemZTargetLowering::LowerCall.

NFC intended.
2020-12-15 16:31:18 +01:00
Mircea Trofin e2dc306b1a [utils] Fix UpdateTestChecks case where 2 runs differ for last label
Two RUN lines produce outputs that, each, have some common parts and
some different parts. The common parts are checked under label A. The
differing parts are associated to a function and checked under labels B
and C, respectivelly.
When build_function_body_dictionary is called for the first RUN line, it
will attribute the function body to labels A and C. When the second RUN
is passed to build_function_body_dictionary, it sees that the function
body under A is different from what it has. If in this second RUN line,
A were at the end of the prefixes list, A's body is still kept
associated with the first run's function.

When we output the function body (i.e. add_checks), we stop after
emitting for the first prefix matching that function. So we end up with
the wrong function body (first RUN's A-association).

There is no reason to special-case the last label in the prefixes list,
and the fix is to always clear a label association if we find a RUN line
where the body is different.

Differential Revision: https://reviews.llvm.org/D93078
2020-12-15 07:16:54 -08:00
Raphael Isemann 2b09dedac4 [lldb] Fix import-std-module tests after libc++ got a new __memory subdirectory
7ad49aec12 added a __memory subdirectory to libc++
but the code we use to find libc++ from the debug info support files wasn't
prepared to encounter unknown subdirectories within libc++. The import-std-module
tests automatically fell back to not importing the std module which caused
them to fail.

This patch removes our hardcoded exception for the 'experimental' subdirectory
and instead just ignores all subdirectories of c++/vX/ when searching the
support files.
2020-12-15 16:16:00 +01:00
Florian Hahn 7ea3932ab1
[AnnotationRemarks] Also generate annotation remarks when using -O0.
The AnnotationRemarks pass is already run at the end of the module
pipeline. This patch also adds it before bailing out for -O0, so remarks
are also generated with -O0.
2020-12-15 14:46:52 +00:00
Kazushi (Jam) Marukawa 697226550e [VE] Support FRAMEADDR
Implement FRAMEADDR for VE.  Add a regression test also.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D93295
2020-12-15 23:31:19 +09:00
Kazushi (Jam) Marukawa 2a2268a6db [VE][NFC] Sort VEISD operations
Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D93294
2020-12-15 23:29:16 +09:00
Florian Hahn 7186a3965a
[VPlan] Use VPDef for VPWidenSelectRecipe.
This patch turns updates VPWidenSelectRecipe to manage the value
it defines using VPDef.

Reviewed By: gilr

Differential Revision: https://reviews.llvm.org/D90560
2020-12-15 14:15:01 +00:00
Sebastian Neubauer 91445979be [AMDGPU] Unify flat offset logic
Move getNumFlatOffsetBits from AMDGPUAsmParser and SIInstrInfo into
AMDGPUBaseInfo.

Differential Revision: https://reviews.llvm.org/D93287
2020-12-15 14:59:59 +01:00
Sebastian Neubauer 7898803c63 [AMDGPU][NFC] Add more global_atomic_cmpswap tests 2020-12-15 14:47:33 +01:00
Hansang Bae 171ca93c54 [OpenMP] Initialize runtime in the forked child process
This patch enables serial initialization in the forked child process
to fix unstable runtime behavior when used with Python-based AI tools.

Differential Revision: https://reviews.llvm.org/D93230
2020-12-15 07:29:28 -06:00
Sam McCall 5186eda326 [clangd] Oops, fix code in #ifdef WIN32 2020-12-15 14:17:54 +01:00
Jun Ma 52a3267ffa [InstCombine] Remove scalable vector restriction in foldVectorBinop
Differential Revision: https://reviews.llvm.org/D93289
2020-12-15 21:14:59 +08:00
Sam McCall 92dd077af1 Reland [clangd] Extract per-dir CDB cache to its own threadsafe class. NFC
This reverts commit 4d956af594.

Assertion failures on windows fixed by
965d71c69a
2020-12-15 14:00:03 +01:00
Sam McCall 965d71c69a [clangd] Avoid traversing C:\ -> C: when looking for CDBs
Boost in its infinite wisdom considers C: a parent of C:\, and we've
inherited that. This breaks the assumption that after canonicalizing a
path, the path parents are the directory's parents.
2020-12-15 13:59:00 +01:00
Florian Hahn 0e0295fd61
[LV] Pass explicit vector width to not require a X86 target. 2020-12-15 12:52:22 +00:00
Chuanqi Xu 8b48d24373 [clang-format] Recognize c++ coroutine keywords as unary operator to avoid misleading pointer alignment
Summary: The clang-format may go wrong when handle c++ coroutine keywords and pointer.
The default value for PointerAlignment is PAS_Right. So the following format is good:
```
co_return *a;
```
But within some code style, the value for PointerAlignment is PAS_Left, the behavior goes wrong:
```
co_return* a;
```

test-plan: check-clang

reviewers: MyDeveloperDay

Differential Revision: https://reviews.llvm.org/D91245
2020-12-15 20:50:46 +08:00
Jun Ma ffe84d90e9 [InstCombine][NFC] Change cast of FixedVectorType to dyn_cast. 2020-12-15 20:36:57 +08:00
Jun Ma e12f584578 [InstCombine] Remove scalable vector restriction in InstCombineCompares
Differential Revision: https://reviews.llvm.org/D93269
2020-12-15 20:36:57 +08:00
Jun Ma 2ac58e21a1 [InstCombine] Remove scalable vector restriction when fold SelectInst
Differential Revision: https://reviews.llvm.org/D93083
2020-12-15 20:36:57 +08:00
Hsiangkai Wang db48a6de77 [RISCV] Define vwadd/vwaddu/vwsub/vwsubu intrinsics.
Define vwadd/vwaddu/vwsub/vwsubu intrinsics and lower to V instructions.

Authored-by: Roger Ferrer Ibanez <rofirrim@gmail.com>
Co-Authored-by: Hsiangkai Wang <kai.wang@sifive.com>

Differential Revision: https://reviews.llvm.org/D93108
2020-12-15 20:15:06 +08:00
Paul Walker b74c4dbb96 [SVE] Move INT_TO_FP i1 promotion into custom lowering.
AddPromotedToType is being used to legalise INT_TO_FP operations
when the source is a predicate. The point where this introduces
vector extends might cause problems in the future so this patch
falls back to manual promotion within custom lowering.

Differential Revision: https://reviews.llvm.org/D90093
2020-12-15 11:57:07 +00:00
Paul Walker 6d35bd1d48 [CodeGenPrepare] Update optimizeGatherScatterInst for scalable vectors.
optimizeGatherScatterInst does nothing specific to fixed length vectors
but uses FixedVectorType to extract the number of elements.  This patch
simply updates the code to use VectorType and getElementCount instead.

For testing I just copied Transforms/CodeGenPrepare/X86/gather-scatter-opt.ll
replacing `<4 x ` with `<vscale x 4`.

Differential Revision: https://reviews.llvm.org/D92572
2020-12-15 10:57:51 +00:00
Simon Pilgrim bd07092669 [X86] Remove trailing whitespace. NFC. 2020-12-15 10:11:38 +00:00
Simon Pilgrim 15a31389b2 [X86][AVX] LowerBUILD_VECTOR - reduce 256/512-bit build vectors with zero/undef upper elements + pad.
As discussed on D92645, we don't do a good job of recognising when we don't require the full width of a ymm/zmm build vector because the upper elements are undef/zero.

This commit allows us to make use of implicit zeroing of upper elements with AVX instructions, which we emulate in DAG with a INSERT_SUBVECTOR into the bottom of a undef/zero vector of the original type.

This exposed a limitation in getTargetConstantBitsFromNode which didn't extract bits from INSERT_SUBVECTORs of different element widths which I've included as well to prevent a couple of regressions.
2020-12-15 10:11:38 +00:00
Florian Hahn 8a7e770638
[LV] Add reduction test, which exposed a crash in a pending patch. 2020-12-15 09:42:00 +00:00
Florian Hahn 318f5798d8
[VPlan] Use VPDef for VPWidenGEPRecipe.
This patch turns updates VPWidenGEPRecipe to manage the value it defines
using VPDef. The VPValue is used  during VPlan construction and
codegeneration instead of the plain IR reference where possible.

Reviewed By: gilr

Differential Revision: https://reviews.llvm.org/D90561
2020-12-15 09:30:14 +00:00
Florian Hahn ad1161f9b5
[VPlan] Use VPdef for VPWidenCall.
This patch turns updates VPWidenREcipe to manage the value it defines
using VPDef.

Reviewed By: gilr

Differential Revision: https://reviews.llvm.org/D90559
2020-12-15 09:20:07 +00:00
Jan Svoboda 56c5548d7f [clang][cli] Squash multiple cc1 -fxxx-exceptions flags into single -exception-model=xxx option
This patch enables marshalling of the exception model options while enforcing their mutual exclusivity. The clang driver interface remains the same, this only affects the cc1 command line.

Depends on D93215.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D93216
2020-12-15 10:15:58 +01:00
Jan Svoboda 573255b47e [clang][cli] Squash exception model in LangOptions into one member
This squashes multiple members in LangOptions into one. This is leveraged in a follow-up patch that implements marshalling of related command-line options.

Depends on D93214.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D93215
2020-12-15 10:15:58 +01:00
Jan Svoboda f24e58df7d [clang][cli] Create accessors for exception models in LangOptions
This abstracts away the members that are being replaced in a follow-up patch.

Depends on D83979.

Reviewed By: dexonsmith

Differential Revision: https://reviews.llvm.org/D93214
2020-12-15 10:15:58 +01:00
xndcn 9c328e7afa [clangd] Add hover info for `this` expr
How about add hover information for `this` expr?
It seems useful to show related information about the class for `this` expr sometimes.

Reviewed By: sammccall

Differential Revision: https://reviews.llvm.org/D92041
2020-12-15 09:47:29 +01:00
Kazushi (Jam) Marukawa a2eb07aa55 [VE] Support atomic exchange instructions
Support atomic exchange and atomic compare and exchange instructions.
Change CAS and TS1AM instructions for ISel patterns.  Add selectADDRzi
pattern for them.  Add TS1AM pseudo instruction also for better ISel.
Add shouldExpandAtomicRMWInIR() function to expand all atomicrmw
instructions except atomicrmw xchg.  Add custom lower for i8/i16
atomicrmw xchg.  Modify replaceFI to support CAS/TS1AM instructions
which use "reg+disp" operands instead of "reg+imm+disp" operands.
And, add several regression tests to check the correctness.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D93161
2020-12-15 17:43:11 +09:00
Hsiangkai Wang 14a91d676b [RISCV][NFC] Define scalable vectors for half types.
This is a preperation work for vfadd intrinsics.

Differential Revision: https://reviews.llvm.org/D93275
2020-12-15 16:23:22 +08:00
Georgii Rymar 83aea14ed6 [llvm-readelf] - Don't print OS/Processor specific prefix for known ELF file types.
This is a change suggested in post commit comments for
D93096 (https://reviews.llvm.org/D93096#2451796).

Imagine we want to add a custom OS specific ELF file type.
For that we can update the `ElfObjectFileType` array:

```
static const EnumEntry<unsigned> ElfObjectFileType[] = {
...
  {"Core",         "CORE (Core file)",         ELF::ET_CORE},
  {"MyType",       "MyType (my description)",     0xfe01},
};
```

The current code then might print:
```
OS Specific: (MyType (my description))
```

Though instead we probably would like to see a nicer output, e.g:
```
Type: MyType (my description)
```

To achieve that we can reorder the code slightly.

It is impossible to add a test I think, because we have no custom values in
the `ElfObjectFileType` array in LLVM.

Differential revision: https://reviews.llvm.org/D93217
2020-12-15 10:56:25 +03:00
Max Kazantsev 8b330f1f69 [SCEV] Add missing type check into getRangeForAffineNoSelfWrappingAR
We make type widening without checking if it's needed. Bail if the max
iteration count is wider than AR's type.
2020-12-15 14:50:32 +07:00
Amara Emerson a69b76c500 [GlobalISel][IRTranslator] Ensure branch probabilities are added when translating invoke edges.
This uses a straightforward port of findUnwindDestinations() from SelectionDAG.

Differential Revision: https://reviews.llvm.org/D93256
2020-12-14 23:36:54 -08:00
Kazu Hirata 504e4be2c1 [IR] Remove isPowerOf2ByteWidth
The predicate used to be used with the C backend, which was removed on
Mar 23, 2012 in commit 64a232343a.  It
seems to be unused since then.
2020-12-14 23:00:17 -08:00
Max Kazantsev 2fc2e6de82 [Test] Test on assertion failure with expensive SCEV range inference 2020-12-15 13:47:19 +07:00
Kazu Hirata ddc5a5920e [Analysis] Use llvm::erase_value (NFC) 2020-12-14 22:40:13 -08:00
Raul Tambre a72d462eb9 Re-apply "[CMake][compiler-rt][AArch64] Avoid preprocessing LSE builtins separately"
aa772fc85e (D92530) has landed fixing relocations on Darwin.
3000c19df6 (D93236) has landed working around an assembly parser bug on Darwin.
Previous quick-fix d9697c2e6b (D93198) included in this commit.

Invoking the preprocessor ourselves is fragile and would require us to replicate CMake's handling of definitions, compiler flags, etc for proper compatibility.
In my toolchain builds this notably resulted in a bunch of warnings from unused flags as my CMAKE_C_FLAGS includes CPU-specific optimization options.
Notably this part was already duplicating the logic for VISIBILITY_HIDDEN define.

Instead, symlink the files and set the proper set of defines on each.
This should also be faster as we avoid invoking the compiler multiple times.

Fixes https://llvm.org/PR48494

Differential Revision: https://reviews.llvm.org/D93278
2020-12-15 08:18:07 +02:00
Raul Tambre 3000c19df6 [Compiler-rt][AArch64] Workaround for .cfi_startproc assembler parser bug.
Put .cfi_startproc on a new line to avoid hitting the assembly parser bug in MasmParser::parseDirectiveCFIStartProc().

Reviewed By: tambre

Differential Revision: https://reviews.llvm.org/D93236
2020-12-15 08:14:42 +02:00
Med Ismail Bennani dc82890a77 [lldb/API] Expose Target::CreateBreakpoint(..., move_to_nearest_code) overload
This patch exposes the Target::CreateBreakpoint overload with the
boolean argument to move to the neareast code to the SBAPI.

This is useful when creating column breakpoints to restrict lldb's
resolution to the pointed source location, preventing it to go to the next
line.

rdar://72196842

Differential Revision: https://reviews.llvm.org/D93266

Signed-off-by: Med Ismail Bennani <medismail.bennani@gmail.com>
2020-12-15 06:18:04 +01:00
Med Ismail Bennani 1d3f1eb855 Revert "[lldb/API] Expose Target::CreateBreakpoint(..., move_to_nearest_code) overload"
This reverts commit 04696ff002e7d311887b7b7e6e171340a0623dd9.

Exposing the LazyBool private type in SBTarget.h breaks some tests.
2020-12-15 06:18:04 +01:00
Hsiangkai Wang a6805a0e02 [RISCV] Define vadd/vsub/vrsub intrinsics and lower to V instructions.
This patch is based on the proposal from Roger Ferrer Ibanez.
http://lists.llvm.org/pipermail/llvm-dev/2020-October/145850.html

Differential Revision: https://reviews.llvm.org/D93013
2020-12-15 12:56:49 +08:00
LLVM GN Syncbot 086954412f [gn build] Port d2ed9d6b7e 2020-12-15 03:35:00 +00:00